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Fixed warnings
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620c951501
commit
5da834b725
@ -334,20 +334,20 @@ namespace detail
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uint16 REG1(x);
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uint16 REG1(x);
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uint16 REG2(x >>= 1);
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uint16 REG2(x >>= 1);
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REG1 = REG1 & static_cast<uint16>(0x5555555555555555ull);
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REG1 = REG1 & static_cast<uint16>(0x5555);
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REG2 = REG2 & static_cast<uint16>(0x5555555555555555ull);
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REG2 = REG2 & static_cast<uint16>(0x5555);
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REG1 = ((REG1 >> 1) | REG1) & static_cast<uint16>(0x3333333333333333ull);
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REG1 = ((REG1 >> 1) | REG1) & static_cast<uint16>(0x3333);
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REG2 = ((REG2 >> 1) | REG2) & static_cast<uint16>(0x3333333333333333ull);
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REG2 = ((REG2 >> 1) | REG2) & static_cast<uint16>(0x3333);
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REG1 = ((REG1 >> 2) | REG1) & static_cast<uint16>(0x0F0F0F0F0F0F0F0Full);
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REG1 = ((REG1 >> 2) | REG1) & static_cast<uint16>(0x0F0F);
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REG2 = ((REG2 >> 2) | REG2) & static_cast<uint16>(0x0F0F0F0F0F0F0F0Full);
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REG2 = ((REG2 >> 2) | REG2) & static_cast<uint16>(0x0F0F);
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REG1 = ((REG1 >> 4) | REG1) & static_cast<uint16>(0x00FF00FF00FF00FFull);
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REG1 = ((REG1 >> 4) | REG1) & static_cast<uint16>(0x00FF);
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REG2 = ((REG2 >> 4) | REG2) & static_cast<uint16>(0x00FF00FF00FF00FFull);
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REG2 = ((REG2 >> 4) | REG2) & static_cast<uint16>(0x00FF);
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REG1 = ((REG1 >> 8) | REG1) & static_cast<uint16>(0x0000FFFF0000FFFFull);
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REG1 = ((REG1 >> 8) | REG1) & static_cast<uint16>(0xFFFF);
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REG2 = ((REG2 >> 8) | REG2) & static_cast<uint16>(0x0000FFFF0000FFFFull);
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REG2 = ((REG2 >> 8) | REG2) & static_cast<uint16>(0xFFFF);
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return glm::u8vec2(REG1, REG2);
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return glm::u8vec2(REG1, REG2);
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}
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}
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@ -388,20 +388,20 @@ namespace detail
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glm::uint32 REG1(x);
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glm::uint32 REG1(x);
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glm::uint32 REG2(x >>= 1);
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glm::uint32 REG2(x >>= 1);
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REG1 = REG1 & static_cast<glm::uint32>(0x5555555555555555ull);
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REG1 = REG1 & static_cast<glm::uint32>(0x55555555);
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REG2 = REG2 & static_cast<glm::uint32>(0x5555555555555555ull);
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REG2 = REG2 & static_cast<glm::uint32>(0x55555555);
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REG1 = ((REG1 >> 1) | REG1) & static_cast<glm::uint32>(0x3333333333333333ull);
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REG1 = ((REG1 >> 1) | REG1) & static_cast<glm::uint32>(0x33333333);
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REG2 = ((REG2 >> 1) | REG2) & static_cast<glm::uint32>(0x3333333333333333ull);
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REG2 = ((REG2 >> 1) | REG2) & static_cast<glm::uint32>(0x33333333);
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REG1 = ((REG1 >> 2) | REG1) & static_cast<glm::uint32>(0x0F0F0F0F0F0F0F0Full);
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REG1 = ((REG1 >> 2) | REG1) & static_cast<glm::uint32>(0x0F0F0F0F);
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REG2 = ((REG2 >> 2) | REG2) & static_cast<glm::uint32>(0x0F0F0F0F0F0F0F0Full);
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REG2 = ((REG2 >> 2) | REG2) & static_cast<glm::uint32>(0x0F0F0F0F);
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REG1 = ((REG1 >> 4) | REG1) & static_cast<glm::uint32>(0x00FF00FF00FF00FFull);
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REG1 = ((REG1 >> 4) | REG1) & static_cast<glm::uint32>(0x00FF00FF);
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REG2 = ((REG2 >> 4) | REG2) & static_cast<glm::uint32>(0x00FF00FF00FF00FFull);
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REG2 = ((REG2 >> 4) | REG2) & static_cast<glm::uint32>(0x00FF00FF);
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REG1 = ((REG1 >> 8) | REG1) & static_cast<glm::uint32>(0x0000FFFF0000FFFFull);
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REG1 = ((REG1 >> 8) | REG1) & static_cast<glm::uint32>(0x0000FFFF);
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REG2 = ((REG2 >> 8) | REG2) & static_cast<glm::uint32>(0x0000FFFF0000FFFFull);
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REG2 = ((REG2 >> 8) | REG2) & static_cast<glm::uint32>(0x0000FFFF);
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return glm::u16vec2(REG1, REG2);
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return glm::u16vec2(REG1, REG2);
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}
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}
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