Fixed SSE1 code generation

This commit is contained in:
Groove 2018-07-30 23:26:25 +02:00
parent cd58024e40
commit 63aceae081

View File

@ -230,17 +230,19 @@
#define GLM_ARCH_SIMD_BIT (0x00001000) #define GLM_ARCH_SIMD_BIT (0x00001000)
#define GLM_ARCH_NEON_BIT (0x00000001) #define GLM_ARCH_NEON_BIT (0x00000001)
#define GLM_ARCH_SSE2_BIT (0x00000002) #define GLM_ARCH_SSE_BIT (0x00000002)
#define GLM_ARCH_SSE3_BIT (0x00000004) #define GLM_ARCH_SSE2_BIT (0x00000004)
#define GLM_ARCH_SSSE3_BIT (0x00000008) #define GLM_ARCH_SSE3_BIT (0x00000008)
#define GLM_ARCH_SSE41_BIT (0x00000010) #define GLM_ARCH_SSSE3_BIT (0x00000010)
#define GLM_ARCH_SSE42_BIT (0x00000020) #define GLM_ARCH_SSE41_BIT (0x00000020)
#define GLM_ARCH_AVX_BIT (0x00000040) #define GLM_ARCH_SSE42_BIT (0x00000040)
#define GLM_ARCH_AVX2_BIT (0x00000080) #define GLM_ARCH_AVX_BIT (0x00000080)
#define GLM_ARCH_AVX2_BIT (0x00000100)
#define GLM_ARCH_UNKNOWED (0) #define GLM_ARCH_UNKNOWED (0)
#define GLM_ARCH_X86 (GLM_ARCH_X86_BIT) #define GLM_ARCH_X86 (GLM_ARCH_X86_BIT)
#define GLM_ARCH_SSE2 (GLM_ARCH_SSE2_BIT | GLM_ARCH_SIMD_BIT | GLM_ARCH_X86) #define GLM_ARCH_SSE (GLM_ARCH_SSE_BIT | GLM_ARCH_SIMD_BIT | GLM_ARCH_X86)
#define GLM_ARCH_SSE2 (GLM_ARCH_SSE2_BIT | GLM_ARCH_SSE)
#define GLM_ARCH_SSE3 (GLM_ARCH_SSE3_BIT | GLM_ARCH_SSE2) #define GLM_ARCH_SSE3 (GLM_ARCH_SSE3_BIT | GLM_ARCH_SSE2)
#define GLM_ARCH_SSSE3 (GLM_ARCH_SSSE3_BIT | GLM_ARCH_SSE3) #define GLM_ARCH_SSSE3 (GLM_ARCH_SSSE3_BIT | GLM_ARCH_SSE3)
#define GLM_ARCH_SSE41 (GLM_ARCH_SSE41_BIT | GLM_ARCH_SSSE3) #define GLM_ARCH_SSE41 (GLM_ARCH_SSE41_BIT | GLM_ARCH_SSSE3)
@ -280,6 +282,8 @@
# define GLM_ARCH (GLM_ARCH_SSE3) # define GLM_ARCH (GLM_ARCH_SSE3)
#elif defined(GLM_FORCE_SSE2) #elif defined(GLM_FORCE_SSE2)
# define GLM_ARCH (GLM_ARCH_SSE2) # define GLM_ARCH (GLM_ARCH_SSE2)
#elif defined(GLM_FORCE_SSE)
# define GLM_ARCH (GLM_ARCH_SSE)
#else #else
# if defined(__AVX2__) # if defined(__AVX2__)
# define GLM_ARCH (GLM_ARCH_AVX2) # define GLM_ARCH (GLM_ARCH_AVX2)