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More simd/Neon functions
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@ -96,4 +96,71 @@ namespace detail
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}//namespace detail
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}//namespace glm
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#elif GLM_ARCH & GLM_ARCH_NEON_BIT
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namespace glm{
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namespace detail
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{
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template<qualifier Q>
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struct compute_length<4, float, Q, true>
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{
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GLM_FUNC_QUALIFIER static float call(vec<4, float, Q> const& v)
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{
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return compute_dot<vec<4, float, Q>, float, true>::call(v, v);
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}
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};
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template<qualifier Q>
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struct compute_distance<4, float, Q, true>
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{
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GLM_FUNC_QUALIFIER static float call(vec<4, float, Q> const& p0, vec<4, float, Q> const& p1)
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{
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return compute_length<4, float, Q, true>::call(p1 - p0);
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}
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};
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template<qualifier Q>
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struct compute_dot<vec<4, float, Q>, float, true>
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{
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GLM_FUNC_QUALIFIER static float call(vec<4, float, Q> const& x, vec<4, float, Q> const& y)
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{
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#if GLM_ARCH & GLM_ARCH_ARMV8_BIT
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float32x4_t v = vmulq_f32(x.data, y.data);
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v = vpaddq_f32(v, v);
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v = vpaddq_f32(v, v);
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return vgetq_lane_f32(v, 0);
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#else // Armv7a with Neon
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float32x4_t p = vmulq_f32(x.data, y.data);
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float32x2_t v = vpadd_f32(vget_low_f32(p), vget_high_f32(p));
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v = vpadd_f32(v, v);
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return vget_lane_f32(v, 0);
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#endif
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}
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};
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template<qualifier Q>
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struct compute_normalize<4, float, Q, true>
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{
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GLM_FUNC_QUALIFIER static vec<4, float, Q> call(vec<4, float, Q> const& v)
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{
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float32x4_t p = vmulq_f32(v.data, v.data);
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#if GLM_ARCH & GLM_ARCH_ARMV8_BIT
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p = vpaddq_f32(p, p);
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p = vpaddq_f32(p, p);
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#else
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float32x2_t t = vpadd_f32(vget_low_f32(p), vget_high_f32(p));
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t = vpadd_f32(t, t);
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p = vcombine_f32(t, t);
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#endif
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float32x4_t vd = vrsqrteq_f32(p);
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vec<4, float, Q> Result;
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Result.data = vmulq_f32(v, vd);
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return Result;
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}
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};
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}//namespace detail
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}//namespace glm
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#endif//GLM_ARCH & GLM_ARCH_SSE2_BIT
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@ -91,4 +91,41 @@ namespace detail
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# endif
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}//namespace glm
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#elif GLM_ARCH & GLM_ARCH_NEON_BIT
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namespace glm {
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#if GLM_LANG & GLM_LANG_CXX11_FLAG
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template <qualifier Q>
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GLM_FUNC_QUALIFIER
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typename std::enable_if<detail::is_aligned<Q>::value, mat<4, 4, float, Q>>::type
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operator*(mat<4, 4, float, Q> const & m1, mat<4, 4, float, Q> const & m2)
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{
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auto MulRow = [&](int l) {
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float32x4_t const SrcA = m2[l].data;
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#if GLM_ARCH & GLM_ARCH_ARMV8_BIT
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float32x4_t r= vmulq_laneq_f32(m1[0].data, SrcA, 0);
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r = vaddq_f32(r, vmulq_laneq_f32(m1[1].data, SrcA, 1));
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r = vaddq_f32(r, vmulq_laneq_f32(m1[2].data, SrcA, 2));
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r = vaddq_f32(r, vmulq_laneq_f32(m1[3].data, SrcA, 3));
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#else
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float32x4_t r= vmulq_f32(m1[0].data, vdupq_n_f32(vgetq_lane_f32(SrcA, 0)));
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r = vaddq_f32(r, vmulq_f32(m1[1].data, vdupq_n_f32(vgetq_lane_f32(SrcA, 1))));
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r = vaddq_f32(r, vmulq_f32(m1[2].data, vdupq_n_f32(vgetq_lane_f32(SrcA, 2))));
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r = vaddq_f32(r, vmulq_f32(m1[3].data, vdupq_n_f32(vgetq_lane_f32(SrcA, 3))));
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#endif
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return r;
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};
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mat<4, 4, float, aligned_highp> Result;
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Result[0].data = MulRow(0);
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Result[1].data = MulRow(1);
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Result[2].data = MulRow(2);
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Result[3].data = MulRow(3);
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return Result;
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}
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#endif // CXX11
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}//namespace glm
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#endif
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