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Updated documentation

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This commit is contained in:
Christophe Riccio 2015-08-01 22:54:27 +02:00
parent 5437d49cf2
commit bc0f5317fd
5 changed files with 6 additions and 8 deletions
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5
copying.txt
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@ -19,9 +19,8 @@ furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software. all copies or substantial portions of the Software.
Restrictions: Restrictions: By making use of the Software for military purposes, you choose
By making use of the Software for military purposes, you choose to make a to make a Bunny unhappy.
Bunny unhappy.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

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doc/glm.docx
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doc/glm.pdf
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8
glm/detail/type_vec4.hpp
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@ -53,9 +53,9 @@ namespace detail
typedef T type[4]; typedef T type[4];
}; };
# define GLM_NOT_BUGGY_VC32BITS !(GLM_MODEL == GLM_MODEL_32 && GLM_COMPILER & GLM_COMPILER_VC && GLM_COMPILER < GLM_COMPILER_VC2013) # define GLM_NOT_BUGGY_VC32BITS !(GLM_MODEL == GLM_MODEL_32 && (GLM_COMPILER & GLM_COMPILER_VC) && GLM_COMPILER < GLM_COMPILER_VC2013)
# if GLM_ARCH & GLM_ARCH_SSE2 && GLM_NOT_BUGGY_VC32BITS # if (GLM_ARCH & GLM_ARCH_SSE2) && GLM_NOT_BUGGY_VC32BITS
template <> template <>
struct simd<float> struct simd<float>
{ {
@ -75,7 +75,7 @@ namespace detail
}; };
# endif # endif
# if GLM_ARCH & GLM_ARCH_AVX && GLM_NOT_BUGGY_VC32BITS # if (GLM_ARCH & GLM_ARCH_AVX) && GLM_NOT_BUGGY_VC32BITS
template <> template <>
struct simd<double> struct simd<double>
{ {
@ -83,7 +83,7 @@ namespace detail
}; };
# endif # endif
# if GLM_ARCH & GLM_ARCH_AVX2 && GLM_NOT_BUGGY_VC32BITS # if (GLM_ARCH & GLM_ARCH_AVX2) && GLM_NOT_BUGGY_VC32BITS
template <> template <>
struct simd<int64> struct simd<int64>
{ {

1
test/core/core_type_vec4.cpp
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@ -29,7 +29,6 @@
/// @author Christophe Riccio /// @author Christophe Riccio
/////////////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////////////
//#define GLM_FORCE_AVX2
#if !(GLM_COMPILER & GLM_COMPILER_GCC) #if !(GLM_COMPILER & GLM_COMPILER_GCC)
# define GLM_META_PROG_HELPERS # define GLM_META_PROG_HELPERS
#endif #endif