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Fixed GCC and clang build
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@ -396,7 +396,7 @@ namespace bitfieldInterleave
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__m128i Result;
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_mm_store_si128(&Result, Reg1);
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return Result.m128i_u64[0];
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return *reinterpret_cast<glm::uint64*>(&Result);
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}
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inline glm::uint64 sseUnalignedBitfieldInterleave(glm::uint32 x, glm::uint32 y)
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@ -450,10 +450,10 @@ namespace bitfieldInterleave
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Reg2 = _mm_slli_epi32(Reg1, 1);
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Reg2 = _mm_srli_si128(Reg2, 8);
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Reg1 = _mm_or_si128(Reg1, Reg2);
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__m128i Result;
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_mm_store_si128(&Result, Reg1);
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return Result.m128i_u64[0];
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return *reinterpret_cast<glm::uint64*>(&Result);
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}
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#endif//GLM_ARCH & GLM_ARCH_SSE2_BIT
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