diff --git a/server/TracySourceView.cpp b/server/TracySourceView.cpp
index 9e2f94aa..0b0eebb4 100644
--- a/server/TracySourceView.cpp
+++ b/server/TracySourceView.cpp
@@ -33,28 +33,28 @@ struct MicroArchUx
 };
 
 static constexpr MicroArchUx s_uArchUx[] = {
-    { "Conroe", "Core 2 Duo E6750", "CON" },
-    { "Wolfdale", "Core 2 Duo E8400", "WOL" },
-    { "Nehalem", "Core i5-750", "NHM" },
-    { "Westmere", "Core i5-650", "WSM" },
-    { "Sandy Bridge", "Core i7-2600", "SNB" },
-    { "Ivy Bridge", "Core i5-3470", "IVB" },
-    { "Haswell", "Xeon E3-1225 v3", "HSW" },
-    { "Broadwell", "Core i5-5200U", "BDW" },
-    { "Skylake", "Core i7-6500U", "SKL" },
-    { "Skylake-X", "Core i9-7900X", "SKX" },
-    { "Kaby Lake", "Core i7-7700", "KBL" },
-    { "Coffee Lake", "Core i7-8700K", "CFL" },
-    { "Cannon Lake", "Core i3-8121U", "CNL" },
+    { "AMD Zen 3", "Ryzen 5 5600X", "ZEN3" },
+    { "AMD Zen 2", "Ryzen 7 3700X", "ZEN2" },
+    { "AMD Zen+", "Ryzen 5 2600", "ZEN+" },
+    { "Alder Lake P", "Core i5-12600K", "ADL-P" },
+    { "Alder Lake E", "Core i5-12600K", "ADL-E" },
+    { "Rocket Lake", "Core i9-11900", "RKL" },
+    { "Tiger Lake", "Core i7-1165G7", "TGL" },
     { "Ice Lake", "Core i5-1035G1", "ICL" },
     { "Cascade Lake", "Core i9-10980XE", "CLX" },
-    { "Tiger Lake", "Core i7-1165G7", "TGL" },
-    { "Rocket Lake", "Core i9-11900", "RKL" },
-    { "Alder Lake P", "", "ADL-P" },
-    { "Alder Lake E", "", "ADL-E" },
-    { "AMD Zen+", "Ryzen 5 2600", "ZEN+" },
-    { "AMD Zen 2", "Ryzen 7 3700X", "ZEN2" },
-    { "AMD Zen 3", "Ryzen 5 5600X", "ZEN3" },
+    { "Cannon Lake", "Core i3-8121U", "CNL" },
+    { "Coffee Lake", "Core i7-8700K", "CFL" },
+    { "Kaby Lake", "Core i7-7700", "KBL" },
+    { "Skylake-X", "Core i9-7900X", "SKX" },
+    { "Skylake", "Core i7-6500U", "SKL" },
+    { "Broadwell", "Core i5-5200U", "BDW" },
+    { "Haswell", "Xeon E3-1225 v3", "HSW" },
+    { "Ivy Bridge", "Core i5-3470", "IVB" },
+    { "Sandy Bridge", "Core i7-2600", "SNB" },
+    { "Westmere", "Core i5-650", "WSM" },
+    { "Nehalem", "Core i5-750", "NHM" },
+    { "Wolfdale", "Core 2 Duo E8400", "WOL" },
+    { "Conroe", "Core 2 Duo E6750", "CON" },
 };
 
 static constexpr const char* s_regNameX86[] = {