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Reorder uarch list. Push old ones to the bottom.
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@ -33,28 +33,28 @@ struct MicroArchUx
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};
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static constexpr MicroArchUx s_uArchUx[] = {
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{ "Conroe", "Core 2 Duo E6750", "CON" },
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{ "Wolfdale", "Core 2 Duo E8400", "WOL" },
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{ "Nehalem", "Core i5-750", "NHM" },
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{ "Westmere", "Core i5-650", "WSM" },
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{ "Sandy Bridge", "Core i7-2600", "SNB" },
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{ "Ivy Bridge", "Core i5-3470", "IVB" },
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{ "Haswell", "Xeon E3-1225 v3", "HSW" },
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{ "Broadwell", "Core i5-5200U", "BDW" },
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{ "Skylake", "Core i7-6500U", "SKL" },
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{ "Skylake-X", "Core i9-7900X", "SKX" },
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{ "Kaby Lake", "Core i7-7700", "KBL" },
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{ "Coffee Lake", "Core i7-8700K", "CFL" },
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{ "Cannon Lake", "Core i3-8121U", "CNL" },
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{ "AMD Zen 3", "Ryzen 5 5600X", "ZEN3" },
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{ "AMD Zen 2", "Ryzen 7 3700X", "ZEN2" },
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{ "AMD Zen+", "Ryzen 5 2600", "ZEN+" },
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{ "Alder Lake P", "Core i5-12600K", "ADL-P" },
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{ "Alder Lake E", "Core i5-12600K", "ADL-E" },
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{ "Rocket Lake", "Core i9-11900", "RKL" },
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{ "Tiger Lake", "Core i7-1165G7", "TGL" },
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{ "Ice Lake", "Core i5-1035G1", "ICL" },
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{ "Cascade Lake", "Core i9-10980XE", "CLX" },
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{ "Tiger Lake", "Core i7-1165G7", "TGL" },
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{ "Rocket Lake", "Core i9-11900", "RKL" },
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{ "Alder Lake P", "", "ADL-P" },
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{ "Alder Lake E", "", "ADL-E" },
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{ "AMD Zen+", "Ryzen 5 2600", "ZEN+" },
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{ "AMD Zen 2", "Ryzen 7 3700X", "ZEN2" },
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{ "AMD Zen 3", "Ryzen 5 5600X", "ZEN3" },
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{ "Cannon Lake", "Core i3-8121U", "CNL" },
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{ "Coffee Lake", "Core i7-8700K", "CFL" },
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{ "Kaby Lake", "Core i7-7700", "KBL" },
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{ "Skylake-X", "Core i9-7900X", "SKX" },
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{ "Skylake", "Core i7-6500U", "SKL" },
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{ "Broadwell", "Core i5-5200U", "BDW" },
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{ "Haswell", "Xeon E3-1225 v3", "HSW" },
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{ "Ivy Bridge", "Core i5-3470", "IVB" },
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{ "Sandy Bridge", "Core i7-2600", "SNB" },
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{ "Westmere", "Core i5-650", "WSM" },
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{ "Nehalem", "Core i5-750", "NHM" },
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{ "Wolfdale", "Core 2 Duo E8400", "WOL" },
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{ "Conroe", "Core 2 Duo E6750", "CON" },
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};
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static constexpr const char* s_regNameX86[] = {
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