mirror/tracy
1
0
Fork 0
mirror of https://github.com/wolfpld/tracy.git synced 2024-11-22 14:44:34 +00:00
Code Issues Packages Projects Releases Wiki Activity

Implement inline function aggregation.

Browse Source
This commit is contained in:
Bartosz Taudul 2024-03-13 19:04:34 +01:00
parent f04cdb7782
commit 3af5c7b331
No known key found for this signature in database
GPG Key ID: B7FE2008B7575DF3
1 changed files with 63 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

70
server/TracyView_Samples.cpp
View File

@ -424,18 +424,74 @@ void View::DrawSamplesStatistics( Vector<SymList>& data, int64_t timeRange, Accu
assert( inSym != nullptr ); assert( inSym != nullptr );
const auto symEnd = v.symAddr + symlen; const auto symEnd = v.symAddr + symlen;
Vector<SymList> inSymList; Vector<SymList> inSymList;
while( *inSym < symEnd ) if( !m_mergeInlines )
{ {
auto sit = inlineMap.find( *inSym ); while( *inSym < symEnd )
if( sit != inlineMap.end() )
{ {
inSymList.push_back( SymList { *inSym, sit->second.incl, sit->second.excl } ); auto sit = inlineMap.find( *inSym );
if( sit != inlineMap.end() )
{
inSymList.push_back( SymList { *inSym, sit->second.incl, sit->second.excl } );
}
else
{
inSymList.push_back( SymList { *inSym, 0, 0 } );
}
inSym++;
} }
else }
else
{
unordered_flat_map<uint32_t, uint64_t> mergeMap;
unordered_flat_map<uint64_t, SymList> outMap;
while( *inSym < symEnd )
{ {
inSymList.push_back( SymList { *inSym, 0, 0 } ); auto symAddr = *inSym;
auto sit = inlineMap.find( symAddr );
auto sym = symMap.find( symAddr );
assert( sym != symMap.end() );
auto mit = mergeMap.find( sym->second.name.Idx() );
if( mit == mergeMap.end() )
{
mergeMap.emplace( sym->second.name.Idx(), symAddr );
}
else
{
symAddr = mit->second;
}
if( sit != inlineMap.end() )
{
auto oit = outMap.find( symAddr );
if( oit == outMap.end() )
{
outMap.emplace( symAddr, SymList { symAddr, sit->second.incl, sit->second.excl, 1 } );
}
else
{
oit->second.incl += sit->second.incl;
oit->second.excl += sit->second.excl;
oit->second.count++;
}
}
else
{
auto oit = outMap.find( symAddr );
if( oit == outMap.end() )
{
outMap.emplace( symAddr, SymList { symAddr, 0, 0, 1 } );
}
else
{
oit->second.count++;
}
}
inSym++;
}
inSymList.reserve( outMap.size() );
for( auto& v : outMap )
{
inSymList.push_back( v.second );
} }
inSym++;
} }
auto statIt = inlineMap.find( v.symAddr ); auto statIt = inlineMap.find( v.symAddr );
if( statIt != inlineMap.end() ) if( statIt != inlineMap.end() )