Properly separate HW timer from MSVC rdtscp optimization.

This commit is contained in:
Bartosz Taudul 2018-04-27 19:40:47 +02:00
parent 488d05bc21
commit 5b6d9769af
4 changed files with 14 additions and 9 deletions

View File

@ -145,7 +145,7 @@ static inline int LuaZoneBegin( lua_State* L )
auto& tail = token->get_tail_index();
auto item = token->enqueue_begin<moodycamel::CanAlloc>( magic );
MemWrite( &item->hdr.type, QueueType::ZoneBeginAllocSrcLoc );
#ifdef TRACY_HW_TIMER
#ifdef TRACY_RDTSCP_OPT
MemWrite( &item->zoneBegin.time, Profiler::GetTime( item->zoneBegin.cpu ) );
#else
uint32_t cpu;
@ -196,7 +196,7 @@ static inline int LuaZoneBeginN( lua_State* L )
auto& tail = token->get_tail_index();
auto item = token->enqueue_begin<moodycamel::CanAlloc>( magic );
MemWrite( &item->hdr.type, QueueType::ZoneBeginAllocSrcLoc );
#ifdef TRACY_HW_TIMER
#ifdef TRACY_RDTSCP_OPT
MemWrite( &item->zoneBegin.time, Profiler::GetTime( item->zoneBegin.cpu ) );
#else
uint32_t cpu;
@ -216,7 +216,7 @@ static inline int LuaZoneEnd( lua_State* L )
auto& tail = token->get_tail_index();
auto item = token->enqueue_begin<moodycamel::CanAlloc>( magic );
MemWrite( &item->hdr.type, QueueType::ZoneEnd );
#ifdef TRACY_HW_TIMER
#ifdef TRACY_RDTSCP_OPT
MemWrite( &item->zoneEnd.time, Profiler::GetTime( item->zoneEnd.cpu ) );
#else
uint32_t cpu;

View File

@ -620,7 +620,7 @@ void Profiler::CalibrateDelay()
auto item = ptoken->enqueue_begin<moodycamel::CanAlloc>( magic );
MemWrite( &item->hdr.type, QueueType::ZoneBegin );
MemWrite( &item->zoneBegin.thread, GetThreadHandle() );
#ifdef TRACY_HW_TIMER
#ifdef TRACY_RDTSCP_OPT
MemWrite( &item->zoneBegin.time, Profiler::GetTime( item->zoneBegin.cpu ) );
#else
uint32_t cpu;
@ -636,7 +636,7 @@ void Profiler::CalibrateDelay()
auto item = ptoken->enqueue_begin<moodycamel::CanAlloc>( magic );
MemWrite( &item->hdr.type, QueueType::ZoneEnd );
MemWrite( &item->zoneEnd.thread, uint64_t( 0 ) );
#ifdef TRACY_HW_TIMER
#ifdef TRACY_RDTSCP_OPT
MemWrite( &item->zoneEnd.time, GetTime( item->zoneEnd.cpu ) );
#else
uint32_t cpu;
@ -662,7 +662,7 @@ void Profiler::CalibrateDelay()
auto item = ptoken->enqueue_begin<moodycamel::CanAlloc>( magic );
MemWrite( &item->hdr.type, QueueType::ZoneBegin );
MemWrite( &item->zoneBegin.thread, GetThreadHandle() );
#ifdef TRACY_HW_TIMER
#ifdef TRACY_RDTSCP_OPT
MemWrite( &item->zoneBegin.time, Profiler::GetTime( item->zoneBegin.cpu ) );
#else
uint32_t cpu;
@ -678,7 +678,7 @@ void Profiler::CalibrateDelay()
auto item = ptoken->enqueue_begin<moodycamel::CanAlloc>( magic );
MemWrite( &item->hdr.type, QueueType::ZoneEnd );
MemWrite( &item->zoneEnd.thread, uint64_t( 0 ) );
#ifdef TRACY_HW_TIMER
#ifdef TRACY_RDTSCP_OPT
MemWrite( &item->zoneEnd.time, GetTime( item->zoneEnd.cpu ) );
#else
uint32_t cpu;

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@ -21,6 +21,11 @@
#if defined _MSC_VER || defined __CYGWIN__ || ( ( defined __i386 || defined _M_IX86 || defined __x86_64__ || defined _M_X64 ) && !defined __ANDROID__ ) || __ARM_ARCH >= 6
# define TRACY_HW_TIMER
# if defined _MSC_VER || defined __CYGWIN__
// Enable optimization for MSVC __rdtscp() intrin, saving one LHS of a cpu value on the stack.
// This comes at the cost of an unaligned memory write.
# define TRACY_RDTSCP_OPT
# endif
#endif
namespace tracy

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@ -24,7 +24,7 @@ public:
auto& tail = token->get_tail_index();
auto item = token->enqueue_begin<moodycamel::CanAlloc>( magic );
MemWrite( &item->hdr.type, QueueType::ZoneBegin );
#ifdef TRACY_HW_TIMER
#ifdef TRACY_RDTSCP_OPT
MemWrite( &item->zoneBegin.time, Profiler::GetTime( item->zoneBegin.cpu ) );
#else
uint32_t cpu;
@ -43,7 +43,7 @@ public:
auto& tail = token->get_tail_index();
auto item = token->enqueue_begin<moodycamel::CanAlloc>( magic );
MemWrite( &item->hdr.type, QueueType::ZoneEnd );
#ifdef TRACY_HW_TIMER
#ifdef TRACY_RDTSCP_OPT
MemWrite( &item->zoneEnd.time, Profiler::GetTime( item->zoneEnd.cpu ) );
#else
uint32_t cpu;