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synced 2024-11-30 01:04:36 +00:00
Don't require time to be available for samples.
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parent
051b1ba8f5
commit
74e2a63516
@ -928,20 +928,6 @@ static void SetupSampling( int64_t& samplingPeriod )
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InitRpmalloc();
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InitRpmalloc();
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sched_param sp = { 5 };
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sched_param sp = { 5 };
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pthread_setschedparam( pthread_self(), SCHED_FIFO, &sp );
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pthread_setschedparam( pthread_self(), SCHED_FIFO, &sp );
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#if defined TRACY_HW_TIMER && ( defined __i386 || defined _M_IX86 || defined __x86_64__ || defined _M_X64 )
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for( int i=0; i<s_numBuffers; i++ )
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{
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if( s_ring[i].GetId() == EventCallstack && !s_ring[i].CheckTscCaps() )
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{
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for( int j=0; j<s_numBuffers; j++ ) s_ring[j].~RingBuffer<RingBufSize>();
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tracy_free_fast( s_ring );
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const char* err = "Tracy Profiler: sampling is disabled due to non-native scheduler clock. Are you running under a VM?";
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TracyDebug( err );
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Profiler::MessageAppInfo( err, strlen( err ) );
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return;
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}
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}
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#endif
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for( int i=0; i<s_numBuffers; i++ ) s_ring[i].Enable();
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for( int i=0; i<s_numBuffers; i++ ) s_ring[i].Enable();
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for(;;)
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for(;;)
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{
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{
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@ -990,9 +976,7 @@ static void SetupSampling( int64_t& samplingPeriod )
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{
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{
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#if defined TRACY_HW_TIMER && ( defined __i386 || defined _M_IX86 || defined __x86_64__ || defined _M_X64 )
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#if defined TRACY_HW_TIMER && ( defined __i386 || defined _M_IX86 || defined __x86_64__ || defined _M_X64 )
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t0 = ring.ConvertTimeToTsc( t0 );
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t0 = ring.ConvertTimeToTsc( t0 );
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if( t0 != 0 )
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#endif
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#endif
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{
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auto trace = (uint64_t*)tracy_malloc_fast( ( 1 + cnt ) * sizeof( uint64_t ) );
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auto trace = (uint64_t*)tracy_malloc_fast( ( 1 + cnt ) * sizeof( uint64_t ) );
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ring.Read( trace+1, offset, sizeof( uint64_t ) * cnt );
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ring.Read( trace+1, offset, sizeof( uint64_t ) * cnt );
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@ -1033,7 +1017,6 @@ static void SetupSampling( int64_t& samplingPeriod )
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TracyLfqCommit;
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TracyLfqCommit;
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}
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}
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}
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}
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}
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else
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else
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{
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{
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// Layout:
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// Layout:
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@ -1047,9 +1030,7 @@ static void SetupSampling( int64_t& samplingPeriod )
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#if defined TRACY_HW_TIMER && ( defined __i386 || defined _M_IX86 || defined __x86_64__ || defined _M_X64 )
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#if defined TRACY_HW_TIMER && ( defined __i386 || defined _M_IX86 || defined __x86_64__ || defined _M_X64 )
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t0 = ring.ConvertTimeToTsc( t0 );
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t0 = ring.ConvertTimeToTsc( t0 );
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if( t0 != 0 )
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#endif
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#endif
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{
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QueueType type;
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QueueType type;
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switch( id )
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switch( id )
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{
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{
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@ -1082,7 +1063,6 @@ static void SetupSampling( int64_t& samplingPeriod )
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TracyLfqCommit;
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TracyLfqCommit;
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}
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}
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}
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}
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}
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pos += hdr.size;
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pos += hdr.size;
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}
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}
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assert( pos == end );
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assert( pos == end );
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