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Add some more ARM cpu ids.
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be2ffb2023
commit
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@ -14,6 +14,7 @@ static const char* DecodeArmImplementer( uint32_t v )
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case 0x44: return "DEC";
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case 0x46: return "Fujitsu";
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case 0x48: return "HiSilicon";
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case 0x49: return "Infineon";
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case 0x4d: return "Motorola";
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case 0x4e: return "Nvidia";
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case 0x50: return "Applied Micro";
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@ -25,6 +26,7 @@ static const char* DecodeArmImplementer( uint32_t v )
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case 0x66: return "Faraday";
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case 0x68: return "HXT";
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case 0x69: return "Intel";
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case 0xc0: return "Ampere Computing";
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default: break;
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}
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sprintf( buf, "0x%x", v );
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@ -73,6 +75,7 @@ static const char* DecodeArmPart( uint32_t impl, uint32_t part )
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case 0xc60: return " Cortex-M0+";
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case 0xd00: return " AArch64 simulator";
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case 0xd01: return " Cortex-A32";
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case 0xd02: return " Cortex-A34";
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case 0xd03: return " Cortex-A53";
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case 0xd04: return " Cortex-A35";
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case 0xd05: return " Cortex-A55";
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@ -89,6 +92,10 @@ static const char* DecodeArmPart( uint32_t impl, uint32_t part )
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case 0xd13: return " Cortex-R52";
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case 0xd20: return " Cortex-M23";
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case 0xd21: return " Cortex-M33";
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case 0xd40: return " Zeus";
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case 0xd41: return " Cortex-A78";
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case 0xd43: return " Cortex-A65AE";
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case 0xd44: return " Cortex-X1";
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case 0xd4a: return " Neoverse E1";
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default: break;
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}
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@ -108,6 +115,13 @@ static const char* DecodeArmPart( uint32_t impl, uint32_t part )
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case 0xa2: return " ThunderX 81XX";
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case 0xa3: return " ThunderX 83XX";
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case 0xaf: return " ThunderX2 99xx";
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case 0xb0: return " OcteonTX2";
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case 0xb1: return " OcteonTX2 T98";
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case 0xb2: return " OcteonTX2 T96";
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case 0xb3: return " OcteonTX2 F95";
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case 0xb4: return " OcteonTX2 F95N";
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case 0xb5: return " OcteonTX2 F95MM";
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case 0xb8: return " ThunderX3 T110";
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default: break;
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}
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case 0x44:
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