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Ditto on ARM.
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@ -338,15 +338,7 @@ static tracy_force_inline uint64_t ProcessRGB( const uint8_t* src )
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uint32_t vp;
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vst1_lane_u32( &vp, vreinterpret_u32_u8( p.val[0] ), 0 );
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uint32_t data = 0;
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for( int i=0; i<4; i++ )
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{
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uint8_t idx = IndexTableSIMD[vp & 0xFF];
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vp >>= 8;
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data |= idx << (i*8);
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}
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return uint64_t( ( uint64_t( to565( minr, ming, minb ) ) << 16 ) | to565( maxr, maxg, maxb ) | ( uint64_t( data ) << 32 ) );
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return uint64_t( ( uint64_t( to565( minr, ming, minb ) ) << 16 ) | to565( maxr, maxg, maxb ) | ( uint64_t( vp ) << 32 ) );
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# else
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uint32x4_t px0 = vld1q_u32( (uint32_t*)src );
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uint32x4_t px1 = vld1q_u32( (uint32_t*)src + 4 );
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@ -372,7 +364,7 @@ static tracy_force_inline uint64_t ProcessRGB( const uint8_t* src )
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if( sm[0] == -1 && sm[1] == -1 )
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{
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return to565( src[0], src[1], src[2] );
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return uint64_t( to565( src[0], src[1], src[2] ) ) << 16;
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}
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uint8x16_t l0 = vreinterpretq_u8_u32( px0 );
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@ -454,15 +446,7 @@ static tracy_force_inline uint64_t ProcessRGB( const uint8_t* src )
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vst1q_lane_u32( &vmax, vreinterpretq_u32_u8( max ), 0 );
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vst1_lane_u32( &vp, vreinterpret_u32_u8( p.val[0] ), 0 );
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uint32_t data = 0;
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for( int i=0; i<4; i++ )
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{
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uint8_t idx = IndexTableSIMD[vp & 0xFF];
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vp >>= 8;
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data |= idx << (i*8);
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}
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return uint64_t( ( uint64_t( to565( vmin ) ) << 16 ) | to565( vmax ) | ( uint64_t( data ) << 32 ) );
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return uint64_t( ( uint64_t( to565( vmin ) ) << 16 ) | to565( vmax ) | ( uint64_t( vp ) << 32 ) );
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# endif
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#else
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const auto ref = to565( src[0], src[1], src[2] );
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