40 Commits

Author	SHA1	Message	Date
Bartosz Taudul	0b82902618	Optimize scalar DXT1 compression.	2020-02-15 13:43:40 +01:00
Bartosz Taudul	4ef2ce4622	Fix _mm256_cvtsi256_si32 on gcc.	2019-12-12 02:13:12 +01:00
Bartosz Taudul	37661fd2ee	Fix 32 bit NEON version of DXT1 compression. ... This reverts commit b32e8fa24e. Apparently it is possible to receive non-uniform data in alpha channel, which breaks the original assumption about not needing the mask. This seemed to be a problem only on 32 bit NEON implementation of DXT1 compression. Other implementations handle such data without degradation of visual output.	2019-09-03 21:37:07 +02:00
Bartosz Taudul	36de7b2cc7	Fix incomplete headers.	2019-07-25 23:41:42 +02:00
Bartosz Taudul	092e830264	Use shifts instead of const vector and.	2019-07-22 19:56:47 +02:00
Bartosz Taudul	178dc9eba7	Combine block data directly in AVX registers.	2019-07-20 14:52:34 +02:00
Bartosz Taudul	a6300ef7d1	Ditto on ARM.	2019-07-19 22:13:56 +02:00
Bartosz Taudul	dc49f2f76a	Move DXT1 index conversion to server.	2019-07-19 21:46:58 +02:00
Bartosz Taudul	cef8124247	Replace or with addition to enable usra instruction.	2019-07-19 01:40:27 +02:00
Bartosz Taudul	fd4689a6e2	Don't perform unnecessary ands.	2019-07-19 01:19:52 +02:00
Bartosz Taudul	f65373ece7	Replace two packs with one shuffle.	2019-07-13 20:01:12 +02:00
Bartosz Taudul	fc83f97ad3	Same for AVX/SSE.	2019-07-13 19:34:08 +02:00
Bartosz Taudul	62a167541c	No need to mask out indices.	2019-07-13 19:07:25 +02:00
Bartosz Taudul	7bb9549e84	ARM64 specific NEON implementation of DXT1 compression.	2019-07-13 14:31:33 +02:00
Bartosz Taudul	c0670848d2	Reuse variable.	2019-07-08 02:08:06 +02:00
Bartosz Taudul	17dbbe67de	Remove dependency on range subtraction.	2019-07-08 00:14:36 +02:00
Bartosz Taudul	af1bd3e1fa	Faster horizontal add.	2019-07-07 23:57:23 +02:00
Bartosz Taudul	b32e8fa24e	Ditto for NEON.	2019-07-06 00:18:53 +02:00
Bartosz Taudul	d236d4b70f	Ditto for AVX2.	2019-07-06 00:05:32 +02:00
Bartosz Taudul	f62b21c21d	Masking alpha out is not needed. ... We assume that alpha value is constant for the whole image. The range calculation is max - min, so alpha zeroes out. The color normalization to range is color - min, so alpha also zeroes out here.	2019-07-05 23:58:19 +02:00
Bartosz Taudul	03189a30b8	Two ands less in NEON DXT1 compression.	2019-07-05 18:37:25 +02:00
Bartosz Taudul	275d992cb1	Two ands less in AVX2 DXT1 compression.	2019-07-05 18:22:42 +02:00
Bartosz Taudul	c89358d6b9	Two ands less in SSE DXT1 compression.	2019-07-05 18:17:50 +02:00
Bartosz Taudul	bdfb568742	Fix div tables for max range on all channels.	2019-07-01 12:31:06 +02:00
Bartosz Taudul	684a119a2c	Fix order of checks for including intrinsics.	2019-07-01 11:45:16 +02:00
Bartosz Taudul	983c48994b	Write block data directly to memory.	2019-06-30 11:44:32 +02:00
Bartosz Taudul	9b8c18f99e	Improve readability.	2019-06-30 11:44:00 +02:00
Bartosz Taudul	52b6bdb55a	Force inline ProcessRGB functions.	2019-06-30 03:33:14 +02:00
Bartosz Taudul	8c06f7288c	AVX2 DXT1 compression.	2019-06-30 03:20:58 +02:00
Bartosz Taudul	2e893bba91	Use division tables.	2019-06-29 12:16:49 +02:00
Bartosz Taudul	ab9f036f5e	Integrate CheckSolid into ProcessRGB.	2019-06-29 02:04:08 +02:00
Bartosz Taudul	faf6bb97a4	DXT1 NEON color index packing.	2019-06-28 22:36:44 +02:00
Bartosz Taudul	2df1eaaa7e	Pack color indices using SSE.	2019-06-28 21:58:10 +02:00
Bartosz Taudul	fcb5b4b888	NEON DXT1 compression.	2019-06-28 14:24:16 +02:00
Bartosz Taudul	e8d4ba492b	Unify shifts.	2019-06-28 13:05:32 +02:00
Bartosz Taudul	be4900c822	NEON CheckSolid.	2019-06-28 01:47:04 +02:00
Bartosz Taudul	3c066f1527	Simplify code.	2019-06-27 22:40:03 +02:00
Bartosz Taudul	72a0d4c2ab	Rest of SSE DXTC compression.	2019-06-27 22:29:44 +02:00
Bartosz Taudul	137b28e110	SSE CheckSolid.	2019-06-27 22:29:44 +02:00
Bartosz Taudul	1939c31165	Experimental DXT1 compressor.	2019-06-27 19:14:51 +02:00