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f9adee2f6b · [AMDGPU] asyncmark support for ASYNC_CNT (#185813) · Updated 2026-04-06 21:53:09 -04:00

Branches

2d5441cc1f · [AArch64][SME] Avoid ZA save state changes in loops in MachineSMEABIPass · Updated 2025-08-20 09:28:16 -04:00    shylie

26356
5

ea77b25e78 · Fixup checks · Updated 2025-08-20 09:24:43 -04:00    shylie

26356
4

142af7d225 · Update comment · Updated 2025-08-20 09:13:00 -04:00    shylie

26356
2

8375c79afe · [LoongArch][NFC] Add tests for build_vector containing repeated sub-sequence · Updated 2025-08-20 08:33:44 -04:00    shylie

26527
1

b9a7958311 · Add docs · Updated 2025-08-20 08:01:54 -04:00    shylie

26413
2

2e04a5b9a6 · update · Updated 2025-08-20 06:39:37 -04:00    shylie

26381
3

f594b23678 · AMDGPU: Replace copy-to-mov-imm folding logic with class compat checks · Updated 2025-08-20 05:57:15 -04:00    shylie

26397
1

cae47329ff · Using S_MOV_B64_IMM_PSEUDO instead of dealing with legality concerns. · Updated 2025-08-20 04:27:34 -04:00    shylie

27303
3

4d5983233f · [flang][openmp] Add Lowering to omp mlir for workdistribute construct · Updated 2025-08-20 02:57:23 -04:00    shylie

26486
4

f53da4fa4f · Add missing workdistribute directives · Updated 2025-08-20 02:56:11 -04:00    shylie

26486
2

8353fe0d0a · remove Loc · Updated 2025-08-19 19:38:47 -04:00    shylie

26914
12

7c9b47e303 · [AMDGPU] Fold copies of constant physical registers into their uses · Updated 2025-08-19 16:20:33 -04:00    shylie

26456
1

59cd1847a7 · Fix case where nested loops share latch · Updated 2025-08-19 15:25:39 -04:00    shylie

26695
22

53257acd6f · [CIR] Implement codegen for inline assembly with output operands · Updated 2025-08-19 11:02:23 -04:00    shylie

26499
1

fa5312a0ce · [LifetimeSafety] Track gsl::Pointer types · Updated 2025-08-19 10:18:36 -04:00    shylie

26522
3

5c910deae1 · Identify DeclRefExpr as a use of an origin · Updated 2025-08-19 09:03:37 -04:00    shylie

26522
2

440c3fe403 · [LifetimeSafety] Track view types/gsl::Pointer. · Updated 2025-08-19 08:12:24 -04:00    shylie

26522
1

7332d9a555 · [MLIR][DialectConversion] Export isOpIgnored in ConversionPatternRewriter · Updated 2025-08-19 05:30:50 -04:00    shylie

26539
1

c174035432 · [SelectionDAG] Deal with POISON for INSERT_VECTOR_ELT/INSERT_SUBVECTOR · Updated 2025-08-19 04:04:26 -04:00    shylie

26557
1

67eb146af0 · ARM: Remove remaining half convert libcall config into tablegen · Updated 2025-08-19 02:16:43 -04:00    shylie

26566
1