[TTI] Add cost kind to getAddressComputationCost(). NFC. (#153342)
This patch add cost kind to `getAddressComputationCost()` for #149955. Note that this patch also remove all the default value in `getAddressComputationCost()`.
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@ -1681,8 +1681,8 @@ public:
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/// was used in order to get the Ptr step value. \p Ptr holds the SCEV of the
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/// access pointer.
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LLVM_ABI InstructionCost
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getAddressComputationCost(Type *PtrTy, ScalarEvolution *SE = nullptr,
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const SCEV *Ptr = nullptr) const;
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getAddressComputationCost(Type *PtrTy, ScalarEvolution *SE, const SCEV *Ptr,
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TTI::TargetCostKind CostKind) const;
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/// \returns The cost, if any, of keeping values of the given types alive
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/// over a callsite.
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@ -939,7 +939,8 @@ public:
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virtual InstructionCost getAddressComputationCost(Type *PtrTy,
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ScalarEvolution *,
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const SCEV *) const {
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const SCEV *,
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TTI::TargetCostKind) const {
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return 0;
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}
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@ -3026,8 +3026,9 @@ public:
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return LT.first.getValue();
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}
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InstructionCost getAddressComputationCost(Type *PtrTy, ScalarEvolution *,
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const SCEV *) const override {
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InstructionCost
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getAddressComputationCost(Type *PtrTy, ScalarEvolution *, const SCEV *,
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TTI::TargetCostKind) const override {
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return 0;
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}
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@ -1230,10 +1230,11 @@ unsigned TargetTransformInfo::getNumberOfParts(Type *Tp) const {
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return TTIImpl->getNumberOfParts(Tp);
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}
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InstructionCost
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TargetTransformInfo::getAddressComputationCost(Type *PtrTy, ScalarEvolution *SE,
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const SCEV *Ptr) const {
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InstructionCost Cost = TTIImpl->getAddressComputationCost(PtrTy, SE, Ptr);
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InstructionCost TargetTransformInfo::getAddressComputationCost(
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Type *PtrTy, ScalarEvolution *SE, const SCEV *Ptr,
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TTI::TargetCostKind CostKind) const {
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InstructionCost Cost =
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TTIImpl->getAddressComputationCost(PtrTy, SE, Ptr, CostKind);
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assert(Cost >= 0 && "TTI should not produce negative costs!");
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return Cost;
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}
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@ -4337,7 +4337,8 @@ InstructionCost AArch64TTIImpl::getArithmeticInstrCost(
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InstructionCost
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AArch64TTIImpl::getAddressComputationCost(Type *PtrTy, ScalarEvolution *SE,
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const SCEV *Ptr) const {
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const SCEV *Ptr,
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TTI::TargetCostKind CostKind) const {
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// Address computations in vectorized code with non-consecutive addresses will
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// likely result in more instructions compared to scalar code where the
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// computation can more often be merged into the index mode. The resulting
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@ -238,8 +238,9 @@ public:
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ArrayRef<const Value *> Args = {},
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const Instruction *CxtI = nullptr) const override;
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InstructionCost getAddressComputationCost(Type *PtrTy, ScalarEvolution *SE,
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const SCEV *Ptr) const override;
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InstructionCost
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getAddressComputationCost(Type *PtrTy, ScalarEvolution *SE, const SCEV *Ptr,
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TTI::TargetCostKind CostKind) const override;
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InstructionCost getCmpSelInstrCost(
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unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred,
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@ -1084,9 +1084,10 @@ InstructionCost ARMTTIImpl::getCmpSelInstrCost(
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CostKind, Op1Info, Op2Info, I);
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}
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InstructionCost ARMTTIImpl::getAddressComputationCost(Type *PtrTy,
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ScalarEvolution *SE,
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const SCEV *Ptr) const {
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InstructionCost
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ARMTTIImpl::getAddressComputationCost(Type *PtrTy, ScalarEvolution *SE,
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const SCEV *Ptr,
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TTI::TargetCostKind CostKind) const {
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// Address computations in vectorized code with non-consecutive addresses will
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// likely result in more instructions compared to scalar code where the
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// computation can more often be merged into the index mode. The resulting
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@ -1103,7 +1104,7 @@ InstructionCost ARMTTIImpl::getAddressComputationCost(Type *PtrTy,
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// addressing mode.
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return 1;
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}
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return BaseT::getAddressComputationCost(PtrTy, SE, Ptr);
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return BaseT::getAddressComputationCost(PtrTy, SE, Ptr, CostKind);
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}
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bool ARMTTIImpl::isProfitableLSRChainElement(Instruction *I) const {
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@ -257,8 +257,9 @@ public:
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unsigned Index, const Value *Op0,
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const Value *Op1) const override;
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InstructionCost getAddressComputationCost(Type *Val, ScalarEvolution *SE,
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const SCEV *Ptr) const override;
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InstructionCost
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getAddressComputationCost(Type *Val, ScalarEvolution *SE, const SCEV *Ptr,
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TTI::TargetCostKind CostKind) const override;
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InstructionCost getArithmeticInstrCost(
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unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
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@ -156,9 +156,10 @@ HexagonTTIImpl::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
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return BaseT::getIntrinsicInstrCost(ICA, CostKind);
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}
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InstructionCost HexagonTTIImpl::getAddressComputationCost(Type *PtrTy,
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ScalarEvolution *SE,
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const SCEV *S) const {
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InstructionCost
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HexagonTTIImpl::getAddressComputationCost(Type *PtrTy, ScalarEvolution *SE,
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const SCEV *S,
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TTI::TargetCostKind CostKind) const {
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return 0;
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}
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@ -111,8 +111,9 @@ public:
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InstructionCost
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getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
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TTI::TargetCostKind CostKind) const override;
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InstructionCost getAddressComputationCost(Type *PtrTy, ScalarEvolution *SE,
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const SCEV *S) const override;
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InstructionCost
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getAddressComputationCost(Type *PtrTy, ScalarEvolution *SE, const SCEV *S,
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TTI::TargetCostKind CostKind) const override;
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InstructionCost getMemoryOpCost(
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unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,
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TTI::TargetCostKind CostKind,
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@ -5488,9 +5488,10 @@ InstructionCost X86TTIImpl::getPointersChainCost(
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return BaseT::getPointersChainCost(Ptrs, Base, Info, AccessTy, CostKind);
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}
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InstructionCost X86TTIImpl::getAddressComputationCost(Type *PtrTy,
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ScalarEvolution *SE,
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const SCEV *Ptr) const {
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InstructionCost
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X86TTIImpl::getAddressComputationCost(Type *PtrTy, ScalarEvolution *SE,
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const SCEV *Ptr,
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TTI::TargetCostKind CostKind) const {
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// Address computations in vectorized code with non-consecutive addresses will
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// likely result in more instructions compared to scalar code where the
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// computation can more often be merged into the index mode. The resulting
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@ -5513,7 +5514,7 @@ InstructionCost X86TTIImpl::getAddressComputationCost(Type *PtrTy,
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return 1;
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}
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return BaseT::getAddressComputationCost(PtrTy, SE, Ptr);
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return BaseT::getAddressComputationCost(PtrTy, SE, Ptr, CostKind);
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}
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InstructionCost
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@ -194,8 +194,9 @@ public:
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getPointersChainCost(ArrayRef<const Value *> Ptrs, const Value *Base,
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const TTI::PointersChainInfo &Info, Type *AccessTy,
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TTI::TargetCostKind CostKind) const override;
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InstructionCost getAddressComputationCost(Type *PtrTy, ScalarEvolution *SE,
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const SCEV *Ptr) const override;
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InstructionCost
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getAddressComputationCost(Type *PtrTy, ScalarEvolution *SE, const SCEV *Ptr,
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TTI::TargetCostKind CostKind) const override;
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std::optional<Instruction *>
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instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const override;
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@ -2309,7 +2309,9 @@ chainToBasePointerCost(SmallVectorImpl<Instruction *> &Chain,
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} else if (GetElementPtrInst *GEP = dyn_cast<GetElementPtrInst>(Instr)) {
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// Cost of the address calculation
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Cost += TTI.getAddressComputationCost(GEP->getType());
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Cost += TTI.getAddressComputationCost(
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GEP->getType(), nullptr, nullptr,
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TargetTransformInfo::TCK_SizeAndLatency);
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// And cost of the GEP itself
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// TODO: Use TTI->getGEPCost here (it exists, but appears to be not
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@ -5214,8 +5214,8 @@ LoopVectorizationCostModel::getMemInstScalarizationCost(Instruction *I,
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const SCEV *PtrSCEV = getAddressAccessSCEV(Ptr, Legal, PSE, TheLoop);
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// Get the cost of the scalar memory instruction and address computation.
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InstructionCost Cost =
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VF.getFixedValue() * TTI.getAddressComputationCost(PtrTy, SE, PtrSCEV);
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InstructionCost Cost = VF.getFixedValue() * TTI.getAddressComputationCost(
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PtrTy, SE, PtrSCEV, CostKind);
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// Don't pass *I here, since it is scalar but will actually be part of a
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// vectorized loop where the user of it is a vectorized instruction.
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@ -5291,7 +5291,7 @@ LoopVectorizationCostModel::getUniformMemOpCost(Instruction *I,
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const Align Alignment = getLoadStoreAlignment(I);
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unsigned AS = getLoadStoreAddressSpace(I);
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if (isa<LoadInst>(I)) {
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return TTI.getAddressComputationCost(PtrTy) +
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return TTI.getAddressComputationCost(PtrTy, nullptr, nullptr, CostKind) +
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TTI.getMemoryOpCost(Instruction::Load, ValTy, Alignment, AS,
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CostKind) +
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TTI.getShuffleCost(TargetTransformInfo::SK_Broadcast, VectorTy,
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@ -5304,7 +5304,7 @@ LoopVectorizationCostModel::getUniformMemOpCost(Instruction *I,
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// VF.getKnownMinValue() - 1 from a scalable vector. This does not represent
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// the actual generated code, which involves extracting the last element of
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// a scalable vector where the lane to extract is unknown at compile time.
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return TTI.getAddressComputationCost(PtrTy) +
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return TTI.getAddressComputationCost(PtrTy, nullptr, nullptr, CostKind) +
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TTI.getMemoryOpCost(Instruction::Store, ValTy, Alignment, AS,
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CostKind) +
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(IsLoopInvariantStoreValue
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@ -5322,7 +5322,7 @@ LoopVectorizationCostModel::getGatherScatterCost(Instruction *I,
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const Value *Ptr = getLoadStorePointerOperand(I);
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Type *PtrTy = toVectorTy(Ptr->getType(), VF);
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return TTI.getAddressComputationCost(PtrTy) +
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return TTI.getAddressComputationCost(PtrTy, nullptr, nullptr, CostKind) +
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TTI.getGatherScatterOpCost(I->getOpcode(), VectorTy, Ptr,
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Legal->isMaskRequired(I), Alignment,
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CostKind, I);
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@ -5562,7 +5562,7 @@ LoopVectorizationCostModel::getMemoryInstructionCost(Instruction *I,
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unsigned AS = getLoadStoreAddressSpace(I);
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TTI::OperandValueInfo OpInfo = TTI::getOperandInfo(I->getOperand(0));
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return TTI.getAddressComputationCost(PtrTy) +
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return TTI.getAddressComputationCost(PtrTy, nullptr, nullptr, CostKind) +
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TTI.getMemoryOpCost(I->getOpcode(), ValTy, Alignment, AS, CostKind,
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OpInfo, I);
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}
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@ -3130,7 +3130,8 @@ InstructionCost VPWidenMemoryRecipe::computeCost(ElementCount VF,
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Type *PtrTy = toVectorTy(Ptr->getType(), VF);
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assert(!Reverse &&
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"Inconsecutive memory access should not have the order.");
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return Ctx.TTI.getAddressComputationCost(PtrTy) +
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return Ctx.TTI.getAddressComputationCost(PtrTy, nullptr, nullptr,
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Ctx.CostKind) +
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Ctx.TTI.getGatherScatterOpCost(Opcode, Ty, Ptr, IsMasked, Alignment,
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Ctx.CostKind, &Ingredient);
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}
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@ -1796,8 +1796,8 @@ bool VectorCombine::scalarizeLoadExtract(Instruction &I) {
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ScalarizedCost +=
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TTI.getMemoryOpCost(Instruction::Load, VecTy->getElementType(),
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Align(1), LI->getPointerAddressSpace(), CostKind);
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ScalarizedCost +=
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TTI.getAddressComputationCost(LI->getPointerOperandType());
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ScalarizedCost += TTI.getAddressComputationCost(LI->getPointerOperandType(),
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nullptr, nullptr, CostKind);
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}
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LLVM_DEBUG(dbgs() << "Found all extractions of a vector load: " << I
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