[X86] Add SM4 instructions.
For more details about these instructions, please refer to the latest ISE document: https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html Reviewed By: pengfei, skan Differential Revision: https://reviews.llvm.org/D155148
This commit is contained in:
Freddy Ye
parent
75d71800aa
commit
049d6a3f42
@ -821,6 +821,9 @@ X86 Support
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* Support intrinsic of ``_mm_sm3msg1_epi32``.
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* Support intrinsic of ``_mm_sm3msg2_epi32``.
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* Support intrinsic of ``_mm_sm3rnds2_epi32``.
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- Support ISA of ``SM4``.
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* Support intrinsic of ``_mm(256)_sm4key4_epi32``.
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* Support intrinsic of ``_mm(256)_sm4rnds4_epi32``.
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Arm and AArch64 Support
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^^^^^^^^^^^^^^^^^^^^^^^
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@ -2151,6 +2151,12 @@ TARGET_BUILTIN(__builtin_ia32_vsm3msg1, "V4UiV4UiV4UiV4Ui", "nV:128:", "sm3")
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TARGET_BUILTIN(__builtin_ia32_vsm3msg2, "V4UiV4UiV4UiV4Ui", "nV:128:", "sm3")
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TARGET_BUILTIN(__builtin_ia32_vsm3rnds2, "V4UiV4UiV4UiV4UiIUi", "nV:128:", "sm3")
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// SM4
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TARGET_BUILTIN(__builtin_ia32_vsm4key4128, "V4UiV4UiV4Ui", "nV:128:", "sm4")
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TARGET_BUILTIN(__builtin_ia32_vsm4key4256, "V8UiV8UiV8Ui", "nV:256:", "sm4")
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TARGET_BUILTIN(__builtin_ia32_vsm4rnds4128, "V4UiV4UiV4Ui", "nV:128:", "sm4")
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TARGET_BUILTIN(__builtin_ia32_vsm4rnds4256, "V8UiV8UiV8Ui", "nV:256:", "sm4")
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#undef BUILTIN
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#undef TARGET_BUILTIN
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#undef TARGET_HEADER_BUILTIN
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@ -5060,6 +5060,8 @@ def msha512 : Flag<["-"], "msha512">, Group<m_x86_Features_Group>;
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def mno_sha512 : Flag<["-"], "mno-sha512">, Group<m_x86_Features_Group>;
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def msm3 : Flag<["-"], "msm3">, Group<m_x86_Features_Group>;
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def mno_sm3 : Flag<["-"], "mno-sm3">, Group<m_x86_Features_Group>;
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def msm4 : Flag<["-"], "msm4">, Group<m_x86_Features_Group>;
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def mno_sm4 : Flag<["-"], "mno-sm4">, Group<m_x86_Features_Group>;
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def mtbm : Flag<["-"], "mtbm">, Group<m_x86_Features_Group>;
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def mno_tbm : Flag<["-"], "mno-tbm">, Group<m_x86_Features_Group>;
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def mtsxldtrk : Flag<["-"], "mtsxldtrk">, Group<m_x86_Features_Group>;
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@ -267,6 +267,8 @@ bool X86TargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
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HasSHSTK = true;
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} else if (Feature == "+sm3") {
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HasSM3 = true;
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} else if (Feature == "+sm4") {
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HasSM4 = true;
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} else if (Feature == "+movbe") {
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HasMOVBE = true;
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} else if (Feature == "+sgx") {
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@ -780,6 +782,8 @@ void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
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Builder.defineMacro("__SGX__");
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if (HasSM3)
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Builder.defineMacro("__SM3__");
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if (HasSM4)
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Builder.defineMacro("__SM4__");
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if (HasPREFETCHI)
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Builder.defineMacro("__PREFETCHI__");
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if (HasPREFETCHWT1)
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@ -1010,6 +1014,7 @@ bool X86TargetInfo::isValidFeatureName(StringRef Name) const {
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.Case("sha512", true)
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.Case("shstk", true)
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.Case("sm3", true)
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.Case("sm4", true)
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.Case("sse", true)
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.Case("sse2", true)
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.Case("sse3", true)
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@ -1117,6 +1122,7 @@ bool X86TargetInfo::hasFeature(StringRef Feature) const {
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.Case("sha512", HasSHA512)
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.Case("shstk", HasSHSTK)
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.Case("sm3", HasSM3)
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.Case("sm4", HasSM4)
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.Case("sse", SSELevel >= SSE1)
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.Case("sse2", SSELevel >= SSE2)
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.Case("sse3", SSELevel >= SSE3)
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@ -116,6 +116,7 @@ class LLVM_LIBRARY_VISIBILITY X86TargetInfo : public TargetInfo {
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bool HasSHSTK = false;
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bool HasSM3 = false;
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bool HasSGX = false;
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bool HasSM4 = false;
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bool HasCX8 = false;
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bool HasCX16 = false;
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bool HasFXSR = false;
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@ -206,6 +206,7 @@ set(x86_files
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sha512intrin.h
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shaintrin.h
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sm3intrin.h
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sm4intrin.h
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smmintrin.h
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tbmintrin.h
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tmmintrin.h
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@ -279,6 +279,11 @@
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#include <sm3intrin.h>
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#endif
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#if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
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defined(__SM4__)
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#include <sm4intrin.h>
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#endif
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#if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
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defined(__RDPID__)
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/// Returns the value of the IA32_TSC_AUX MSR (0xc0000103).
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269
clang/lib/Headers/sm4intrin.h
Normal file
269
clang/lib/Headers/sm4intrin.h
Normal file
@ -0,0 +1,269 @@
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/*===--------------- sm4intrin.h - SM4 intrinsics -----------------===
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*
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* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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* See https://llvm.org/LICENSE.txt for license information.
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* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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*
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*===-----------------------------------------------------------------------===
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*/
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#ifndef __IMMINTRIN_H
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#error "Never use <sm4intrin.h> directly; include <immintrin.h> instead."
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#endif // __IMMINTRIN_H
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#ifndef __SM4INTRIN_H
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#define __SM4INTRIN_H
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/// This intrinsic performs four rounds of SM4 key expansion. The intrinsic
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/// operates on independent 128-bit lanes. The calculated results are
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/// stored in \a dst.
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/// \headerfile <immintrin.h>
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///
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/// \code
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/// __m128i _mm_sm4key4_epi32(__m128i __A, __m128i __B)
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/// \endcode
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///
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/// This intrinsic corresponds to the \c VSM4KEY4 instruction.
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///
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/// \param __A
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/// A 128-bit vector of [4 x int].
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/// \param __B
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/// A 128-bit vector of [4 x int].
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/// \returns
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/// A 128-bit vector of [4 x int].
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///
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/// \code{.operation}
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/// DEFINE ROL32(dword, n) {
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/// count := n % 32
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/// dest := (dword << count) | (dword >> (32-count))
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/// RETURN dest
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/// }
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/// DEFINE SBOX_BYTE(dword, i) {
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/// RETURN sbox[dword.byte[i]]
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/// }
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/// DEFINE lower_t(dword) {
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/// tmp.byte[0] := SBOX_BYTE(dword, 0)
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/// tmp.byte[1] := SBOX_BYTE(dword, 1)
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/// tmp.byte[2] := SBOX_BYTE(dword, 2)
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/// tmp.byte[3] := SBOX_BYTE(dword, 3)
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/// RETURN tmp
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/// }
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/// DEFINE L_KEY(dword) {
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/// RETURN dword ^ ROL32(dword, 13) ^ ROL32(dword, 23)
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/// }
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/// DEFINE T_KEY(dword) {
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/// RETURN L_KEY(lower_t(dword))
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/// }
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/// DEFINE F_KEY(X0, X1, X2, X3, round_key) {
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/// RETURN X0 ^ T_KEY(X1 ^ X2 ^ X3 ^ round_key)
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/// }
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/// FOR i:= 0 to 0
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/// P[0] := __B.xmm[i].dword[0]
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/// P[1] := __B.xmm[i].dword[1]
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/// P[2] := __B.xmm[i].dword[2]
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/// P[3] := __B.xmm[i].dword[3]
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/// C[0] := F_KEY(P[0], P[1], P[2], P[3], __A.xmm[i].dword[0])
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/// C[1] := F_KEY(P[1], P[2], P[3], C[0], __A.xmm[i].dword[1])
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/// C[2] := F_KEY(P[2], P[3], C[0], C[1], __A.xmm[i].dword[2])
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/// C[3] := F_KEY(P[3], C[0], C[1], C[2], __A.xmm[i].dword[3])
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/// DEST.xmm[i].dword[0] := C[0]
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/// DEST.xmm[i].dword[1] := C[1]
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/// DEST.xmm[i].dword[2] := C[2]
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/// DEST.xmm[i].dword[3] := C[3]
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/// ENDFOR
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/// DEST[MAX:128] := 0
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/// \endcode
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#define _mm_sm4key4_epi32(A, B) \
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(__m128i) __builtin_ia32_vsm4key4128((__v4su)A, (__v4su)B)
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/// This intrinsic performs four rounds of SM4 key expansion. The intrinsic
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/// operates on independent 128-bit lanes. The calculated results are
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/// stored in \a dst.
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/// \headerfile <immintrin.h>
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///
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/// \code
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/// __m256i _mm256_sm4key4_epi32(__m256i __A, __m256i __B)
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/// \endcode
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///
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/// This intrinsic corresponds to the \c VSM4KEY4 instruction.
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///
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/// \param __A
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/// A 256-bit vector of [8 x int].
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/// \param __B
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/// A 256-bit vector of [8 x int].
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/// \returns
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/// A 256-bit vector of [8 x int].
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///
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/// \code{.operation}
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/// DEFINE ROL32(dword, n) {
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/// count := n % 32
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/// dest := (dword << count) | (dword >> (32-count))
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/// RETURN dest
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/// }
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/// DEFINE SBOX_BYTE(dword, i) {
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/// RETURN sbox[dword.byte[i]]
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/// }
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/// DEFINE lower_t(dword) {
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/// tmp.byte[0] := SBOX_BYTE(dword, 0)
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/// tmp.byte[1] := SBOX_BYTE(dword, 1)
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/// tmp.byte[2] := SBOX_BYTE(dword, 2)
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/// tmp.byte[3] := SBOX_BYTE(dword, 3)
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/// RETURN tmp
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/// }
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/// DEFINE L_KEY(dword) {
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/// RETURN dword ^ ROL32(dword, 13) ^ ROL32(dword, 23)
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/// }
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/// DEFINE T_KEY(dword) {
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/// RETURN L_KEY(lower_t(dword))
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/// }
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/// DEFINE F_KEY(X0, X1, X2, X3, round_key) {
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/// RETURN X0 ^ T_KEY(X1 ^ X2 ^ X3 ^ round_key)
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/// }
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/// FOR i:= 0 to 1
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/// P[0] := __B.xmm[i].dword[0]
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/// P[1] := __B.xmm[i].dword[1]
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/// P[2] := __B.xmm[i].dword[2]
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/// P[3] := __B.xmm[i].dword[3]
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/// C[0] := F_KEY(P[0], P[1], P[2], P[3], __A.xmm[i].dword[0])
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/// C[1] := F_KEY(P[1], P[2], P[3], C[0], __A.xmm[i].dword[1])
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/// C[2] := F_KEY(P[2], P[3], C[0], C[1], __A.xmm[i].dword[2])
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/// C[3] := F_KEY(P[3], C[0], C[1], C[2], __A.xmm[i].dword[3])
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/// DEST.xmm[i].dword[0] := C[0]
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/// DEST.xmm[i].dword[1] := C[1]
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/// DEST.xmm[i].dword[2] := C[2]
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/// DEST.xmm[i].dword[3] := C[3]
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/// ENDFOR
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/// DEST[MAX:256] := 0
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/// \endcode
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#define _mm256_sm4key4_epi32(A, B) \
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(__m256i) __builtin_ia32_vsm4key4256((__v8su)A, (__v8su)B)
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/// This intrinisc performs four rounds of SM4 encryption. The intrinisc
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/// operates on independent 128-bit lanes. The calculated results are
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/// stored in \a dst.
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/// \headerfile <immintrin.h>
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///
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/// \code
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/// __m128i _mm_sm4rnds4_epi32(__m128i __A, __m128i __B)
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/// \endcode
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///
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/// This intrinsic corresponds to the \c VSM4RNDS4 instruction.
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///
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/// \param __A
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/// A 128-bit vector of [4 x int].
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/// \param __B
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/// A 128-bit vector of [4 x int].
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/// \returns
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/// A 128-bit vector of [4 x int].
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///
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/// \code{.operation}
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/// DEFINE ROL32(dword, n) {
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/// count := n % 32
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/// dest := (dword << count) | (dword >> (32-count))
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/// RETURN dest
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/// }
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/// DEFINE lower_t(dword) {
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/// tmp.byte[0] := SBOX_BYTE(dword, 0)
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/// tmp.byte[1] := SBOX_BYTE(dword, 1)
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/// tmp.byte[2] := SBOX_BYTE(dword, 2)
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/// tmp.byte[3] := SBOX_BYTE(dword, 3)
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/// RETURN tmp
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/// }
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/// DEFINE L_RND(dword) {
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/// tmp := dword
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/// tmp := tmp ^ ROL32(dword, 2)
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/// tmp := tmp ^ ROL32(dword, 10)
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/// tmp := tmp ^ ROL32(dword, 18)
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/// tmp := tmp ^ ROL32(dword, 24)
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/// RETURN tmp
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/// }
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/// DEFINE T_RND(dword) {
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/// RETURN L_RND(lower_t(dword))
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/// }
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/// DEFINE F_RND(X0, X1, X2, X3, round_key) {
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/// RETURN X0 ^ T_RND(X1 ^ X2 ^ X3 ^ round_key)
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/// }
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/// FOR i:= 0 to 0
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/// P[0] := __B.xmm[i].dword[0]
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/// P[1] := __B.xmm[i].dword[1]
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/// P[2] := __B.xmm[i].dword[2]
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/// P[3] := __B.xmm[i].dword[3]
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/// C[0] := F_RND(P[0], P[1], P[2], P[3], __A.xmm[i].dword[0])
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/// C[1] := F_RND(P[1], P[2], P[3], C[0], __A.xmm[i].dword[1])
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/// C[2] := F_RND(P[2], P[3], C[0], C[1], __A.xmm[i].dword[2])
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/// C[3] := F_RND(P[3], C[0], C[1], C[2], __A.xmm[i].dword[3])
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/// DEST.xmm[i].dword[0] := C[0]
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/// DEST.xmm[i].dword[1] := C[1]
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/// DEST.xmm[i].dword[2] := C[2]
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/// DEST.xmm[i].dword[3] := C[3]
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/// ENDFOR
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/// DEST[MAX:128] := 0
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/// \endcode
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#define _mm_sm4rnds4_epi32(A, B) \
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(__m128i) __builtin_ia32_vsm4rnds4128((__v4su)A, (__v4su)B)
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/// This intrinisc performs four rounds of SM4 encryption. The intrinisc
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/// operates on independent 128-bit lanes. The calculated results are
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/// stored in \a dst.
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/// \headerfile <immintrin.h>
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///
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/// \code
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/// __m256i _mm256_sm4rnds4_epi32(__m256i __A, __m256i __B)
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/// \endcode
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///
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/// This intrinsic corresponds to the \c VSM4RNDS4 instruction.
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///
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/// \param __A
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/// A 256-bit vector of [8 x int].
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/// \param __B
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/// A 256-bit vector of [8 x int].
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/// \returns
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/// A 256-bit vector of [8 x int].
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///
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/// \code{.operation}
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/// DEFINE ROL32(dword, n) {
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/// count := n % 32
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/// dest := (dword << count) | (dword >> (32-count))
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/// RETURN dest
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/// }
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/// DEFINE lower_t(dword) {
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/// tmp.byte[0] := SBOX_BYTE(dword, 0)
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/// tmp.byte[1] := SBOX_BYTE(dword, 1)
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/// tmp.byte[2] := SBOX_BYTE(dword, 2)
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/// tmp.byte[3] := SBOX_BYTE(dword, 3)
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/// RETURN tmp
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/// }
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/// DEFINE L_RND(dword) {
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/// tmp := dword
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/// tmp := tmp ^ ROL32(dword, 2)
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/// tmp := tmp ^ ROL32(dword, 10)
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/// tmp := tmp ^ ROL32(dword, 18)
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/// tmp := tmp ^ ROL32(dword, 24)
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/// RETURN tmp
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/// }
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/// DEFINE T_RND(dword) {
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/// RETURN L_RND(lower_t(dword))
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/// }
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/// DEFINE F_RND(X0, X1, X2, X3, round_key) {
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/// RETURN X0 ^ T_RND(X1 ^ X2 ^ X3 ^ round_key)
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/// }
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/// FOR i:= 0 to 0
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/// P[0] := __B.xmm[i].dword[0]
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/// P[1] := __B.xmm[i].dword[1]
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/// P[2] := __B.xmm[i].dword[2]
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/// P[3] := __B.xmm[i].dword[3]
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/// C[0] := F_RND(P[0], P[1], P[2], P[3], __A.xmm[i].dword[0])
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/// C[1] := F_RND(P[1], P[2], P[3], C[0], __A.xmm[i].dword[1])
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/// C[2] := F_RND(P[2], P[3], C[0], C[1], __A.xmm[i].dword[2])
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/// C[3] := F_RND(P[3], C[0], C[1], C[2], __A.xmm[i].dword[3])
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/// DEST.xmm[i].dword[0] := C[0]
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/// DEST.xmm[i].dword[1] := C[1]
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/// DEST.xmm[i].dword[2] := C[2]
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/// DEST.xmm[i].dword[3] := C[3]
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/// ENDFOR
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/// DEST[MAX:256] := 0
|
||||
/// \endcode
|
||||
#define _mm256_sm4rnds4_epi32(A, B) \
|
||||
(__m256i) __builtin_ia32_vsm4rnds4256((__v8su)A, (__v8su)B)
|
||||
|
||||
#endif // __SM4INTRIN_H
|
||||
28
clang/test/CodeGen/X86/sm4-builtins.c
Normal file
28
clang/test/CodeGen/X86/sm4-builtins.c
Normal file
@ -0,0 +1,28 @@
|
||||
// RUN: %clang_cc1 %s -ffreestanding -triple=x86_64-unknown-unknown -target-feature +sm4 -emit-llvm -o - -Wall -Werror | FileCheck %s
|
||||
// RUN: %clang_cc1 %s -ffreestanding -triple=i386-unknown-unknown -target-feature +sm4 -emit-llvm -o - -Wall -Werror | FileCheck %s
|
||||
|
||||
#include <immintrin.h>
|
||||
|
||||
__m128i test_mm_sm4key4_epi32(__m128i __A, __m128i __B) {
|
||||
// CHECK-LABEL: @test_mm_sm4key4_epi32(
|
||||
// CHECK: call <4 x i32> @llvm.x86.vsm4key4128(<4 x i32> %{{.*}}, <4 x i32> %{{.*}})
|
||||
return _mm_sm4key4_epi32(__A, __B);
|
||||
}
|
||||
|
||||
__m256i test_mm256_sm4key4_epi32(__m256i __A, __m256i __B) {
|
||||
// CHECK-LABEL: @test_mm256_sm4key4_epi32(
|
||||
// CHECK: call <8 x i32> @llvm.x86.vsm4key4256(<8 x i32> %{{.*}}, <8 x i32> %{{.*}})
|
||||
return _mm256_sm4key4_epi32(__A, __B);
|
||||
}
|
||||
|
||||
__m128i test_mm_sm4rnds4_epi32(__m128i __A, __m128i __B) {
|
||||
// CHECK-LABEL: @test_mm_sm4rnds4_epi32(
|
||||
// CHECK: call <4 x i32> @llvm.x86.vsm4rnds4128(<4 x i32> %{{.*}}, <4 x i32> %{{.*}})
|
||||
return _mm_sm4rnds4_epi32(__A, __B);
|
||||
}
|
||||
|
||||
__m256i test_mm256_sm4rnds4_epi32(__m256i __A, __m256i __B) {
|
||||
// CHECK-LABEL: @test_mm256_sm4rnds4_epi32(
|
||||
// CHECK: call <8 x i32> @llvm.x86.vsm4rnds4256(<8 x i32> %{{.*}}, <8 x i32> %{{.*}})
|
||||
return _mm256_sm4rnds4_epi32(__A, __B);
|
||||
}
|
||||
@ -54,9 +54,9 @@ void __attribute__((target("arch=x86-64-v4"))) x86_64_v4(void) {}
|
||||
// CHECK: #0 = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+cx8,+x87" "tune-cpu"="i686"
|
||||
// CHECK: #1 = {{.*}}"target-cpu"="ivybridge" "target-features"="+avx,+cmov,+crc32,+cx16,+cx8,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt"
|
||||
// CHECK-NOT: tune-cpu
|
||||
// CHECK: #2 = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+cx8,+x87,-aes,-avx,-avx2,-avx512bf16,-avx512bitalg,-avx512bw,-avx512cd,-avx512dq,-avx512er,-avx512f,-avx512fp16,-avx512ifma,-avx512pf,-avx512vbmi,-avx512vbmi2,-avx512vl,-avx512vnni,-avx512vp2intersect,-avx512vpopcntdq,-avxifma,-avxneconvert,-avxvnni,-avxvnniint8,-f16c,-fma,-fma4,-gfni,-kl,-pclmul,-sha,-sha512,-sm3,-sse2,-sse3,-sse4.1,-sse4.2,-sse4a,-ssse3,-vaes,-vpclmulqdq,-widekl,-xop" "tune-cpu"="i686"
|
||||
// CHECK: #2 = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+cx8,+x87,-aes,-avx,-avx2,-avx512bf16,-avx512bitalg,-avx512bw,-avx512cd,-avx512dq,-avx512er,-avx512f,-avx512fp16,-avx512ifma,-avx512pf,-avx512vbmi,-avx512vbmi2,-avx512vl,-avx512vnni,-avx512vp2intersect,-avx512vpopcntdq,-avxifma,-avxneconvert,-avxvnni,-avxvnniint8,-f16c,-fma,-fma4,-gfni,-kl,-pclmul,-sha,-sha512,-sm3,-sm4,-sse2,-sse3,-sse4.1,-sse4.2,-sse4a,-ssse3,-vaes,-vpclmulqdq,-widekl,-xop" "tune-cpu"="i686"
|
||||
// CHECK: #3 = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+crc32,+cx8,+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87" "tune-cpu"="i686"
|
||||
// CHECK: #4 = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+cx8,+x87,-avx,-avx2,-avx512bf16,-avx512bitalg,-avx512bw,-avx512cd,-avx512dq,-avx512er,-avx512f,-avx512fp16,-avx512ifma,-avx512pf,-avx512vbmi,-avx512vbmi2,-avx512vl,-avx512vnni,-avx512vp2intersect,-avx512vpopcntdq,-avxifma,-avxneconvert,-avxvnni,-avxvnniint8,-f16c,-fma,-fma4,-sha512,-sm3,-sse4.1,-sse4.2,-vaes,-vpclmulqdq,-xop" "tune-cpu"="i686"
|
||||
// CHECK: #4 = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+cx8,+x87,-avx,-avx2,-avx512bf16,-avx512bitalg,-avx512bw,-avx512cd,-avx512dq,-avx512er,-avx512f,-avx512fp16,-avx512ifma,-avx512pf,-avx512vbmi,-avx512vbmi2,-avx512vl,-avx512vnni,-avx512vp2intersect,-avx512vpopcntdq,-avxifma,-avxneconvert,-avxvnni,-avxvnniint8,-f16c,-fma,-fma4,-sha512,-sm3,-sm4,-sse4.1,-sse4.2,-vaes,-vpclmulqdq,-xop" "tune-cpu"="i686"
|
||||
// CHECK: #5 = {{.*}}"target-cpu"="ivybridge" "target-features"="+avx,+cmov,+crc32,+cx16,+cx8,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt,-aes,-vaes"
|
||||
// CHECK-NOT: tune-cpu
|
||||
// CHECK: #6 = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+cx8,+x87,-3dnow,-3dnowa,-mmx"
|
||||
|
||||
@ -359,6 +359,11 @@
|
||||
// SM3: "-target-feature" "+sm3"
|
||||
// NO-SM3: "-target-feature" "-sm3"
|
||||
|
||||
// RUN: %clang --target=i386 -msm4 %s -### -o %t.o 2>&1 | FileCheck -check-prefix=SM4 %s
|
||||
// RUN: %clang --target=i386 -mno-sm4 %s -### -o %t.o 2>&1 | FileCheck -check-prefix=NO-SM4 %s
|
||||
// SM4: "-target-feature" "+sm4"
|
||||
// NO-SM4: "-target-feature" "-sm4"
|
||||
|
||||
// RUN: %clang --target=i386 -march=i386 -mcrc32 %s -### 2>&1 | FileCheck -check-prefix=CRC32 %s
|
||||
// RUN: %clang --target=i386 -march=i386 -mno-crc32 %s -### 2>&1 | FileCheck -check-prefix=NO-CRC32 %s
|
||||
// CRC32: "-target-feature" "+crc32"
|
||||
|
||||
@ -687,6 +687,19 @@
|
||||
// SM3NOAVX-NOT: #define __SM3__ 1
|
||||
// SM3NOAVX-NOT: #define __AVX__ 1
|
||||
|
||||
// RUN: %clang -target i686-unknown-linux-gnu -march=atom -msm4 -x c -E -dM -o - %s | FileCheck -check-prefix=SM4 %s
|
||||
|
||||
// SM4: #define __AVX__ 1
|
||||
// SM4: #define __SM4__ 1
|
||||
|
||||
// RUN: %clang -target i686-unknown-linux-gnu -march=atom -mno-sm4 -x c -E -dM -o - %s | FileCheck -check-prefix=NOSM4 %s
|
||||
// NOSM4-NOT: #define __SM4__ 1
|
||||
|
||||
// RUN: %clang -target i686-unknown-linux-gnu -march=atom -msm4 -mno-avx -x c -E -dM -o - %s | FileCheck -check-prefix=SM4NOAVX %s
|
||||
|
||||
// SM4NOAVX-NOT: #define __AVX__ 1
|
||||
// SM4NOAVX-NOT: #define __SM4__ 1
|
||||
|
||||
// RUN: %clang -target i386-unknown-linux-gnu -march=i386 -mcrc32 -x c -E -dM -o - %s | FileCheck -check-prefix=CRC32 %s
|
||||
|
||||
// CRC32: #define __CRC32__ 1
|
||||
|
||||
@ -281,6 +281,7 @@ Changes to the X86 Backend
|
||||
* Add support for the ``PBNDKB`` instruction.
|
||||
* Support ISA of ``SHA512``.
|
||||
* Support ISA of ``SM3``.
|
||||
* Support ISA of ``SM4``.
|
||||
|
||||
Changes to the OCaml bindings
|
||||
-----------------------------
|
||||
|
||||
@ -5546,6 +5546,30 @@ let TargetPrefix = "x86" in {
|
||||
[ImmArg<ArgIndex<3>>, IntrNoMem]>;
|
||||
}
|
||||
//===----------------------------------------------------------------------===//
|
||||
// SM4 intrinsics
|
||||
let TargetPrefix = "x86" in {
|
||||
def int_x86_vsm4key4128
|
||||
: ClangBuiltin<"__builtin_ia32_vsm4key4128">,
|
||||
DefaultAttrsIntrinsic<[llvm_v4i32_ty],
|
||||
[llvm_v4i32_ty, llvm_v4i32_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_vsm4key4256
|
||||
: ClangBuiltin<"__builtin_ia32_vsm4key4256">,
|
||||
DefaultAttrsIntrinsic<[llvm_v8i32_ty],
|
||||
[llvm_v8i32_ty, llvm_v8i32_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_vsm4rnds4128
|
||||
: ClangBuiltin<"__builtin_ia32_vsm4rnds4128">,
|
||||
DefaultAttrsIntrinsic<[llvm_v4i32_ty],
|
||||
[llvm_v4i32_ty, llvm_v4i32_ty],
|
||||
[IntrNoMem]>;
|
||||
def int_x86_vsm4rnds4256
|
||||
: ClangBuiltin<"__builtin_ia32_vsm4rnds4256">,
|
||||
DefaultAttrsIntrinsic<[llvm_v8i32_ty],
|
||||
[llvm_v8i32_ty, llvm_v8i32_ty],
|
||||
[IntrNoMem]>;
|
||||
}
|
||||
//===----------------------------------------------------------------------===//
|
||||
// RAO-INT intrinsics
|
||||
let TargetPrefix = "x86" in {
|
||||
def int_x86_aadd32
|
||||
|
||||
@ -221,7 +221,6 @@ X86_FEATURE (XSAVES, "xsaves")
|
||||
X86_FEATURE (HRESET, "hreset")
|
||||
X86_FEATURE (RAOINT, "raoint")
|
||||
X86_FEATURE (AVX512FP16, "avx512fp16")
|
||||
X86_FEATURE (SM3, "sm3")
|
||||
X86_FEATURE (AMX_FP16, "amx-fp16")
|
||||
X86_FEATURE (CMPCCXADD, "cmpccxadd")
|
||||
X86_FEATURE (AVXNECONVERT, "avxneconvert")
|
||||
@ -229,6 +228,8 @@ X86_FEATURE (AVXVNNI, "avxvnni")
|
||||
X86_FEATURE (AVXIFMA, "avxifma")
|
||||
X86_FEATURE (AVXVNNIINT8, "avxvnniint8")
|
||||
X86_FEATURE (SHA512, "sha512")
|
||||
X86_FEATURE (SM3, "sm3")
|
||||
X86_FEATURE (SM4, "sm4")
|
||||
// These features aren't really CPU features, but the frontend can set them.
|
||||
X86_FEATURE (RETPOLINE_EXTERNAL_THUNK, "retpoline-external-thunk")
|
||||
X86_FEATURE (RETPOLINE_INDIRECT_BRANCHES, "retpoline-indirect-branches")
|
||||
|
||||
@ -248,6 +248,9 @@ def FeatureSHSTK : SubtargetFeature<"shstk", "HasSHSTK", "true",
|
||||
def FeatureSM3 : SubtargetFeature<"sm3", "HasSM3", "true",
|
||||
"Support SM3 instructions",
|
||||
[FeatureAVX]>;
|
||||
def FeatureSM4 : SubtargetFeature<"sm4", "HasSM4", "true",
|
||||
"Support SM4 instructions",
|
||||
[FeatureAVX]>;
|
||||
def FeaturePRFCHW : SubtargetFeature<"prfchw", "HasPRFCHW", "true",
|
||||
"Support PRFCHW instructions">;
|
||||
def FeatureRDSEED : SubtargetFeature<"rdseed", "HasRDSEED", "true",
|
||||
|
||||
@ -988,6 +988,7 @@ def HasPTWRITE : Predicate<"Subtarget->hasPTWRITE()">;
|
||||
def FPStackf32 : Predicate<"!Subtarget->hasSSE1()">;
|
||||
def FPStackf64 : Predicate<"!Subtarget->hasSSE2()">;
|
||||
def HasSHSTK : Predicate<"Subtarget->hasSHSTK()">;
|
||||
def HasSM4 : Predicate<"Subtarget->hasSM4()">;
|
||||
def HasCLFLUSH : Predicate<"Subtarget->hasCLFLUSH()">;
|
||||
def HasCLFLUSHOPT : Predicate<"Subtarget->hasCLFLUSHOPT()">;
|
||||
def HasCLWB : Predicate<"Subtarget->hasCLWB()">;
|
||||
|
||||
@ -8358,3 +8358,27 @@ let Predicates = [HasSM3], Constraints = "$src1 = $dst" in {
|
||||
defm VSM3MSG1 : SM3_Base<"vsm3msg1">, T8PS;
|
||||
defm VSM3MSG2 : SM3_Base<"vsm3msg2">, T8PD;
|
||||
defm VSM3RNDS2 : VSM3RNDS2_Base, VEX_4V, TAPD;
|
||||
|
||||
// FIXME: Is there a better scheduler class for SM4 than WriteVecIMul?
|
||||
let Predicates = [HasSM4] in {
|
||||
multiclass SM4_Base<string OpStr, RegisterClass RC, string VL,
|
||||
PatFrag LD, X86MemOperand MemOp> {
|
||||
def rr : I<0xda, MRMSrcReg, (outs RC:$dst),
|
||||
(ins RC:$src1, RC:$src2),
|
||||
!strconcat(OpStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
|
||||
[(set RC:$dst, (!cast<Intrinsic>("int_x86_"#OpStr#VL) RC:$src1,
|
||||
RC:$src2))]>,
|
||||
Sched<[WriteVecIMul]>;
|
||||
def rm : I<0xda, MRMSrcMem, (outs RC:$dst),
|
||||
(ins RC:$src1, MemOp:$src2),
|
||||
!strconcat(OpStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
|
||||
[(set RC:$dst, (!cast<Intrinsic>("int_x86_"#OpStr#VL) RC:$src1,
|
||||
(LD addr:$src2)))]>,
|
||||
Sched<[WriteVecIMul]>;
|
||||
}
|
||||
}
|
||||
|
||||
defm VSM4KEY4 : SM4_Base<"vsm4key4", VR128, "128", loadv4i32, i128mem>, T8XS, VEX_4V;
|
||||
defm VSM4KEY4Y : SM4_Base<"vsm4key4", VR256, "256", loadv8i32, i256mem>, T8XS, VEX_L, VEX_4V;
|
||||
defm VSM4RNDS4 : SM4_Base<"vsm4rnds4", VR128, "128", loadv4i32, i128mem>, T8XD, VEX_4V;
|
||||
defm VSM4RNDS4Y : SM4_Base<"vsm4rnds4", VR256, "256", loadv8i32, i256mem>, T8XD, VEX_L, VEX_4V;
|
||||
|
||||
@ -1748,6 +1748,7 @@ bool sys::getHostCPUFeatures(StringMap<bool> &Features) {
|
||||
MaxLevel >= 7 && !getX86CpuIDAndInfoEx(0x7, 0x1, &EAX, &EBX, &ECX, &EDX);
|
||||
Features["sha512"] = HasLeaf7Subleaf1 && ((EAX >> 0) & 1);
|
||||
Features["sm3"] = HasLeaf7Subleaf1 && ((EAX >> 1) & 1);
|
||||
Features["sm4"] = HasLeaf7Subleaf1 && ((EAX >> 2) & 1);
|
||||
Features["raoint"] = HasLeaf7Subleaf1 && ((EAX >> 3) & 1);
|
||||
Features["avxvnni"] = HasLeaf7Subleaf1 && ((EAX >> 4) & 1) && HasAVXSave;
|
||||
Features["avx512bf16"] = HasLeaf7Subleaf1 && ((EAX >> 5) & 1) && HasAVX512Save;
|
||||
|
||||
@ -614,6 +614,7 @@ constexpr FeatureBitset ImpliedFeaturesSHA = FeatureSSE2;
|
||||
constexpr FeatureBitset ImpliedFeaturesVAES = FeatureAES | FeatureAVX;
|
||||
constexpr FeatureBitset ImpliedFeaturesVPCLMULQDQ = FeatureAVX | FeaturePCLMUL;
|
||||
constexpr FeatureBitset ImpliedFeaturesSM3 = FeatureAVX;
|
||||
constexpr FeatureBitset ImpliedFeaturesSM4 = FeatureAVX;
|
||||
|
||||
// AVX512 features.
|
||||
constexpr FeatureBitset ImpliedFeaturesAVX512CD = FeatureAVX512F;
|
||||
|
||||
43
llvm/test/CodeGen/X86/sm4-intrinsics.ll
Normal file
43
llvm/test/CodeGen/X86/sm4-intrinsics.ll
Normal file
@ -0,0 +1,43 @@
|
||||
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
||||
; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+sm4 | FileCheck %s
|
||||
; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+sm4 | FileCheck %s
|
||||
|
||||
define <4 x i32> @test_int_x86_vsm4key4128(<4 x i32> %A, <4 x i32> %B) {
|
||||
; CHECK-LABEL: test_int_x86_vsm4key4128:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsm4key4 %xmm1, %xmm0, %xmm0 # encoding: [0xc4,0xe2,0x7a,0xda,0xc1]
|
||||
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
|
||||
%ret = call <4 x i32> @llvm.x86.vsm4key4128(<4 x i32> %A, <4 x i32> %B)
|
||||
ret <4 x i32> %ret
|
||||
}
|
||||
declare <4 x i32> @llvm.x86.vsm4key4128(<4 x i32> %A, <4 x i32> %B)
|
||||
|
||||
define <8 x i32> @test_int_x86_vsm4key4256(<8 x i32> %A, <8 x i32> %B) {
|
||||
; CHECK-LABEL: test_int_x86_vsm4key4256:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsm4key4 %ymm1, %ymm0, %ymm0 # encoding: [0xc4,0xe2,0x7e,0xda,0xc1]
|
||||
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
|
||||
%ret = call <8 x i32> @llvm.x86.vsm4key4256(<8 x i32> %A, <8 x i32> %B)
|
||||
ret <8 x i32> %ret
|
||||
}
|
||||
declare <8 x i32> @llvm.x86.vsm4key4256(<8 x i32> %A, <8 x i32> %B)
|
||||
|
||||
define <4 x i32> @test_int_x86_vsm4rnds4128(<4 x i32> %A, <4 x i32> %B) {
|
||||
; CHECK-LABEL: test_int_x86_vsm4rnds4128:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsm4rnds4 %xmm1, %xmm0, %xmm0 # encoding: [0xc4,0xe2,0x7b,0xda,0xc1]
|
||||
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
|
||||
%ret = call <4 x i32> @llvm.x86.vsm4rnds4128(<4 x i32> %A, <4 x i32> %B)
|
||||
ret <4 x i32> %ret
|
||||
}
|
||||
declare <4 x i32> @llvm.x86.vsm4rnds4128(<4 x i32> %A, <4 x i32> %B)
|
||||
|
||||
define <8 x i32> @test_int_x86_vsm4rnds4256(<8 x i32> %A, <8 x i32> %B) {
|
||||
; CHECK-LABEL: test_int_x86_vsm4rnds4256:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsm4rnds4 %ymm1, %ymm0, %ymm0 # encoding: [0xc4,0xe2,0x7f,0xda,0xc1]
|
||||
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
|
||||
%ret = call <8 x i32> @llvm.x86.vsm4rnds4256(<8 x i32> %A, <8 x i32> %B)
|
||||
ret <8 x i32> %ret
|
||||
}
|
||||
declare <8 x i32> @llvm.x86.vsm4rnds4256(<8 x i32> %A, <8 x i32> %B)
|
||||
114
llvm/test/MC/Disassembler/X86/sm4-32.txt
Normal file
114
llvm/test/MC/Disassembler/X86/sm4-32.txt
Normal file
@ -0,0 +1,114 @@
|
||||
# RUN: llvm-mc --disassemble %s -triple=i386-unknown-unknown | FileCheck %s --check-prefixes=ATT
|
||||
# RUN: llvm-mc --disassemble %s -triple=i386-unknown-unknown --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
|
||||
|
||||
# ATT: vsm4key4 %ymm4, %ymm3, %ymm2
|
||||
# INTEL: vsm4key4 ymm2, ymm3, ymm4
|
||||
0xc4,0xe2,0x66,0xda,0xd4
|
||||
|
||||
# ATT: vsm4key4 %xmm4, %xmm3, %xmm2
|
||||
# INTEL: vsm4key4 xmm2, xmm3, xmm4
|
||||
0xc4,0xe2,0x62,0xda,0xd4
|
||||
|
||||
# ATT: vsm4key4 268435456(%esp,%esi,8), %ymm3, %ymm2
|
||||
# INTEL: vsm4key4 ymm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
|
||||
0xc4,0xe2,0x66,0xda,0x94,0xf4,0x00,0x00,0x00,0x10
|
||||
|
||||
# ATT: vsm4key4 291(%edi,%eax,4), %ymm3, %ymm2
|
||||
# INTEL: vsm4key4 ymm2, ymm3, ymmword ptr [edi + 4*eax + 291]
|
||||
0xc4,0xe2,0x66,0xda,0x94,0x87,0x23,0x01,0x00,0x00
|
||||
|
||||
# ATT: vsm4key4 (%eax), %ymm3, %ymm2
|
||||
# INTEL: vsm4key4 ymm2, ymm3, ymmword ptr [eax]
|
||||
0xc4,0xe2,0x66,0xda,0x10
|
||||
|
||||
# ATT: vsm4key4 -1024(,%ebp,2), %ymm3, %ymm2
|
||||
# INTEL: vsm4key4 ymm2, ymm3, ymmword ptr [2*ebp - 1024]
|
||||
0xc4,0xe2,0x66,0xda,0x14,0x6d,0x00,0xfc,0xff,0xff
|
||||
|
||||
# ATT: vsm4key4 4064(%ecx), %ymm3, %ymm2
|
||||
# INTEL: vsm4key4 ymm2, ymm3, ymmword ptr [ecx + 4064]
|
||||
0xc4,0xe2,0x66,0xda,0x91,0xe0,0x0f,0x00,0x00
|
||||
|
||||
# ATT: vsm4key4 -4096(%edx), %ymm3, %ymm2
|
||||
# INTEL: vsm4key4 ymm2, ymm3, ymmword ptr [edx - 4096]
|
||||
0xc4,0xe2,0x66,0xda,0x92,0x00,0xf0,0xff,0xff
|
||||
|
||||
# ATT: vsm4key4 268435456(%esp,%esi,8), %xmm3, %xmm2
|
||||
# INTEL: vsm4key4 xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
|
||||
0xc4,0xe2,0x62,0xda,0x94,0xf4,0x00,0x00,0x00,0x10
|
||||
|
||||
# ATT: vsm4key4 291(%edi,%eax,4), %xmm3, %xmm2
|
||||
# INTEL: vsm4key4 xmm2, xmm3, xmmword ptr [edi + 4*eax + 291]
|
||||
0xc4,0xe2,0x62,0xda,0x94,0x87,0x23,0x01,0x00,0x00
|
||||
|
||||
# ATT: vsm4key4 (%eax), %xmm3, %xmm2
|
||||
# INTEL: vsm4key4 xmm2, xmm3, xmmword ptr [eax]
|
||||
0xc4,0xe2,0x62,0xda,0x10
|
||||
|
||||
# ATT: vsm4key4 -512(,%ebp,2), %xmm3, %xmm2
|
||||
# INTEL: vsm4key4 xmm2, xmm3, xmmword ptr [2*ebp - 512]
|
||||
0xc4,0xe2,0x62,0xda,0x14,0x6d,0x00,0xfe,0xff,0xff
|
||||
|
||||
# ATT: vsm4key4 2032(%ecx), %xmm3, %xmm2
|
||||
# INTEL: vsm4key4 xmm2, xmm3, xmmword ptr [ecx + 2032]
|
||||
0xc4,0xe2,0x62,0xda,0x91,0xf0,0x07,0x00,0x00
|
||||
|
||||
# ATT: vsm4key4 -2048(%edx), %xmm3, %xmm2
|
||||
# INTEL: vsm4key4 xmm2, xmm3, xmmword ptr [edx - 2048]
|
||||
0xc4,0xe2,0x62,0xda,0x92,0x00,0xf8,0xff,0xff
|
||||
|
||||
# ATT: vsm4rnds4 %ymm4, %ymm3, %ymm2
|
||||
# INTEL: vsm4rnds4 ymm2, ymm3, ymm4
|
||||
0xc4,0xe2,0x67,0xda,0xd4
|
||||
|
||||
# ATT: vsm4rnds4 %xmm4, %xmm3, %xmm2
|
||||
# INTEL: vsm4rnds4 xmm2, xmm3, xmm4
|
||||
0xc4,0xe2,0x63,0xda,0xd4
|
||||
|
||||
# ATT: vsm4rnds4 268435456(%esp,%esi,8), %ymm3, %ymm2
|
||||
# INTEL: vsm4rnds4 ymm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
|
||||
0xc4,0xe2,0x67,0xda,0x94,0xf4,0x00,0x00,0x00,0x10
|
||||
|
||||
# ATT: vsm4rnds4 291(%edi,%eax,4), %ymm3, %ymm2
|
||||
# INTEL: vsm4rnds4 ymm2, ymm3, ymmword ptr [edi + 4*eax + 291]
|
||||
0xc4,0xe2,0x67,0xda,0x94,0x87,0x23,0x01,0x00,0x00
|
||||
|
||||
# ATT: vsm4rnds4 (%eax), %ymm3, %ymm2
|
||||
# INTEL: vsm4rnds4 ymm2, ymm3, ymmword ptr [eax]
|
||||
0xc4,0xe2,0x67,0xda,0x10
|
||||
|
||||
# ATT: vsm4rnds4 -1024(,%ebp,2), %ymm3, %ymm2
|
||||
# INTEL: vsm4rnds4 ymm2, ymm3, ymmword ptr [2*ebp - 1024]
|
||||
0xc4,0xe2,0x67,0xda,0x14,0x6d,0x00,0xfc,0xff,0xff
|
||||
|
||||
# ATT: vsm4rnds4 4064(%ecx), %ymm3, %ymm2
|
||||
# INTEL: vsm4rnds4 ymm2, ymm3, ymmword ptr [ecx + 4064]
|
||||
0xc4,0xe2,0x67,0xda,0x91,0xe0,0x0f,0x00,0x00
|
||||
|
||||
# ATT: vsm4rnds4 -4096(%edx), %ymm3, %ymm2
|
||||
# INTEL: vsm4rnds4 ymm2, ymm3, ymmword ptr [edx - 4096]
|
||||
0xc4,0xe2,0x67,0xda,0x92,0x00,0xf0,0xff,0xff
|
||||
|
||||
# ATT: vsm4rnds4 268435456(%esp,%esi,8), %xmm3, %xmm2
|
||||
# INTEL: vsm4rnds4 xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
|
||||
0xc4,0xe2,0x63,0xda,0x94,0xf4,0x00,0x00,0x00,0x10
|
||||
|
||||
# ATT: vsm4rnds4 291(%edi,%eax,4), %xmm3, %xmm2
|
||||
# INTEL: vsm4rnds4 xmm2, xmm3, xmmword ptr [edi + 4*eax + 291]
|
||||
0xc4,0xe2,0x63,0xda,0x94,0x87,0x23,0x01,0x00,0x00
|
||||
|
||||
# ATT: vsm4rnds4 (%eax), %xmm3, %xmm2
|
||||
# INTEL: vsm4rnds4 xmm2, xmm3, xmmword ptr [eax]
|
||||
0xc4,0xe2,0x63,0xda,0x10
|
||||
|
||||
# ATT: vsm4rnds4 -512(,%ebp,2), %xmm3, %xmm2
|
||||
# INTEL: vsm4rnds4 xmm2, xmm3, xmmword ptr [2*ebp - 512]
|
||||
0xc4,0xe2,0x63,0xda,0x14,0x6d,0x00,0xfe,0xff,0xff
|
||||
|
||||
# ATT: vsm4rnds4 2032(%ecx), %xmm3, %xmm2
|
||||
# INTEL: vsm4rnds4 xmm2, xmm3, xmmword ptr [ecx + 2032]
|
||||
0xc4,0xe2,0x63,0xda,0x91,0xf0,0x07,0x00,0x00
|
||||
|
||||
# ATT: vsm4rnds4 -2048(%edx), %xmm3, %xmm2
|
||||
# INTEL: vsm4rnds4 xmm2, xmm3, xmmword ptr [edx - 2048]
|
||||
0xc4,0xe2,0x63,0xda,0x92,0x00,0xf8,0xff,0xff
|
||||
115
llvm/test/MC/Disassembler/X86/sm4-64.txt
Normal file
115
llvm/test/MC/Disassembler/X86/sm4-64.txt
Normal file
@ -0,0 +1,115 @@
|
||||
# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
|
||||
# RUN: llvm-mc --disassemble %s -triple=x86_64 --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
|
||||
|
||||
# ATT: vsm4key4 %ymm4, %ymm13, %ymm12
|
||||
# INTEL: vsm4key4 ymm12, ymm13, ymm4
|
||||
0xc4,0x62,0x16,0xda,0xe4
|
||||
|
||||
# ATT: vsm4key4 %xmm4, %xmm13, %xmm12
|
||||
# INTEL: vsm4key4 xmm12, xmm13, xmm4
|
||||
0xc4,0x62,0x12,0xda,0xe4
|
||||
|
||||
# ATT: vsm4key4 268435456(%rbp,%r14,8), %ymm13, %ymm12
|
||||
# INTEL: vsm4key4 ymm12, ymm13, ymmword ptr [rbp + 8*r14 + 268435456]
|
||||
0xc4,0x22,0x16,0xda,0xa4,0xf5,0x00,0x00,0x00,0x10
|
||||
|
||||
# ATT: vsm4key4 291(%r8,%rax,4), %ymm13, %ymm12
|
||||
# INTEL: vsm4key4 ymm12, ymm13, ymmword ptr [r8 + 4*rax + 291]
|
||||
0xc4,0x42,0x16,0xda,0xa4,0x80,0x23,0x01,0x00,0x00
|
||||
|
||||
# ATT: vsm4key4 (%rip), %ymm13, %ymm12
|
||||
# INTEL: vsm4key4 ymm12, ymm13, ymmword ptr [rip]
|
||||
0xc4,0x62,0x16,0xda,0x25,0x00,0x00,0x00,0x00
|
||||
|
||||
# ATT: vsm4key4 -1024(,%rbp,2), %ymm13, %ymm12
|
||||
# INTEL: vsm4key4 ymm12, ymm13, ymmword ptr [2*rbp - 1024]
|
||||
0xc4,0x62,0x16,0xda,0x24,0x6d,0x00,0xfc,0xff,0xff
|
||||
|
||||
# ATT: vsm4key4 4064(%rcx), %ymm13, %ymm12
|
||||
# INTEL: vsm4key4 ymm12, ymm13, ymmword ptr [rcx + 4064]
|
||||
0xc4,0x62,0x16,0xda,0xa1,0xe0,0x0f,0x00,0x00
|
||||
|
||||
# ATT: vsm4key4 -4096(%rdx), %ymm13, %ymm12
|
||||
# INTEL: vsm4key4 ymm12, ymm13, ymmword ptr [rdx - 4096]
|
||||
0xc4,0x62,0x16,0xda,0xa2,0x00,0xf0,0xff,0xff
|
||||
|
||||
# ATT: vsm4key4 268435456(%rbp,%r14,8), %xmm13, %xmm12
|
||||
# INTEL: vsm4key4 xmm12, xmm13, xmmword ptr [rbp + 8*r14 + 268435456]
|
||||
0xc4,0x22,0x12,0xda,0xa4,0xf5,0x00,0x00,0x00,0x10
|
||||
|
||||
# ATT: vsm4key4 291(%r8,%rax,4), %xmm13, %xmm12
|
||||
# INTEL: vsm4key4 xmm12, xmm13, xmmword ptr [r8 + 4*rax + 291]
|
||||
0xc4,0x42,0x12,0xda,0xa4,0x80,0x23,0x01,0x00,0x00
|
||||
|
||||
# ATT: vsm4key4 (%rip), %xmm13, %xmm12
|
||||
# INTEL: vsm4key4 xmm12, xmm13, xmmword ptr [rip]
|
||||
0xc4,0x62,0x12,0xda,0x25,0x00,0x00,0x00,0x00
|
||||
|
||||
# ATT: vsm4key4 -512(,%rbp,2), %xmm13, %xmm12
|
||||
# INTEL: vsm4key4 xmm12, xmm13, xmmword ptr [2*rbp - 512]
|
||||
0xc4,0x62,0x12,0xda,0x24,0x6d,0x00,0xfe,0xff,0xff
|
||||
|
||||
# ATT: vsm4key4 2032(%rcx), %xmm13, %xmm12
|
||||
# INTEL: vsm4key4 xmm12, xmm13, xmmword ptr [rcx + 2032]
|
||||
0xc4,0x62,0x12,0xda,0xa1,0xf0,0x07,0x00,0x00
|
||||
|
||||
# ATT: vsm4key4 -2048(%rdx), %xmm13, %xmm12
|
||||
# INTEL: vsm4key4 xmm12, xmm13, xmmword ptr [rdx - 2048]
|
||||
0xc4,0x62,0x12,0xda,0xa2,0x00,0xf8,0xff,0xff
|
||||
|
||||
# ATT: vsm4rnds4 %ymm4, %ymm13, %ymm12
|
||||
# INTEL: vsm4rnds4 ymm12, ymm13, ymm4
|
||||
0xc4,0x62,0x17,0xda,0xe4
|
||||
|
||||
# ATT: vsm4rnds4 %xmm4, %xmm13, %xmm12
|
||||
# INTEL: vsm4rnds4 xmm12, xmm13, xmm4
|
||||
0xc4,0x62,0x13,0xda,0xe4
|
||||
|
||||
# ATT: vsm4rnds4 268435456(%rbp,%r14,8), %ymm13, %ymm12
|
||||
# INTEL: vsm4rnds4 ymm12, ymm13, ymmword ptr [rbp + 8*r14 + 268435456]
|
||||
0xc4,0x22,0x17,0xda,0xa4,0xf5,0x00,0x00,0x00,0x10
|
||||
|
||||
# ATT: vsm4rnds4 291(%r8,%rax,4), %ymm13, %ymm12
|
||||
# INTEL: vsm4rnds4 ymm12, ymm13, ymmword ptr [r8 + 4*rax + 291]
|
||||
0xc4,0x42,0x17,0xda,0xa4,0x80,0x23,0x01,0x00,0x00
|
||||
|
||||
# ATT: vsm4rnds4 (%rip), %ymm13, %ymm12
|
||||
# INTEL: vsm4rnds4 ymm12, ymm13, ymmword ptr [rip]
|
||||
0xc4,0x62,0x17,0xda,0x25,0x00,0x00,0x00,0x00
|
||||
|
||||
# ATT: vsm4rnds4 -1024(,%rbp,2), %ymm13, %ymm12
|
||||
# INTEL: vsm4rnds4 ymm12, ymm13, ymmword ptr [2*rbp - 1024]
|
||||
0xc4,0x62,0x17,0xda,0x24,0x6d,0x00,0xfc,0xff,0xff
|
||||
|
||||
# ATT: vsm4rnds4 4064(%rcx), %ymm13, %ymm12
|
||||
# INTEL: vsm4rnds4 ymm12, ymm13, ymmword ptr [rcx + 4064]
|
||||
0xc4,0x62,0x17,0xda,0xa1,0xe0,0x0f,0x00,0x00
|
||||
|
||||
# ATT: vsm4rnds4 -4096(%rdx), %ymm13, %ymm12
|
||||
# INTEL: vsm4rnds4 ymm12, ymm13, ymmword ptr [rdx - 4096]
|
||||
0xc4,0x62,0x17,0xda,0xa2,0x00,0xf0,0xff,0xff
|
||||
|
||||
# ATT: vsm4rnds4 268435456(%rbp,%r14,8), %xmm13, %xmm12
|
||||
# INTEL: vsm4rnds4 xmm12, xmm13, xmmword ptr [rbp + 8*r14 + 268435456]
|
||||
0xc4,0x22,0x13,0xda,0xa4,0xf5,0x00,0x00,0x00,0x10
|
||||
|
||||
# ATT: vsm4rnds4 291(%r8,%rax,4), %xmm13, %xmm12
|
||||
# INTEL: vsm4rnds4 xmm12, xmm13, xmmword ptr [r8 + 4*rax + 291]
|
||||
0xc4,0x42,0x13,0xda,0xa4,0x80,0x23,0x01,0x00,0x00
|
||||
|
||||
# ATT: vsm4rnds4 (%rip), %xmm13, %xmm12
|
||||
# INTEL: vsm4rnds4 xmm12, xmm13, xmmword ptr [rip]
|
||||
0xc4,0x62,0x13,0xda,0x25,0x00,0x00,0x00,0x00
|
||||
|
||||
# ATT: vsm4rnds4 -512(,%rbp,2), %xmm13, %xmm12
|
||||
# INTEL: vsm4rnds4 xmm12, xmm13, xmmword ptr [2*rbp - 512]
|
||||
0xc4,0x62,0x13,0xda,0x24,0x6d,0x00,0xfe,0xff,0xff
|
||||
|
||||
# ATT: vsm4rnds4 2032(%rcx), %xmm13, %xmm12
|
||||
# INTEL: vsm4rnds4 xmm12, xmm13, xmmword ptr [rcx + 2032]
|
||||
0xc4,0x62,0x13,0xda,0xa1,0xf0,0x07,0x00,0x00
|
||||
|
||||
# ATT: vsm4rnds4 -2048(%rdx), %xmm13, %xmm12
|
||||
# INTEL: vsm4rnds4 xmm12, xmm13, xmmword ptr [rdx - 2048]
|
||||
0xc4,0x62,0x13,0xda,0xa2,0x00,0xf8,0xff,0xff
|
||||
|
||||
114
llvm/test/MC/X86/sm4-32-att.s
Normal file
114
llvm/test/MC/X86/sm4-32-att.s
Normal file
@ -0,0 +1,114 @@
|
||||
// RUN: llvm-mc -triple i686-unknown-unknown --show-encoding %s | FileCheck %s
|
||||
|
||||
// CHECK: vsm4key4 %ymm4, %ymm3, %ymm2
|
||||
// CHECK: encoding: [0xc4,0xe2,0x66,0xda,0xd4]
|
||||
vsm4key4 %ymm4, %ymm3, %ymm2
|
||||
|
||||
// CHECK: vsm4key4 %xmm4, %xmm3, %xmm2
|
||||
// CHECK: encoding: [0xc4,0xe2,0x62,0xda,0xd4]
|
||||
vsm4key4 %xmm4, %xmm3, %xmm2
|
||||
|
||||
// CHECK: vsm4key4 268435456(%esp,%esi,8), %ymm3, %ymm2
|
||||
// CHECK: encoding: [0xc4,0xe2,0x66,0xda,0x94,0xf4,0x00,0x00,0x00,0x10]
|
||||
vsm4key4 268435456(%esp,%esi,8), %ymm3, %ymm2
|
||||
|
||||
// CHECK: vsm4key4 291(%edi,%eax,4), %ymm3, %ymm2
|
||||
// CHECK: encoding: [0xc4,0xe2,0x66,0xda,0x94,0x87,0x23,0x01,0x00,0x00]
|
||||
vsm4key4 291(%edi,%eax,4), %ymm3, %ymm2
|
||||
|
||||
// CHECK: vsm4key4 (%eax), %ymm3, %ymm2
|
||||
// CHECK: encoding: [0xc4,0xe2,0x66,0xda,0x10]
|
||||
vsm4key4 (%eax), %ymm3, %ymm2
|
||||
|
||||
// CHECK: vsm4key4 -1024(,%ebp,2), %ymm3, %ymm2
|
||||
// CHECK: encoding: [0xc4,0xe2,0x66,0xda,0x14,0x6d,0x00,0xfc,0xff,0xff]
|
||||
vsm4key4 -1024(,%ebp,2), %ymm3, %ymm2
|
||||
|
||||
// CHECK: vsm4key4 4064(%ecx), %ymm3, %ymm2
|
||||
// CHECK: encoding: [0xc4,0xe2,0x66,0xda,0x91,0xe0,0x0f,0x00,0x00]
|
||||
vsm4key4 4064(%ecx), %ymm3, %ymm2
|
||||
|
||||
// CHECK: vsm4key4 -4096(%edx), %ymm3, %ymm2
|
||||
// CHECK: encoding: [0xc4,0xe2,0x66,0xda,0x92,0x00,0xf0,0xff,0xff]
|
||||
vsm4key4 -4096(%edx), %ymm3, %ymm2
|
||||
|
||||
// CHECK: vsm4key4 268435456(%esp,%esi,8), %xmm3, %xmm2
|
||||
// CHECK: encoding: [0xc4,0xe2,0x62,0xda,0x94,0xf4,0x00,0x00,0x00,0x10]
|
||||
vsm4key4 268435456(%esp,%esi,8), %xmm3, %xmm2
|
||||
|
||||
// CHECK: vsm4key4 291(%edi,%eax,4), %xmm3, %xmm2
|
||||
// CHECK: encoding: [0xc4,0xe2,0x62,0xda,0x94,0x87,0x23,0x01,0x00,0x00]
|
||||
vsm4key4 291(%edi,%eax,4), %xmm3, %xmm2
|
||||
|
||||
// CHECK: vsm4key4 (%eax), %xmm3, %xmm2
|
||||
// CHECK: encoding: [0xc4,0xe2,0x62,0xda,0x10]
|
||||
vsm4key4 (%eax), %xmm3, %xmm2
|
||||
|
||||
// CHECK: vsm4key4 -512(,%ebp,2), %xmm3, %xmm2
|
||||
// CHECK: encoding: [0xc4,0xe2,0x62,0xda,0x14,0x6d,0x00,0xfe,0xff,0xff]
|
||||
vsm4key4 -512(,%ebp,2), %xmm3, %xmm2
|
||||
|
||||
// CHECK: vsm4key4 2032(%ecx), %xmm3, %xmm2
|
||||
// CHECK: encoding: [0xc4,0xe2,0x62,0xda,0x91,0xf0,0x07,0x00,0x00]
|
||||
vsm4key4 2032(%ecx), %xmm3, %xmm2
|
||||
|
||||
// CHECK: vsm4key4 -2048(%edx), %xmm3, %xmm2
|
||||
// CHECK: encoding: [0xc4,0xe2,0x62,0xda,0x92,0x00,0xf8,0xff,0xff]
|
||||
vsm4key4 -2048(%edx), %xmm3, %xmm2
|
||||
|
||||
// CHECK: vsm4rnds4 %ymm4, %ymm3, %ymm2
|
||||
// CHECK: encoding: [0xc4,0xe2,0x67,0xda,0xd4]
|
||||
vsm4rnds4 %ymm4, %ymm3, %ymm2
|
||||
|
||||
// CHECK: vsm4rnds4 %xmm4, %xmm3, %xmm2
|
||||
// CHECK: encoding: [0xc4,0xe2,0x63,0xda,0xd4]
|
||||
vsm4rnds4 %xmm4, %xmm3, %xmm2
|
||||
|
||||
// CHECK: vsm4rnds4 268435456(%esp,%esi,8), %ymm3, %ymm2
|
||||
// CHECK: encoding: [0xc4,0xe2,0x67,0xda,0x94,0xf4,0x00,0x00,0x00,0x10]
|
||||
vsm4rnds4 268435456(%esp,%esi,8), %ymm3, %ymm2
|
||||
|
||||
// CHECK: vsm4rnds4 291(%edi,%eax,4), %ymm3, %ymm2
|
||||
// CHECK: encoding: [0xc4,0xe2,0x67,0xda,0x94,0x87,0x23,0x01,0x00,0x00]
|
||||
vsm4rnds4 291(%edi,%eax,4), %ymm3, %ymm2
|
||||
|
||||
// CHECK: vsm4rnds4 (%eax), %ymm3, %ymm2
|
||||
// CHECK: encoding: [0xc4,0xe2,0x67,0xda,0x10]
|
||||
vsm4rnds4 (%eax), %ymm3, %ymm2
|
||||
|
||||
// CHECK: vsm4rnds4 -1024(,%ebp,2), %ymm3, %ymm2
|
||||
// CHECK: encoding: [0xc4,0xe2,0x67,0xda,0x14,0x6d,0x00,0xfc,0xff,0xff]
|
||||
vsm4rnds4 -1024(,%ebp,2), %ymm3, %ymm2
|
||||
|
||||
// CHECK: vsm4rnds4 4064(%ecx), %ymm3, %ymm2
|
||||
// CHECK: encoding: [0xc4,0xe2,0x67,0xda,0x91,0xe0,0x0f,0x00,0x00]
|
||||
vsm4rnds4 4064(%ecx), %ymm3, %ymm2
|
||||
|
||||
// CHECK: vsm4rnds4 -4096(%edx), %ymm3, %ymm2
|
||||
// CHECK: encoding: [0xc4,0xe2,0x67,0xda,0x92,0x00,0xf0,0xff,0xff]
|
||||
vsm4rnds4 -4096(%edx), %ymm3, %ymm2
|
||||
|
||||
// CHECK: vsm4rnds4 268435456(%esp,%esi,8), %xmm3, %xmm2
|
||||
// CHECK: encoding: [0xc4,0xe2,0x63,0xda,0x94,0xf4,0x00,0x00,0x00,0x10]
|
||||
vsm4rnds4 268435456(%esp,%esi,8), %xmm3, %xmm2
|
||||
|
||||
// CHECK: vsm4rnds4 291(%edi,%eax,4), %xmm3, %xmm2
|
||||
// CHECK: encoding: [0xc4,0xe2,0x63,0xda,0x94,0x87,0x23,0x01,0x00,0x00]
|
||||
vsm4rnds4 291(%edi,%eax,4), %xmm3, %xmm2
|
||||
|
||||
// CHECK: vsm4rnds4 (%eax), %xmm3, %xmm2
|
||||
// CHECK: encoding: [0xc4,0xe2,0x63,0xda,0x10]
|
||||
vsm4rnds4 (%eax), %xmm3, %xmm2
|
||||
|
||||
// CHECK: vsm4rnds4 -512(,%ebp,2), %xmm3, %xmm2
|
||||
// CHECK: encoding: [0xc4,0xe2,0x63,0xda,0x14,0x6d,0x00,0xfe,0xff,0xff]
|
||||
vsm4rnds4 -512(,%ebp,2), %xmm3, %xmm2
|
||||
|
||||
// CHECK: vsm4rnds4 2032(%ecx), %xmm3, %xmm2
|
||||
// CHECK: encoding: [0xc4,0xe2,0x63,0xda,0x91,0xf0,0x07,0x00,0x00]
|
||||
vsm4rnds4 2032(%ecx), %xmm3, %xmm2
|
||||
|
||||
// CHECK: vsm4rnds4 -2048(%edx), %xmm3, %xmm2
|
||||
// CHECK: encoding: [0xc4,0xe2,0x63,0xda,0x92,0x00,0xf8,0xff,0xff]
|
||||
vsm4rnds4 -2048(%edx), %xmm3, %xmm2
|
||||
|
||||
113
llvm/test/MC/X86/sm4-32-intel.s
Normal file
113
llvm/test/MC/X86/sm4-32-intel.s
Normal file
@ -0,0 +1,113 @@
|
||||
// RUN: llvm-mc -triple i686-unknown-unknown -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
|
||||
|
||||
// CHECK: vsm4key4 ymm2, ymm3, ymm4
|
||||
// CHECK: encoding: [0xc4,0xe2,0x66,0xda,0xd4]
|
||||
vsm4key4 ymm2, ymm3, ymm4
|
||||
|
||||
// CHECK: vsm4key4 xmm2, xmm3, xmm4
|
||||
// CHECK: encoding: [0xc4,0xe2,0x62,0xda,0xd4]
|
||||
vsm4key4 xmm2, xmm3, xmm4
|
||||
|
||||
// CHECK: vsm4key4 ymm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
|
||||
// CHECK: encoding: [0xc4,0xe2,0x66,0xda,0x94,0xf4,0x00,0x00,0x00,0x10]
|
||||
vsm4key4 ymm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
|
||||
|
||||
// CHECK: vsm4key4 ymm2, ymm3, ymmword ptr [edi + 4*eax + 291]
|
||||
// CHECK: encoding: [0xc4,0xe2,0x66,0xda,0x94,0x87,0x23,0x01,0x00,0x00]
|
||||
vsm4key4 ymm2, ymm3, ymmword ptr [edi + 4*eax + 291]
|
||||
|
||||
// CHECK: vsm4key4 ymm2, ymm3, ymmword ptr [eax]
|
||||
// CHECK: encoding: [0xc4,0xe2,0x66,0xda,0x10]
|
||||
vsm4key4 ymm2, ymm3, ymmword ptr [eax]
|
||||
|
||||
// CHECK: vsm4key4 ymm2, ymm3, ymmword ptr [2*ebp - 1024]
|
||||
// CHECK: encoding: [0xc4,0xe2,0x66,0xda,0x14,0x6d,0x00,0xfc,0xff,0xff]
|
||||
vsm4key4 ymm2, ymm3, ymmword ptr [2*ebp - 1024]
|
||||
|
||||
// CHECK: vsm4key4 ymm2, ymm3, ymmword ptr [ecx + 4064]
|
||||
// CHECK: encoding: [0xc4,0xe2,0x66,0xda,0x91,0xe0,0x0f,0x00,0x00]
|
||||
vsm4key4 ymm2, ymm3, ymmword ptr [ecx + 4064]
|
||||
|
||||
// CHECK: vsm4key4 ymm2, ymm3, ymmword ptr [edx - 4096]
|
||||
// CHECK: encoding: [0xc4,0xe2,0x66,0xda,0x92,0x00,0xf0,0xff,0xff]
|
||||
vsm4key4 ymm2, ymm3, ymmword ptr [edx - 4096]
|
||||
|
||||
// CHECK: vsm4key4 xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
|
||||
// CHECK: encoding: [0xc4,0xe2,0x62,0xda,0x94,0xf4,0x00,0x00,0x00,0x10]
|
||||
vsm4key4 xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
|
||||
|
||||
// CHECK: vsm4key4 xmm2, xmm3, xmmword ptr [edi + 4*eax + 291]
|
||||
// CHECK: encoding: [0xc4,0xe2,0x62,0xda,0x94,0x87,0x23,0x01,0x00,0x00]
|
||||
vsm4key4 xmm2, xmm3, xmmword ptr [edi + 4*eax + 291]
|
||||
|
||||
// CHECK: vsm4key4 xmm2, xmm3, xmmword ptr [eax]
|
||||
// CHECK: encoding: [0xc4,0xe2,0x62,0xda,0x10]
|
||||
vsm4key4 xmm2, xmm3, xmmword ptr [eax]
|
||||
|
||||
// CHECK: vsm4key4 xmm2, xmm3, xmmword ptr [2*ebp - 512]
|
||||
// CHECK: encoding: [0xc4,0xe2,0x62,0xda,0x14,0x6d,0x00,0xfe,0xff,0xff]
|
||||
vsm4key4 xmm2, xmm3, xmmword ptr [2*ebp - 512]
|
||||
|
||||
// CHECK: vsm4key4 xmm2, xmm3, xmmword ptr [ecx + 2032]
|
||||
// CHECK: encoding: [0xc4,0xe2,0x62,0xda,0x91,0xf0,0x07,0x00,0x00]
|
||||
vsm4key4 xmm2, xmm3, xmmword ptr [ecx + 2032]
|
||||
|
||||
// CHECK: vsm4key4 xmm2, xmm3, xmmword ptr [edx - 2048]
|
||||
// CHECK: encoding: [0xc4,0xe2,0x62,0xda,0x92,0x00,0xf8,0xff,0xff]
|
||||
vsm4key4 xmm2, xmm3, xmmword ptr [edx - 2048]
|
||||
|
||||
// CHECK: vsm4rnds4 ymm2, ymm3, ymm4
|
||||
// CHECK: encoding: [0xc4,0xe2,0x67,0xda,0xd4]
|
||||
vsm4rnds4 ymm2, ymm3, ymm4
|
||||
|
||||
// CHECK: vsm4rnds4 xmm2, xmm3, xmm4
|
||||
// CHECK: encoding: [0xc4,0xe2,0x63,0xda,0xd4]
|
||||
vsm4rnds4 xmm2, xmm3, xmm4
|
||||
|
||||
// CHECK: vsm4rnds4 ymm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
|
||||
// CHECK: encoding: [0xc4,0xe2,0x67,0xda,0x94,0xf4,0x00,0x00,0x00,0x10]
|
||||
vsm4rnds4 ymm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
|
||||
|
||||
// CHECK: vsm4rnds4 ymm2, ymm3, ymmword ptr [edi + 4*eax + 291]
|
||||
// CHECK: encoding: [0xc4,0xe2,0x67,0xda,0x94,0x87,0x23,0x01,0x00,0x00]
|
||||
vsm4rnds4 ymm2, ymm3, ymmword ptr [edi + 4*eax + 291]
|
||||
|
||||
// CHECK: vsm4rnds4 ymm2, ymm3, ymmword ptr [eax]
|
||||
// CHECK: encoding: [0xc4,0xe2,0x67,0xda,0x10]
|
||||
vsm4rnds4 ymm2, ymm3, ymmword ptr [eax]
|
||||
|
||||
// CHECK: vsm4rnds4 ymm2, ymm3, ymmword ptr [2*ebp - 1024]
|
||||
// CHECK: encoding: [0xc4,0xe2,0x67,0xda,0x14,0x6d,0x00,0xfc,0xff,0xff]
|
||||
vsm4rnds4 ymm2, ymm3, ymmword ptr [2*ebp - 1024]
|
||||
|
||||
// CHECK: vsm4rnds4 ymm2, ymm3, ymmword ptr [ecx + 4064]
|
||||
// CHECK: encoding: [0xc4,0xe2,0x67,0xda,0x91,0xe0,0x0f,0x00,0x00]
|
||||
vsm4rnds4 ymm2, ymm3, ymmword ptr [ecx + 4064]
|
||||
|
||||
// CHECK: vsm4rnds4 ymm2, ymm3, ymmword ptr [edx - 4096]
|
||||
// CHECK: encoding: [0xc4,0xe2,0x67,0xda,0x92,0x00,0xf0,0xff,0xff]
|
||||
vsm4rnds4 ymm2, ymm3, ymmword ptr [edx - 4096]
|
||||
|
||||
// CHECK: vsm4rnds4 xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
|
||||
// CHECK: encoding: [0xc4,0xe2,0x63,0xda,0x94,0xf4,0x00,0x00,0x00,0x10]
|
||||
vsm4rnds4 xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
|
||||
|
||||
// CHECK: vsm4rnds4 xmm2, xmm3, xmmword ptr [edi + 4*eax + 291]
|
||||
// CHECK: encoding: [0xc4,0xe2,0x63,0xda,0x94,0x87,0x23,0x01,0x00,0x00]
|
||||
vsm4rnds4 xmm2, xmm3, xmmword ptr [edi + 4*eax + 291]
|
||||
|
||||
// CHECK: vsm4rnds4 xmm2, xmm3, xmmword ptr [eax]
|
||||
// CHECK: encoding: [0xc4,0xe2,0x63,0xda,0x10]
|
||||
vsm4rnds4 xmm2, xmm3, xmmword ptr [eax]
|
||||
|
||||
// CHECK: vsm4rnds4 xmm2, xmm3, xmmword ptr [2*ebp - 512]
|
||||
// CHECK: encoding: [0xc4,0xe2,0x63,0xda,0x14,0x6d,0x00,0xfe,0xff,0xff]
|
||||
vsm4rnds4 xmm2, xmm3, xmmword ptr [2*ebp - 512]
|
||||
|
||||
// CHECK: vsm4rnds4 xmm2, xmm3, xmmword ptr [ecx + 2032]
|
||||
// CHECK: encoding: [0xc4,0xe2,0x63,0xda,0x91,0xf0,0x07,0x00,0x00]
|
||||
vsm4rnds4 xmm2, xmm3, xmmword ptr [ecx + 2032]
|
||||
|
||||
// CHECK: vsm4rnds4 xmm2, xmm3, xmmword ptr [edx - 2048]
|
||||
// CHECK: encoding: [0xc4,0xe2,0x63,0xda,0x92,0x00,0xf8,0xff,0xff]
|
||||
vsm4rnds4 xmm2, xmm3, xmmword ptr [edx - 2048]
|
||||
114
llvm/test/MC/X86/sm4-64-att.s
Normal file
114
llvm/test/MC/X86/sm4-64-att.s
Normal file
@ -0,0 +1,114 @@
|
||||
// RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
|
||||
|
||||
// CHECK: vsm4key4 %ymm4, %ymm13, %ymm12
|
||||
// CHECK: encoding: [0xc4,0x62,0x16,0xda,0xe4]
|
||||
vsm4key4 %ymm4, %ymm13, %ymm12
|
||||
|
||||
// CHECK: vsm4key4 %xmm4, %xmm13, %xmm12
|
||||
// CHECK: encoding: [0xc4,0x62,0x12,0xda,0xe4]
|
||||
vsm4key4 %xmm4, %xmm13, %xmm12
|
||||
|
||||
// CHECK: vsm4key4 268435456(%rbp,%r14,8), %ymm13, %ymm12
|
||||
// CHECK: encoding: [0xc4,0x22,0x16,0xda,0xa4,0xf5,0x00,0x00,0x00,0x10]
|
||||
vsm4key4 268435456(%rbp,%r14,8), %ymm13, %ymm12
|
||||
|
||||
// CHECK: vsm4key4 291(%r8,%rax,4), %ymm13, %ymm12
|
||||
// CHECK: encoding: [0xc4,0x42,0x16,0xda,0xa4,0x80,0x23,0x01,0x00,0x00]
|
||||
vsm4key4 291(%r8,%rax,4), %ymm13, %ymm12
|
||||
|
||||
// CHECK: vsm4key4 (%rip), %ymm13, %ymm12
|
||||
// CHECK: encoding: [0xc4,0x62,0x16,0xda,0x25,0x00,0x00,0x00,0x00]
|
||||
vsm4key4 (%rip), %ymm13, %ymm12
|
||||
|
||||
// CHECK: vsm4key4 -1024(,%rbp,2), %ymm13, %ymm12
|
||||
// CHECK: encoding: [0xc4,0x62,0x16,0xda,0x24,0x6d,0x00,0xfc,0xff,0xff]
|
||||
vsm4key4 -1024(,%rbp,2), %ymm13, %ymm12
|
||||
|
||||
// CHECK: vsm4key4 4064(%rcx), %ymm13, %ymm12
|
||||
// CHECK: encoding: [0xc4,0x62,0x16,0xda,0xa1,0xe0,0x0f,0x00,0x00]
|
||||
vsm4key4 4064(%rcx), %ymm13, %ymm12
|
||||
|
||||
// CHECK: vsm4key4 -4096(%rdx), %ymm13, %ymm12
|
||||
// CHECK: encoding: [0xc4,0x62,0x16,0xda,0xa2,0x00,0xf0,0xff,0xff]
|
||||
vsm4key4 -4096(%rdx), %ymm13, %ymm12
|
||||
|
||||
// CHECK: vsm4key4 268435456(%rbp,%r14,8), %xmm13, %xmm12
|
||||
// CHECK: encoding: [0xc4,0x22,0x12,0xda,0xa4,0xf5,0x00,0x00,0x00,0x10]
|
||||
vsm4key4 268435456(%rbp,%r14,8), %xmm13, %xmm12
|
||||
|
||||
// CHECK: vsm4key4 291(%r8,%rax,4), %xmm13, %xmm12
|
||||
// CHECK: encoding: [0xc4,0x42,0x12,0xda,0xa4,0x80,0x23,0x01,0x00,0x00]
|
||||
vsm4key4 291(%r8,%rax,4), %xmm13, %xmm12
|
||||
|
||||
// CHECK: vsm4key4 (%rip), %xmm13, %xmm12
|
||||
// CHECK: encoding: [0xc4,0x62,0x12,0xda,0x25,0x00,0x00,0x00,0x00]
|
||||
vsm4key4 (%rip), %xmm13, %xmm12
|
||||
|
||||
// CHECK: vsm4key4 -512(,%rbp,2), %xmm13, %xmm12
|
||||
// CHECK: encoding: [0xc4,0x62,0x12,0xda,0x24,0x6d,0x00,0xfe,0xff,0xff]
|
||||
vsm4key4 -512(,%rbp,2), %xmm13, %xmm12
|
||||
|
||||
// CHECK: vsm4key4 2032(%rcx), %xmm13, %xmm12
|
||||
// CHECK: encoding: [0xc4,0x62,0x12,0xda,0xa1,0xf0,0x07,0x00,0x00]
|
||||
vsm4key4 2032(%rcx), %xmm13, %xmm12
|
||||
|
||||
// CHECK: vsm4key4 -2048(%rdx), %xmm13, %xmm12
|
||||
// CHECK: encoding: [0xc4,0x62,0x12,0xda,0xa2,0x00,0xf8,0xff,0xff]
|
||||
vsm4key4 -2048(%rdx), %xmm13, %xmm12
|
||||
|
||||
// CHECK: vsm4rnds4 %ymm4, %ymm13, %ymm12
|
||||
// CHECK: encoding: [0xc4,0x62,0x17,0xda,0xe4]
|
||||
vsm4rnds4 %ymm4, %ymm13, %ymm12
|
||||
|
||||
// CHECK: vsm4rnds4 %xmm4, %xmm13, %xmm12
|
||||
// CHECK: encoding: [0xc4,0x62,0x13,0xda,0xe4]
|
||||
vsm4rnds4 %xmm4, %xmm13, %xmm12
|
||||
|
||||
// CHECK: vsm4rnds4 268435456(%rbp,%r14,8), %ymm13, %ymm12
|
||||
// CHECK: encoding: [0xc4,0x22,0x17,0xda,0xa4,0xf5,0x00,0x00,0x00,0x10]
|
||||
vsm4rnds4 268435456(%rbp,%r14,8), %ymm13, %ymm12
|
||||
|
||||
// CHECK: vsm4rnds4 291(%r8,%rax,4), %ymm13, %ymm12
|
||||
// CHECK: encoding: [0xc4,0x42,0x17,0xda,0xa4,0x80,0x23,0x01,0x00,0x00]
|
||||
vsm4rnds4 291(%r8,%rax,4), %ymm13, %ymm12
|
||||
|
||||
// CHECK: vsm4rnds4 (%rip), %ymm13, %ymm12
|
||||
// CHECK: encoding: [0xc4,0x62,0x17,0xda,0x25,0x00,0x00,0x00,0x00]
|
||||
vsm4rnds4 (%rip), %ymm13, %ymm12
|
||||
|
||||
// CHECK: vsm4rnds4 -1024(,%rbp,2), %ymm13, %ymm12
|
||||
// CHECK: encoding: [0xc4,0x62,0x17,0xda,0x24,0x6d,0x00,0xfc,0xff,0xff]
|
||||
vsm4rnds4 -1024(,%rbp,2), %ymm13, %ymm12
|
||||
|
||||
// CHECK: vsm4rnds4 4064(%rcx), %ymm13, %ymm12
|
||||
// CHECK: encoding: [0xc4,0x62,0x17,0xda,0xa1,0xe0,0x0f,0x00,0x00]
|
||||
vsm4rnds4 4064(%rcx), %ymm13, %ymm12
|
||||
|
||||
// CHECK: vsm4rnds4 -4096(%rdx), %ymm13, %ymm12
|
||||
// CHECK: encoding: [0xc4,0x62,0x17,0xda,0xa2,0x00,0xf0,0xff,0xff]
|
||||
vsm4rnds4 -4096(%rdx), %ymm13, %ymm12
|
||||
|
||||
// CHECK: vsm4rnds4 268435456(%rbp,%r14,8), %xmm13, %xmm12
|
||||
// CHECK: encoding: [0xc4,0x22,0x13,0xda,0xa4,0xf5,0x00,0x00,0x00,0x10]
|
||||
vsm4rnds4 268435456(%rbp,%r14,8), %xmm13, %xmm12
|
||||
|
||||
// CHECK: vsm4rnds4 291(%r8,%rax,4), %xmm13, %xmm12
|
||||
// CHECK: encoding: [0xc4,0x42,0x13,0xda,0xa4,0x80,0x23,0x01,0x00,0x00]
|
||||
vsm4rnds4 291(%r8,%rax,4), %xmm13, %xmm12
|
||||
|
||||
// CHECK: vsm4rnds4 (%rip), %xmm13, %xmm12
|
||||
// CHECK: encoding: [0xc4,0x62,0x13,0xda,0x25,0x00,0x00,0x00,0x00]
|
||||
vsm4rnds4 (%rip), %xmm13, %xmm12
|
||||
|
||||
// CHECK: vsm4rnds4 -512(,%rbp,2), %xmm13, %xmm12
|
||||
// CHECK: encoding: [0xc4,0x62,0x13,0xda,0x24,0x6d,0x00,0xfe,0xff,0xff]
|
||||
vsm4rnds4 -512(,%rbp,2), %xmm13, %xmm12
|
||||
|
||||
// CHECK: vsm4rnds4 2032(%rcx), %xmm13, %xmm12
|
||||
// CHECK: encoding: [0xc4,0x62,0x13,0xda,0xa1,0xf0,0x07,0x00,0x00]
|
||||
vsm4rnds4 2032(%rcx), %xmm13, %xmm12
|
||||
|
||||
// CHECK: vsm4rnds4 -2048(%rdx), %xmm13, %xmm12
|
||||
// CHECK: encoding: [0xc4,0x62,0x13,0xda,0xa2,0x00,0xf8,0xff,0xff]
|
||||
vsm4rnds4 -2048(%rdx), %xmm13, %xmm12
|
||||
|
||||
114
llvm/test/MC/X86/sm4-64-intel.s
Normal file
114
llvm/test/MC/X86/sm4-64-intel.s
Normal file
@ -0,0 +1,114 @@
|
||||
// RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
|
||||
|
||||
// CHECK: vsm4key4 ymm12, ymm13, ymm4
|
||||
// CHECK: encoding: [0xc4,0x62,0x16,0xda,0xe4]
|
||||
vsm4key4 ymm12, ymm13, ymm4
|
||||
|
||||
// CHECK: vsm4key4 xmm12, xmm13, xmm4
|
||||
// CHECK: encoding: [0xc4,0x62,0x12,0xda,0xe4]
|
||||
vsm4key4 xmm12, xmm13, xmm4
|
||||
|
||||
// CHECK: vsm4key4 ymm12, ymm13, ymmword ptr [rbp + 8*r14 + 268435456]
|
||||
// CHECK: encoding: [0xc4,0x22,0x16,0xda,0xa4,0xf5,0x00,0x00,0x00,0x10]
|
||||
vsm4key4 ymm12, ymm13, ymmword ptr [rbp + 8*r14 + 268435456]
|
||||
|
||||
// CHECK: vsm4key4 ymm12, ymm13, ymmword ptr [r8 + 4*rax + 291]
|
||||
// CHECK: encoding: [0xc4,0x42,0x16,0xda,0xa4,0x80,0x23,0x01,0x00,0x00]
|
||||
vsm4key4 ymm12, ymm13, ymmword ptr [r8 + 4*rax + 291]
|
||||
|
||||
// CHECK: vsm4key4 ymm12, ymm13, ymmword ptr [rip]
|
||||
// CHECK: encoding: [0xc4,0x62,0x16,0xda,0x25,0x00,0x00,0x00,0x00]
|
||||
vsm4key4 ymm12, ymm13, ymmword ptr [rip]
|
||||
|
||||
// CHECK: vsm4key4 ymm12, ymm13, ymmword ptr [2*rbp - 1024]
|
||||
// CHECK: encoding: [0xc4,0x62,0x16,0xda,0x24,0x6d,0x00,0xfc,0xff,0xff]
|
||||
vsm4key4 ymm12, ymm13, ymmword ptr [2*rbp - 1024]
|
||||
|
||||
// CHECK: vsm4key4 ymm12, ymm13, ymmword ptr [rcx + 4064]
|
||||
// CHECK: encoding: [0xc4,0x62,0x16,0xda,0xa1,0xe0,0x0f,0x00,0x00]
|
||||
vsm4key4 ymm12, ymm13, ymmword ptr [rcx + 4064]
|
||||
|
||||
// CHECK: vsm4key4 ymm12, ymm13, ymmword ptr [rdx - 4096]
|
||||
// CHECK: encoding: [0xc4,0x62,0x16,0xda,0xa2,0x00,0xf0,0xff,0xff]
|
||||
vsm4key4 ymm12, ymm13, ymmword ptr [rdx - 4096]
|
||||
|
||||
// CHECK: vsm4key4 xmm12, xmm13, xmmword ptr [rbp + 8*r14 + 268435456]
|
||||
// CHECK: encoding: [0xc4,0x22,0x12,0xda,0xa4,0xf5,0x00,0x00,0x00,0x10]
|
||||
vsm4key4 xmm12, xmm13, xmmword ptr [rbp + 8*r14 + 268435456]
|
||||
|
||||
// CHECK: vsm4key4 xmm12, xmm13, xmmword ptr [r8 + 4*rax + 291]
|
||||
// CHECK: encoding: [0xc4,0x42,0x12,0xda,0xa4,0x80,0x23,0x01,0x00,0x00]
|
||||
vsm4key4 xmm12, xmm13, xmmword ptr [r8 + 4*rax + 291]
|
||||
|
||||
// CHECK: vsm4key4 xmm12, xmm13, xmmword ptr [rip]
|
||||
// CHECK: encoding: [0xc4,0x62,0x12,0xda,0x25,0x00,0x00,0x00,0x00]
|
||||
vsm4key4 xmm12, xmm13, xmmword ptr [rip]
|
||||
|
||||
// CHECK: vsm4key4 xmm12, xmm13, xmmword ptr [2*rbp - 512]
|
||||
// CHECK: encoding: [0xc4,0x62,0x12,0xda,0x24,0x6d,0x00,0xfe,0xff,0xff]
|
||||
vsm4key4 xmm12, xmm13, xmmword ptr [2*rbp - 512]
|
||||
|
||||
// CHECK: vsm4key4 xmm12, xmm13, xmmword ptr [rcx + 2032]
|
||||
// CHECK: encoding: [0xc4,0x62,0x12,0xda,0xa1,0xf0,0x07,0x00,0x00]
|
||||
vsm4key4 xmm12, xmm13, xmmword ptr [rcx + 2032]
|
||||
|
||||
// CHECK: vsm4key4 xmm12, xmm13, xmmword ptr [rdx - 2048]
|
||||
// CHECK: encoding: [0xc4,0x62,0x12,0xda,0xa2,0x00,0xf8,0xff,0xff]
|
||||
vsm4key4 xmm12, xmm13, xmmword ptr [rdx - 2048]
|
||||
|
||||
// CHECK: vsm4rnds4 ymm12, ymm13, ymm4
|
||||
// CHECK: encoding: [0xc4,0x62,0x17,0xda,0xe4]
|
||||
vsm4rnds4 ymm12, ymm13, ymm4
|
||||
|
||||
// CHECK: vsm4rnds4 xmm12, xmm13, xmm4
|
||||
// CHECK: encoding: [0xc4,0x62,0x13,0xda,0xe4]
|
||||
vsm4rnds4 xmm12, xmm13, xmm4
|
||||
|
||||
// CHECK: vsm4rnds4 ymm12, ymm13, ymmword ptr [rbp + 8*r14 + 268435456]
|
||||
// CHECK: encoding: [0xc4,0x22,0x17,0xda,0xa4,0xf5,0x00,0x00,0x00,0x10]
|
||||
vsm4rnds4 ymm12, ymm13, ymmword ptr [rbp + 8*r14 + 268435456]
|
||||
|
||||
// CHECK: vsm4rnds4 ymm12, ymm13, ymmword ptr [r8 + 4*rax + 291]
|
||||
// CHECK: encoding: [0xc4,0x42,0x17,0xda,0xa4,0x80,0x23,0x01,0x00,0x00]
|
||||
vsm4rnds4 ymm12, ymm13, ymmword ptr [r8 + 4*rax + 291]
|
||||
|
||||
// CHECK: vsm4rnds4 ymm12, ymm13, ymmword ptr [rip]
|
||||
// CHECK: encoding: [0xc4,0x62,0x17,0xda,0x25,0x00,0x00,0x00,0x00]
|
||||
vsm4rnds4 ymm12, ymm13, ymmword ptr [rip]
|
||||
|
||||
// CHECK: vsm4rnds4 ymm12, ymm13, ymmword ptr [2*rbp - 1024]
|
||||
// CHECK: encoding: [0xc4,0x62,0x17,0xda,0x24,0x6d,0x00,0xfc,0xff,0xff]
|
||||
vsm4rnds4 ymm12, ymm13, ymmword ptr [2*rbp - 1024]
|
||||
|
||||
// CHECK: vsm4rnds4 ymm12, ymm13, ymmword ptr [rcx + 4064]
|
||||
// CHECK: encoding: [0xc4,0x62,0x17,0xda,0xa1,0xe0,0x0f,0x00,0x00]
|
||||
vsm4rnds4 ymm12, ymm13, ymmword ptr [rcx + 4064]
|
||||
|
||||
// CHECK: vsm4rnds4 ymm12, ymm13, ymmword ptr [rdx - 4096]
|
||||
// CHECK: encoding: [0xc4,0x62,0x17,0xda,0xa2,0x00,0xf0,0xff,0xff]
|
||||
vsm4rnds4 ymm12, ymm13, ymmword ptr [rdx - 4096]
|
||||
|
||||
// CHECK: vsm4rnds4 xmm12, xmm13, xmmword ptr [rbp + 8*r14 + 268435456]
|
||||
// CHECK: encoding: [0xc4,0x22,0x13,0xda,0xa4,0xf5,0x00,0x00,0x00,0x10]
|
||||
vsm4rnds4 xmm12, xmm13, xmmword ptr [rbp + 8*r14 + 268435456]
|
||||
|
||||
// CHECK: vsm4rnds4 xmm12, xmm13, xmmword ptr [r8 + 4*rax + 291]
|
||||
// CHECK: encoding: [0xc4,0x42,0x13,0xda,0xa4,0x80,0x23,0x01,0x00,0x00]
|
||||
vsm4rnds4 xmm12, xmm13, xmmword ptr [r8 + 4*rax + 291]
|
||||
|
||||
// CHECK: vsm4rnds4 xmm12, xmm13, xmmword ptr [rip]
|
||||
// CHECK: encoding: [0xc4,0x62,0x13,0xda,0x25,0x00,0x00,0x00,0x00]
|
||||
vsm4rnds4 xmm12, xmm13, xmmword ptr [rip]
|
||||
|
||||
// CHECK: vsm4rnds4 xmm12, xmm13, xmmword ptr [2*rbp - 512]
|
||||
// CHECK: encoding: [0xc4,0x62,0x13,0xda,0x24,0x6d,0x00,0xfe,0xff,0xff]
|
||||
vsm4rnds4 xmm12, xmm13, xmmword ptr [2*rbp - 512]
|
||||
|
||||
// CHECK: vsm4rnds4 xmm12, xmm13, xmmword ptr [rcx + 2032]
|
||||
// CHECK: encoding: [0xc4,0x62,0x13,0xda,0xa1,0xf0,0x07,0x00,0x00]
|
||||
vsm4rnds4 xmm12, xmm13, xmmword ptr [rcx + 2032]
|
||||
|
||||
// CHECK: vsm4rnds4 xmm12, xmm13, xmmword ptr [rdx - 2048]
|
||||
// CHECK: encoding: [0xc4,0x62,0x13,0xda,0xa2,0x00,0xf8,0xff,0xff]
|
||||
vsm4rnds4 xmm12, xmm13, xmmword ptr [rdx - 2048]
|
||||
|
||||
@ -3169,6 +3169,10 @@ static const X86MemoryFoldTableEntry MemoryFoldTable2[] = {
|
||||
{X86::VSHUFPSZ256rri, X86::VSHUFPSZ256rmi, 0},
|
||||
{X86::VSHUFPSZrri, X86::VSHUFPSZrmi, 0},
|
||||
{X86::VSHUFPSrri, X86::VSHUFPSrmi, 0},
|
||||
{X86::VSM4KEY4Yrr, X86::VSM4KEY4Yrm, 0},
|
||||
{X86::VSM4KEY4rr, X86::VSM4KEY4rm, 0},
|
||||
{X86::VSM4RNDS4Yrr, X86::VSM4RNDS4Yrm, 0},
|
||||
{X86::VSM4RNDS4rr, X86::VSM4RNDS4rm, 0},
|
||||
{X86::VSQRTPDZ128rkz, X86::VSQRTPDZ128mkz, 0},
|
||||
{X86::VSQRTPDZ256rkz, X86::VSQRTPDZ256mkz, 0},
|
||||
{X86::VSQRTPDZrkz, X86::VSQRTPDZmkz, 0},
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user