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[PowerPC] Add type checking for DMF insert (#172078)

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Create PPCISD nodes for DMF DMXXINSTDMR512 and DMXXINSTDMR256 operations
to allow type checking.
This commit is contained in:
RolandF77 2026-01-08 12:34:43 -05:00 committed by GitHub
parent 3c84812232
commit 057c7a79e3
No known key found for this signature in database
GPG Key ID: B5690EEEBB952194
11 changed files with 542 additions and 523 deletions
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43
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
View File

@ -11234,14 +11234,14 @@ SDValue PPCTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
unsigned Opcode;
unsigned Subx;
if (HiLo == 0) {
Opcode = PPC::DMXXINSTDMR512;
Opcode = PPCISD::INST512;
Subx = PPC::sub_wacc_lo;
} else {
Opcode = PPC::DMXXINSTDMR512_HI;
Opcode = PPCISD::INST512HI;
Subx = PPC::sub_wacc_hi;
}
SDValue Ops[] = {Op.getOperand(2), Op.getOperand(3)};
SDValue Wacc = SDValue(DAG.getMachineNode(Opcode, dl, MVT::v512i1, Ops), 0);
SDValue Wacc = DAG.getNode(Opcode, dl, MVT::v512i1, Op.getOperand(2),
Op.getOperand(3));
SDValue SubReg = DAG.getTargetConstant(Subx, dl, MVT::i32);
return SDValue(DAG.getMachineNode(PPC::INSERT_SUBREG, dl, MVT::v1024i1,
Op.getOperand(1), Wacc, SubReg),
@ -11271,9 +11271,8 @@ SDValue PPCTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
}
SDValue SubReg = DAG.getTargetConstant(Subx, dl, MVT::i32);
SDValue P = DAG.getTargetConstant(IdxVal, dl, MVT::i32);
SDValue Ops[] = {Op.getOperand(2), P};
SDValue DMRRowp = SDValue(
DAG.getMachineNode(PPC::DMXXINSTDMR256, dl, MVT::v256i1, Ops), 0);
SDValue DMRRowp =
DAG.getNode(PPCISD::INST256, dl, MVT::v256i1, Op.getOperand(2), P);
return SDValue(DAG.getMachineNode(PPC::INSERT_SUBREG, dl, MVT::v1024i1,
Op.getOperand(1), DMRRowp, SubReg),
0);
@ -12012,13 +12011,11 @@ SDValue PPCTargetLowering::LowerDMFVectorLoad(SDValue Op,
}
SDValue TF = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, LoadChains);
SDValue Lo(DAG.getMachineNode(PPC::DMXXINSTDMR512, dl, MVT::v512i1, Loads[0],
Loads[1]),
0);
SDValue Lo =
DAG.getNode(PPCISD::INST512, dl, MVT::v512i1, Loads[0], Loads[1]);
SDValue LoSub = DAG.getTargetConstant(PPC::sub_wacc_lo, dl, MVT::i32);
SDValue Hi(DAG.getMachineNode(PPC::DMXXINSTDMR512_HI, dl, MVT::v512i1,
Loads[2], Loads[3]),
0);
SDValue Hi =
DAG.getNode(PPCISD::INST512HI, dl, MVT::v512i1, Loads[2], Loads[3]);
SDValue HiSub = DAG.getTargetConstant(PPC::sub_wacc_hi, dl, MVT::i32);
SDValue RC = DAG.getTargetConstant(PPC::DMRRCRegClassID, dl, MVT::i32);
const SDValue Ops[] = {RC, Lo, LoSub, Hi, HiSub};
@ -12032,12 +12029,10 @@ SDValue PPCTargetLowering::LowerDMFVectorLoad(SDValue Op,
// Handle Loads for V2048i1 which represents a dmr pair.
SDValue DmrPValue;
SDValue Dmr1Lo(DAG.getMachineNode(PPC::DMXXINSTDMR512, dl, MVT::v512i1,
Loads[4], Loads[5]),
0);
SDValue Dmr1Hi(DAG.getMachineNode(PPC::DMXXINSTDMR512_HI, dl, MVT::v512i1,
Loads[6], Loads[7]),
0);
SDValue Dmr1Lo =
DAG.getNode(PPCISD::INST512, dl, MVT::v512i1, Loads[4], Loads[5]);
SDValue Dmr1Hi =
DAG.getNode(PPCISD::INST512HI, dl, MVT::v512i1, Loads[6], Loads[7]);
const SDValue Dmr1Ops[] = {RC, Dmr1Lo, LoSub, Dmr1Hi, HiSub};
SDValue Dmr1Value = SDValue(
DAG.getMachineNode(PPC::REG_SEQUENCE, dl, MVT::v1024i1, Dmr1Ops), 0);
@ -12057,13 +12052,11 @@ SDValue PPCTargetLowering::LowerDMFVectorLoad(SDValue Op,
SDValue PPCTargetLowering::DMFInsert1024(const SmallVectorImpl<SDValue> &Pairs,
const SDLoc &dl,
SelectionDAG &DAG) const {
SDValue Lo(DAG.getMachineNode(PPC::DMXXINSTDMR512, dl, MVT::v512i1, Pairs[0],
Pairs[1]),
0);
SDValue Lo =
DAG.getNode(PPCISD::INST512, dl, MVT::v512i1, Pairs[0], Pairs[1]);
SDValue LoSub = DAG.getTargetConstant(PPC::sub_wacc_lo, dl, MVT::i32);
SDValue Hi(DAG.getMachineNode(PPC::DMXXINSTDMR512_HI, dl, MVT::v512i1,
Pairs[2], Pairs[3]),
0);
SDValue Hi =
DAG.getNode(PPCISD::INST512HI, dl, MVT::v512i1, Pairs[2], Pairs[3]);
SDValue HiSub = DAG.getTargetConstant(PPC::sub_wacc_hi, dl, MVT::i32);
SDValue RC = DAG.getTargetConstant(PPC::DMRRCRegClassID, dl, MVT::i32);

32
llvm/lib/Target/PowerPC/PPCInstrFutureMMA.td
View File

@ -12,6 +12,27 @@
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
// PowerPC ISA Future specific type constraints.
//
def SDT_PPCInst512 : SDTypeProfile<1, 2, [
SDTCisVT<0, v512i1>, SDTCisVT<1, v256i1>, SDTCisVT<2, v256i1>
]>;
def SDT_PPCInst256 : SDTypeProfile<1, 2, [
SDTCisVT<0, v256i1>, SDTCisVT<1, v256i1>, SDTCisVT<2, i32>
]>;
//===----------------------------------------------------------------------===//
// ISA Future specific PPCISD nodes.
//
def PPCInst512 : SDNode<"PPCISD::INST512", SDT_PPCInst512, []>;
def PPCInst512Hi : SDNode<"PPCISD::INST512HI", SDT_PPCInst512, []>;
def PPCInst256 : SDNode<"PPCISD::INST256", SDT_PPCInst256, []>;
//===----------------------------------------------------------------------===//
class XX3Form_AT3_XABp5_P1<bits<6> opcode, bits<8> xo, dag OOL, dag IOL,
string asmstr, list<dag> pattern>
: I<opcode, OOL, IOL, asmstr, NoItinerary> {
@ -429,14 +450,18 @@ let Predicates = [MMA, IsISAFuture] in {
def DMXXINSTDMR512
: XX3Form_AT3_XABp5_P1<60, 234, (outs wacc:$AT),
(ins vsrprc:$XAp, vsrprc:$XBp),
"dmxxinstdmr512 $AT, $XAp, $XBp, 0", []> {
"dmxxinstdmr512 $AT, $XAp, $XBp, 0",
[(set v512i1:$AT, (PPCInst512 v256i1:$XAp,
v256i1:$XBp))]> {
let P = 0;
}
def DMXXINSTDMR512_HI
: XX3Form_AT3_XABp5_P1<60, 234, (outs wacc_hi:$AT),
(ins vsrprc:$XAp, vsrprc:$XBp),
"dmxxinstdmr512 $AT, $XAp, $XBp, 1", []> {
"dmxxinstdmr512 $AT, $XAp, $XBp, 1",
[(set v512i1:$AT, (PPCInst512Hi v256i1:$XAp,
v256i1:$XBp))]> {
let P = 1;
}
@ -446,7 +471,8 @@ let Predicates = [MMA, IsISAFuture] in {
def DMXXINSTDMR256 : XX2Form_AT3_XBp5_P2<60, 485, (outs dmrrowp:$AT),
(ins vsrprc:$XBp, u2imm:$P),
"dmxxinstdmr256 $AT, $XBp, $P", []>;
"dmxxinstdmr256 $AT, $XBp, $P",
[(set v256i1:$AT, (PPCInst256 v256i1:$XBp, timm:$P))]>;
def DMMR
: XForm_ATB3<31, 6, 177, (outs dmr:$AT), (ins dmr:$AB), "dmmr $AT, $AB",

560
llvm/test/CodeGen/PowerPC/dmf-outer-product.ll
View File

@ -51,14 +51,14 @@ define void @test_dmxvi8gerx4pp(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxvp vsp34, 0(r3)
; CHECK-NEXT: lxvp vsp36, 32(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 64(r3)
; CHECK-NEXT: lxvp vsp36, 96(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-NEXT: lxv v2, 16(r4)
; CHECK-NEXT: lxvp vsp32, 64(r3)
; CHECK-NEXT: lxvp vsp38, 96(r3)
; CHECK-NEXT: lxv v8, 16(r4)
; CHECK-NEXT: lxv v9, 0(r4)
; CHECK-NEXT: lxv vs0, 0(r5)
; CHECK-NEXT: lxv v3, 0(r4)
; CHECK-NEXT: dmxvi8gerx4pp dmr0, vsp34, vs0
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-NEXT: dmxvi8gerx4pp dmr0, vsp40, vs0
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-NEXT: stxvp vsp34, 96(r6)
; CHECK-NEXT: stxvp vsp36, 64(r6)
@ -71,14 +71,14 @@ define void @test_dmxvi8gerx4pp(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: lxvp vsp34, 96(r3)
; CHECK-BE-NEXT: lxvp vsp36, 64(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: lxvp vsp34, 32(r3)
; CHECK-BE-NEXT: lxvp vsp36, 0(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-BE-NEXT: lxv v2, 0(r4)
; CHECK-BE-NEXT: lxvp vsp32, 32(r3)
; CHECK-BE-NEXT: lxvp vsp38, 0(r3)
; CHECK-BE-NEXT: lxv v8, 0(r4)
; CHECK-BE-NEXT: lxv v9, 16(r4)
; CHECK-BE-NEXT: lxv vs0, 0(r5)
; CHECK-BE-NEXT: lxv v3, 16(r4)
; CHECK-BE-NEXT: dmxvi8gerx4pp dmr0, vsp34, vs0
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-BE-NEXT: dmxvi8gerx4pp dmr0, vsp40, vs0
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 1
; CHECK-BE-NEXT: stxvp vsp36, 96(r6)
; CHECK-BE-NEXT: stxvp vsp34, 64(r6)
@ -102,14 +102,14 @@ define void @test_dmxvi8gerx4spp(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxvp vsp34, 0(r3)
; CHECK-NEXT: lxvp vsp36, 32(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 64(r3)
; CHECK-NEXT: lxvp vsp36, 96(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-NEXT: lxv v2, 16(r4)
; CHECK-NEXT: lxvp vsp32, 64(r3)
; CHECK-NEXT: lxvp vsp38, 96(r3)
; CHECK-NEXT: lxv v8, 16(r4)
; CHECK-NEXT: lxv v9, 0(r4)
; CHECK-NEXT: lxv vs0, 0(r5)
; CHECK-NEXT: lxv v3, 0(r4)
; CHECK-NEXT: dmxvi8gerx4spp dmr0, vsp34, vs0
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-NEXT: dmxvi8gerx4spp dmr0, vsp40, vs0
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-NEXT: stxvp vsp34, 96(r6)
; CHECK-NEXT: stxvp vsp36, 64(r6)
@ -122,14 +122,14 @@ define void @test_dmxvi8gerx4spp(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: lxvp vsp34, 96(r3)
; CHECK-BE-NEXT: lxvp vsp36, 64(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: lxvp vsp34, 32(r3)
; CHECK-BE-NEXT: lxvp vsp36, 0(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-BE-NEXT: lxv v2, 0(r4)
; CHECK-BE-NEXT: lxvp vsp32, 32(r3)
; CHECK-BE-NEXT: lxvp vsp38, 0(r3)
; CHECK-BE-NEXT: lxv v8, 0(r4)
; CHECK-BE-NEXT: lxv v9, 16(r4)
; CHECK-BE-NEXT: lxv vs0, 0(r5)
; CHECK-BE-NEXT: lxv v3, 16(r4)
; CHECK-BE-NEXT: dmxvi8gerx4spp dmr0, vsp34, vs0
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-BE-NEXT: dmxvi8gerx4spp dmr0, vsp40, vs0
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 1
; CHECK-BE-NEXT: stxvp vsp36, 96(r6)
; CHECK-BE-NEXT: stxvp vsp34, 64(r6)
@ -153,14 +153,14 @@ define void @test_pmdmxvi8gerx4pp(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxvp vsp34, 0(r3)
; CHECK-NEXT: lxvp vsp36, 32(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 64(r3)
; CHECK-NEXT: lxvp vsp36, 96(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-NEXT: lxv v2, 16(r4)
; CHECK-NEXT: lxvp vsp32, 64(r3)
; CHECK-NEXT: lxvp vsp38, 96(r3)
; CHECK-NEXT: lxv v8, 16(r4)
; CHECK-NEXT: lxv v9, 0(r4)
; CHECK-NEXT: lxv vs0, 0(r5)
; CHECK-NEXT: lxv v3, 0(r4)
; CHECK-NEXT: pmdmxvi8gerx4pp dmr0, vsp34, vs0, 42, 7, 9
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-NEXT: pmdmxvi8gerx4pp dmr0, vsp40, vs0, 42, 7, 9
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-NEXT: stxvp vsp34, 96(r6)
; CHECK-NEXT: stxvp vsp36, 64(r6)
@ -173,14 +173,14 @@ define void @test_pmdmxvi8gerx4pp(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: lxvp vsp34, 96(r3)
; CHECK-BE-NEXT: lxvp vsp36, 64(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: lxvp vsp34, 32(r3)
; CHECK-BE-NEXT: lxvp vsp36, 0(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-BE-NEXT: lxv v2, 0(r4)
; CHECK-BE-NEXT: lxvp vsp32, 32(r3)
; CHECK-BE-NEXT: lxvp vsp38, 0(r3)
; CHECK-BE-NEXT: lxv v8, 0(r4)
; CHECK-BE-NEXT: lxv v9, 16(r4)
; CHECK-BE-NEXT: lxv vs0, 0(r5)
; CHECK-BE-NEXT: lxv v3, 16(r4)
; CHECK-BE-NEXT: pmdmxvi8gerx4pp dmr0, vsp34, vs0, 42, 7, 9
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-BE-NEXT: pmdmxvi8gerx4pp dmr0, vsp40, vs0, 42, 7, 9
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 1
; CHECK-BE-NEXT: stxvp vsp36, 96(r6)
; CHECK-BE-NEXT: stxvp vsp34, 64(r6)
@ -242,14 +242,14 @@ define dso_local void @test_pmdmxvi8gerx4spp(ptr %vop, ptr %vpp, ptr %vcp, ptr %
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxvp vsp34, 0(r3)
; CHECK-NEXT: lxvp vsp36, 32(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 64(r3)
; CHECK-NEXT: lxvp vsp36, 96(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-NEXT: lxv v2, 16(r4)
; CHECK-NEXT: lxvp vsp32, 64(r3)
; CHECK-NEXT: lxvp vsp38, 96(r3)
; CHECK-NEXT: lxv v8, 16(r4)
; CHECK-NEXT: lxv v9, 0(r4)
; CHECK-NEXT: lxv vs0, 0(r5)
; CHECK-NEXT: lxv v3, 0(r4)
; CHECK-NEXT: pmdmxvi8gerx4spp dmr0, vsp34, vs0, 100, 6, 12
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-NEXT: pmdmxvi8gerx4spp dmr0, vsp40, vs0, 100, 6, 12
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-NEXT: stxvp vsp34, 96(r6)
; CHECK-NEXT: stxvp vsp36, 64(r6)
@ -262,14 +262,14 @@ define dso_local void @test_pmdmxvi8gerx4spp(ptr %vop, ptr %vpp, ptr %vcp, ptr %
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: lxvp vsp34, 96(r3)
; CHECK-BE-NEXT: lxvp vsp36, 64(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: lxvp vsp34, 32(r3)
; CHECK-BE-NEXT: lxvp vsp36, 0(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-BE-NEXT: lxv v2, 0(r4)
; CHECK-BE-NEXT: lxvp vsp32, 32(r3)
; CHECK-BE-NEXT: lxvp vsp38, 0(r3)
; CHECK-BE-NEXT: lxv v8, 0(r4)
; CHECK-BE-NEXT: lxv v9, 16(r4)
; CHECK-BE-NEXT: lxv vs0, 0(r5)
; CHECK-BE-NEXT: lxv v3, 16(r4)
; CHECK-BE-NEXT: pmdmxvi8gerx4spp dmr0, vsp34, vs0, 100, 6, 12
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-BE-NEXT: pmdmxvi8gerx4spp dmr0, vsp40, vs0, 100, 6, 12
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 1
; CHECK-BE-NEXT: stxvp vsp36, 96(r6)
; CHECK-BE-NEXT: stxvp vsp34, 64(r6)
@ -331,14 +331,14 @@ define void @test_dmxvbf16gerx2pp(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxvp vsp34, 0(r3)
; CHECK-NEXT: lxvp vsp36, 32(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 64(r3)
; CHECK-NEXT: lxvp vsp36, 96(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-NEXT: lxv v2, 16(r4)
; CHECK-NEXT: lxvp vsp32, 64(r3)
; CHECK-NEXT: lxvp vsp38, 96(r3)
; CHECK-NEXT: lxv v8, 16(r4)
; CHECK-NEXT: lxv v9, 0(r4)
; CHECK-NEXT: lxv vs0, 0(r5)
; CHECK-NEXT: lxv v3, 0(r4)
; CHECK-NEXT: dmxvbf16gerx2pp dmr0, vsp34, vs0
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-NEXT: dmxvbf16gerx2pp dmr0, vsp40, vs0
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-NEXT: stxvp vsp34, 96(r6)
; CHECK-NEXT: stxvp vsp36, 64(r6)
@ -351,14 +351,14 @@ define void @test_dmxvbf16gerx2pp(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: lxvp vsp34, 96(r3)
; CHECK-BE-NEXT: lxvp vsp36, 64(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: lxvp vsp34, 32(r3)
; CHECK-BE-NEXT: lxvp vsp36, 0(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-BE-NEXT: lxv v2, 0(r4)
; CHECK-BE-NEXT: lxvp vsp32, 32(r3)
; CHECK-BE-NEXT: lxvp vsp38, 0(r3)
; CHECK-BE-NEXT: lxv v8, 0(r4)
; CHECK-BE-NEXT: lxv v9, 16(r4)
; CHECK-BE-NEXT: lxv vs0, 0(r5)
; CHECK-BE-NEXT: lxv v3, 16(r4)
; CHECK-BE-NEXT: dmxvbf16gerx2pp dmr0, vsp34, vs0
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-BE-NEXT: dmxvbf16gerx2pp dmr0, vsp40, vs0
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 1
; CHECK-BE-NEXT: stxvp vsp36, 96(r6)
; CHECK-BE-NEXT: stxvp vsp34, 64(r6)
@ -382,14 +382,14 @@ define void @test_dmxvbf16gerx2pn(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxvp vsp34, 0(r3)
; CHECK-NEXT: lxvp vsp36, 32(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 64(r3)
; CHECK-NEXT: lxvp vsp36, 96(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-NEXT: lxv v2, 16(r4)
; CHECK-NEXT: lxvp vsp32, 64(r3)
; CHECK-NEXT: lxvp vsp38, 96(r3)
; CHECK-NEXT: lxv v8, 16(r4)
; CHECK-NEXT: lxv v9, 0(r4)
; CHECK-NEXT: lxv vs0, 0(r5)
; CHECK-NEXT: lxv v3, 0(r4)
; CHECK-NEXT: dmxvbf16gerx2pn dmr0, vsp34, vs0
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-NEXT: dmxvbf16gerx2pn dmr0, vsp40, vs0
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-NEXT: stxvp vsp34, 96(r6)
; CHECK-NEXT: stxvp vsp36, 64(r6)
@ -402,14 +402,14 @@ define void @test_dmxvbf16gerx2pn(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: lxvp vsp34, 96(r3)
; CHECK-BE-NEXT: lxvp vsp36, 64(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: lxvp vsp34, 32(r3)
; CHECK-BE-NEXT: lxvp vsp36, 0(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-BE-NEXT: lxv v2, 0(r4)
; CHECK-BE-NEXT: lxvp vsp32, 32(r3)
; CHECK-BE-NEXT: lxvp vsp38, 0(r3)
; CHECK-BE-NEXT: lxv v8, 0(r4)
; CHECK-BE-NEXT: lxv v9, 16(r4)
; CHECK-BE-NEXT: lxv vs0, 0(r5)
; CHECK-BE-NEXT: lxv v3, 16(r4)
; CHECK-BE-NEXT: dmxvbf16gerx2pn dmr0, vsp34, vs0
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-BE-NEXT: dmxvbf16gerx2pn dmr0, vsp40, vs0
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 1
; CHECK-BE-NEXT: stxvp vsp36, 96(r6)
; CHECK-BE-NEXT: stxvp vsp34, 64(r6)
@ -433,14 +433,14 @@ define void @test_dmxvbf16gerx2np(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxvp vsp34, 0(r3)
; CHECK-NEXT: lxvp vsp36, 32(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 64(r3)
; CHECK-NEXT: lxvp vsp36, 96(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-NEXT: lxv v2, 16(r4)
; CHECK-NEXT: lxvp vsp32, 64(r3)
; CHECK-NEXT: lxvp vsp38, 96(r3)
; CHECK-NEXT: lxv v8, 16(r4)
; CHECK-NEXT: lxv v9, 0(r4)
; CHECK-NEXT: lxv vs0, 0(r5)
; CHECK-NEXT: lxv v3, 0(r4)
; CHECK-NEXT: dmxvbf16gerx2np dmr0, vsp34, vs0
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-NEXT: dmxvbf16gerx2np dmr0, vsp40, vs0
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-NEXT: stxvp vsp34, 96(r6)
; CHECK-NEXT: stxvp vsp36, 64(r6)
@ -453,14 +453,14 @@ define void @test_dmxvbf16gerx2np(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: lxvp vsp34, 96(r3)
; CHECK-BE-NEXT: lxvp vsp36, 64(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: lxvp vsp34, 32(r3)
; CHECK-BE-NEXT: lxvp vsp36, 0(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-BE-NEXT: lxv v2, 0(r4)
; CHECK-BE-NEXT: lxvp vsp32, 32(r3)
; CHECK-BE-NEXT: lxvp vsp38, 0(r3)
; CHECK-BE-NEXT: lxv v8, 0(r4)
; CHECK-BE-NEXT: lxv v9, 16(r4)
; CHECK-BE-NEXT: lxv vs0, 0(r5)
; CHECK-BE-NEXT: lxv v3, 16(r4)
; CHECK-BE-NEXT: dmxvbf16gerx2np dmr0, vsp34, vs0
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-BE-NEXT: dmxvbf16gerx2np dmr0, vsp40, vs0
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 1
; CHECK-BE-NEXT: stxvp vsp36, 96(r6)
; CHECK-BE-NEXT: stxvp vsp34, 64(r6)
@ -484,14 +484,14 @@ define void @test_dmxvbf16gerx2nn(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxvp vsp34, 0(r3)
; CHECK-NEXT: lxvp vsp36, 32(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 64(r3)
; CHECK-NEXT: lxvp vsp36, 96(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-NEXT: lxv v2, 16(r4)
; CHECK-NEXT: lxvp vsp32, 64(r3)
; CHECK-NEXT: lxvp vsp38, 96(r3)
; CHECK-NEXT: lxv v8, 16(r4)
; CHECK-NEXT: lxv v9, 0(r4)
; CHECK-NEXT: lxv vs0, 0(r5)
; CHECK-NEXT: lxv v3, 0(r4)
; CHECK-NEXT: dmxvbf16gerx2nn dmr0, vsp34, vs0
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-NEXT: dmxvbf16gerx2nn dmr0, vsp40, vs0
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-NEXT: stxvp vsp34, 96(r6)
; CHECK-NEXT: stxvp vsp36, 64(r6)
@ -504,14 +504,14 @@ define void @test_dmxvbf16gerx2nn(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: lxvp vsp34, 96(r3)
; CHECK-BE-NEXT: lxvp vsp36, 64(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: lxvp vsp34, 32(r3)
; CHECK-BE-NEXT: lxvp vsp36, 0(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-BE-NEXT: lxv v2, 0(r4)
; CHECK-BE-NEXT: lxvp vsp32, 32(r3)
; CHECK-BE-NEXT: lxvp vsp38, 0(r3)
; CHECK-BE-NEXT: lxv v8, 0(r4)
; CHECK-BE-NEXT: lxv v9, 16(r4)
; CHECK-BE-NEXT: lxv vs0, 0(r5)
; CHECK-BE-NEXT: lxv v3, 16(r4)
; CHECK-BE-NEXT: dmxvbf16gerx2nn dmr0, vsp34, vs0
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-BE-NEXT: dmxvbf16gerx2nn dmr0, vsp40, vs0
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 1
; CHECK-BE-NEXT: stxvp vsp36, 96(r6)
; CHECK-BE-NEXT: stxvp vsp34, 64(r6)
@ -573,14 +573,14 @@ define void @test_pmdmxvbf16gerx2pp(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxvp vsp34, 0(r3)
; CHECK-NEXT: lxvp vsp36, 32(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 64(r3)
; CHECK-NEXT: lxvp vsp36, 96(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-NEXT: lxv v2, 16(r4)
; CHECK-NEXT: lxvp vsp32, 64(r3)
; CHECK-NEXT: lxvp vsp38, 96(r3)
; CHECK-NEXT: lxv v8, 16(r4)
; CHECK-NEXT: lxv v9, 0(r4)
; CHECK-NEXT: lxv vs0, 0(r5)
; CHECK-NEXT: lxv v3, 0(r4)
; CHECK-NEXT: pmdmxvbf16gerx2pp dmr0, vsp34, vs0, 33, 5, 2
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-NEXT: pmdmxvbf16gerx2pp dmr0, vsp40, vs0, 33, 5, 2
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-NEXT: stxvp vsp34, 96(r6)
; CHECK-NEXT: stxvp vsp36, 64(r6)
@ -593,14 +593,14 @@ define void @test_pmdmxvbf16gerx2pp(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: lxvp vsp34, 96(r3)
; CHECK-BE-NEXT: lxvp vsp36, 64(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: lxvp vsp34, 32(r3)
; CHECK-BE-NEXT: lxvp vsp36, 0(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-BE-NEXT: lxv v2, 0(r4)
; CHECK-BE-NEXT: lxvp vsp32, 32(r3)
; CHECK-BE-NEXT: lxvp vsp38, 0(r3)
; CHECK-BE-NEXT: lxv v8, 0(r4)
; CHECK-BE-NEXT: lxv v9, 16(r4)
; CHECK-BE-NEXT: lxv vs0, 0(r5)
; CHECK-BE-NEXT: lxv v3, 16(r4)
; CHECK-BE-NEXT: pmdmxvbf16gerx2pp dmr0, vsp34, vs0, 33, 5, 2
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-BE-NEXT: pmdmxvbf16gerx2pp dmr0, vsp40, vs0, 33, 5, 2
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 1
; CHECK-BE-NEXT: stxvp vsp36, 96(r6)
; CHECK-BE-NEXT: stxvp vsp34, 64(r6)
@ -624,14 +624,14 @@ define void @test_pmdmxvbf16gerx2pn(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxvp vsp34, 0(r3)
; CHECK-NEXT: lxvp vsp36, 32(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 64(r3)
; CHECK-NEXT: lxvp vsp36, 96(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-NEXT: lxv v2, 16(r4)
; CHECK-NEXT: lxvp vsp32, 64(r3)
; CHECK-NEXT: lxvp vsp38, 96(r3)
; CHECK-NEXT: lxv v8, 16(r4)
; CHECK-NEXT: lxv v9, 0(r4)
; CHECK-NEXT: lxv vs0, 0(r5)
; CHECK-NEXT: lxv v3, 0(r4)
; CHECK-NEXT: pmdmxvbf16gerx2pn dmr0, vsp34, vs0, 33, 5, 2
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-NEXT: pmdmxvbf16gerx2pn dmr0, vsp40, vs0, 33, 5, 2
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-NEXT: stxvp vsp34, 96(r6)
; CHECK-NEXT: stxvp vsp36, 64(r6)
@ -644,14 +644,14 @@ define void @test_pmdmxvbf16gerx2pn(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: lxvp vsp34, 96(r3)
; CHECK-BE-NEXT: lxvp vsp36, 64(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: lxvp vsp34, 32(r3)
; CHECK-BE-NEXT: lxvp vsp36, 0(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-BE-NEXT: lxv v2, 0(r4)
; CHECK-BE-NEXT: lxvp vsp32, 32(r3)
; CHECK-BE-NEXT: lxvp vsp38, 0(r3)
; CHECK-BE-NEXT: lxv v8, 0(r4)
; CHECK-BE-NEXT: lxv v9, 16(r4)
; CHECK-BE-NEXT: lxv vs0, 0(r5)
; CHECK-BE-NEXT: lxv v3, 16(r4)
; CHECK-BE-NEXT: pmdmxvbf16gerx2pn dmr0, vsp34, vs0, 33, 5, 2
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-BE-NEXT: pmdmxvbf16gerx2pn dmr0, vsp40, vs0, 33, 5, 2
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 1
; CHECK-BE-NEXT: stxvp vsp36, 96(r6)
; CHECK-BE-NEXT: stxvp vsp34, 64(r6)
@ -675,14 +675,14 @@ define void @test_pmdmxvbf16gerx2np(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxvp vsp34, 0(r3)
; CHECK-NEXT: lxvp vsp36, 32(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 64(r3)
; CHECK-NEXT: lxvp vsp36, 96(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-NEXT: lxv v2, 16(r4)
; CHECK-NEXT: lxvp vsp32, 64(r3)
; CHECK-NEXT: lxvp vsp38, 96(r3)
; CHECK-NEXT: lxv v8, 16(r4)
; CHECK-NEXT: lxv v9, 0(r4)
; CHECK-NEXT: lxv vs0, 0(r5)
; CHECK-NEXT: lxv v3, 0(r4)
; CHECK-NEXT: pmdmxvbf16gerx2np dmr0, vsp34, vs0, 33, 5, 2
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-NEXT: pmdmxvbf16gerx2np dmr0, vsp40, vs0, 33, 5, 2
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-NEXT: stxvp vsp34, 96(r6)
; CHECK-NEXT: stxvp vsp36, 64(r6)
@ -695,14 +695,14 @@ define void @test_pmdmxvbf16gerx2np(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: lxvp vsp34, 96(r3)
; CHECK-BE-NEXT: lxvp vsp36, 64(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: lxvp vsp34, 32(r3)
; CHECK-BE-NEXT: lxvp vsp36, 0(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-BE-NEXT: lxv v2, 0(r4)
; CHECK-BE-NEXT: lxvp vsp32, 32(r3)
; CHECK-BE-NEXT: lxvp vsp38, 0(r3)
; CHECK-BE-NEXT: lxv v8, 0(r4)
; CHECK-BE-NEXT: lxv v9, 16(r4)
; CHECK-BE-NEXT: lxv vs0, 0(r5)
; CHECK-BE-NEXT: lxv v3, 16(r4)
; CHECK-BE-NEXT: pmdmxvbf16gerx2np dmr0, vsp34, vs0, 33, 5, 2
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-BE-NEXT: pmdmxvbf16gerx2np dmr0, vsp40, vs0, 33, 5, 2
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 1
; CHECK-BE-NEXT: stxvp vsp36, 96(r6)
; CHECK-BE-NEXT: stxvp vsp34, 64(r6)
@ -726,14 +726,14 @@ define void @test_pmdmxvbf16gerx2nn(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxvp vsp34, 0(r3)
; CHECK-NEXT: lxvp vsp36, 32(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 64(r3)
; CHECK-NEXT: lxvp vsp36, 96(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-NEXT: lxv v2, 16(r4)
; CHECK-NEXT: lxvp vsp32, 64(r3)
; CHECK-NEXT: lxvp vsp38, 96(r3)
; CHECK-NEXT: lxv v8, 16(r4)
; CHECK-NEXT: lxv v9, 0(r4)
; CHECK-NEXT: lxv vs0, 0(r5)
; CHECK-NEXT: lxv v3, 0(r4)
; CHECK-NEXT: pmdmxvbf16gerx2nn dmr0, vsp34, vs0, 33, 5, 2
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-NEXT: pmdmxvbf16gerx2nn dmr0, vsp40, vs0, 33, 5, 2
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-NEXT: stxvp vsp34, 96(r6)
; CHECK-NEXT: stxvp vsp36, 64(r6)
@ -746,14 +746,14 @@ define void @test_pmdmxvbf16gerx2nn(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: lxvp vsp34, 96(r3)
; CHECK-BE-NEXT: lxvp vsp36, 64(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: lxvp vsp34, 32(r3)
; CHECK-BE-NEXT: lxvp vsp36, 0(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-BE-NEXT: lxv v2, 0(r4)
; CHECK-BE-NEXT: lxvp vsp32, 32(r3)
; CHECK-BE-NEXT: lxvp vsp38, 0(r3)
; CHECK-BE-NEXT: lxv v8, 0(r4)
; CHECK-BE-NEXT: lxv v9, 16(r4)
; CHECK-BE-NEXT: lxv vs0, 0(r5)
; CHECK-BE-NEXT: lxv v3, 16(r4)
; CHECK-BE-NEXT: pmdmxvbf16gerx2nn dmr0, vsp34, vs0, 33, 5, 2
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-BE-NEXT: pmdmxvbf16gerx2nn dmr0, vsp40, vs0, 33, 5, 2
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 1
; CHECK-BE-NEXT: stxvp vsp36, 96(r6)
; CHECK-BE-NEXT: stxvp vsp34, 64(r6)
@ -814,14 +814,14 @@ define void @test_dmxvf16gerx2pp(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxvp vsp34, 0(r3)
; CHECK-NEXT: lxvp vsp36, 32(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 64(r3)
; CHECK-NEXT: lxvp vsp36, 96(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-NEXT: lxv v2, 16(r4)
; CHECK-NEXT: lxvp vsp32, 64(r3)
; CHECK-NEXT: lxvp vsp38, 96(r3)
; CHECK-NEXT: lxv v8, 16(r4)
; CHECK-NEXT: lxv v9, 0(r4)
; CHECK-NEXT: lxv vs0, 0(r5)
; CHECK-NEXT: lxv v3, 0(r4)
; CHECK-NEXT: dmxvf16gerx2pp dmr0, vsp34, vs0
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-NEXT: dmxvf16gerx2pp dmr0, vsp40, vs0
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-NEXT: stxvp vsp34, 96(r6)
; CHECK-NEXT: stxvp vsp36, 64(r6)
@ -834,14 +834,14 @@ define void @test_dmxvf16gerx2pp(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: lxvp vsp34, 96(r3)
; CHECK-BE-NEXT: lxvp vsp36, 64(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: lxvp vsp34, 32(r3)
; CHECK-BE-NEXT: lxvp vsp36, 0(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-BE-NEXT: lxv v2, 0(r4)
; CHECK-BE-NEXT: lxvp vsp32, 32(r3)
; CHECK-BE-NEXT: lxvp vsp38, 0(r3)
; CHECK-BE-NEXT: lxv v8, 0(r4)
; CHECK-BE-NEXT: lxv v9, 16(r4)
; CHECK-BE-NEXT: lxv vs0, 0(r5)
; CHECK-BE-NEXT: lxv v3, 16(r4)
; CHECK-BE-NEXT: dmxvf16gerx2pp dmr0, vsp34, vs0
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-BE-NEXT: dmxvf16gerx2pp dmr0, vsp40, vs0
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 1
; CHECK-BE-NEXT: stxvp vsp36, 96(r6)
; CHECK-BE-NEXT: stxvp vsp34, 64(r6)
@ -865,14 +865,14 @@ define void @test_dmxvf16gerx2pn(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxvp vsp34, 0(r3)
; CHECK-NEXT: lxvp vsp36, 32(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 64(r3)
; CHECK-NEXT: lxvp vsp36, 96(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-NEXT: lxv v2, 16(r4)
; CHECK-NEXT: lxvp vsp32, 64(r3)
; CHECK-NEXT: lxvp vsp38, 96(r3)
; CHECK-NEXT: lxv v8, 16(r4)
; CHECK-NEXT: lxv v9, 0(r4)
; CHECK-NEXT: lxv vs0, 0(r5)
; CHECK-NEXT: lxv v3, 0(r4)
; CHECK-NEXT: dmxvf16gerx2pn dmr0, vsp34, vs0
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-NEXT: dmxvf16gerx2pn dmr0, vsp40, vs0
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-NEXT: stxvp vsp34, 96(r6)
; CHECK-NEXT: stxvp vsp36, 64(r6)
@ -885,14 +885,14 @@ define void @test_dmxvf16gerx2pn(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: lxvp vsp34, 96(r3)
; CHECK-BE-NEXT: lxvp vsp36, 64(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: lxvp vsp34, 32(r3)
; CHECK-BE-NEXT: lxvp vsp36, 0(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-BE-NEXT: lxv v2, 0(r4)
; CHECK-BE-NEXT: lxvp vsp32, 32(r3)
; CHECK-BE-NEXT: lxvp vsp38, 0(r3)
; CHECK-BE-NEXT: lxv v8, 0(r4)
; CHECK-BE-NEXT: lxv v9, 16(r4)
; CHECK-BE-NEXT: lxv vs0, 0(r5)
; CHECK-BE-NEXT: lxv v3, 16(r4)
; CHECK-BE-NEXT: dmxvf16gerx2pn dmr0, vsp34, vs0
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-BE-NEXT: dmxvf16gerx2pn dmr0, vsp40, vs0
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 1
; CHECK-BE-NEXT: stxvp vsp36, 96(r6)
; CHECK-BE-NEXT: stxvp vsp34, 64(r6)
@ -916,14 +916,14 @@ define void @test_dmxvf16gerx2np(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxvp vsp34, 0(r3)
; CHECK-NEXT: lxvp vsp36, 32(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 64(r3)
; CHECK-NEXT: lxvp vsp36, 96(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-NEXT: lxv v2, 16(r4)
; CHECK-NEXT: lxvp vsp32, 64(r3)
; CHECK-NEXT: lxvp vsp38, 96(r3)
; CHECK-NEXT: lxv v8, 16(r4)
; CHECK-NEXT: lxv v9, 0(r4)
; CHECK-NEXT: lxv vs0, 0(r5)
; CHECK-NEXT: lxv v3, 0(r4)
; CHECK-NEXT: dmxvf16gerx2np dmr0, vsp34, vs0
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-NEXT: dmxvf16gerx2np dmr0, vsp40, vs0
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-NEXT: stxvp vsp34, 96(r6)
; CHECK-NEXT: stxvp vsp36, 64(r6)
@ -936,14 +936,14 @@ define void @test_dmxvf16gerx2np(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: lxvp vsp34, 96(r3)
; CHECK-BE-NEXT: lxvp vsp36, 64(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: lxvp vsp34, 32(r3)
; CHECK-BE-NEXT: lxvp vsp36, 0(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-BE-NEXT: lxv v2, 0(r4)
; CHECK-BE-NEXT: lxvp vsp32, 32(r3)
; CHECK-BE-NEXT: lxvp vsp38, 0(r3)
; CHECK-BE-NEXT: lxv v8, 0(r4)
; CHECK-BE-NEXT: lxv v9, 16(r4)
; CHECK-BE-NEXT: lxv vs0, 0(r5)
; CHECK-BE-NEXT: lxv v3, 16(r4)
; CHECK-BE-NEXT: dmxvf16gerx2np dmr0, vsp34, vs0
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-BE-NEXT: dmxvf16gerx2np dmr0, vsp40, vs0
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 1
; CHECK-BE-NEXT: stxvp vsp36, 96(r6)
; CHECK-BE-NEXT: stxvp vsp34, 64(r6)
@ -967,14 +967,14 @@ define void @test_dmxvf16gerx2nn(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxvp vsp34, 0(r3)
; CHECK-NEXT: lxvp vsp36, 32(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 64(r3)
; CHECK-NEXT: lxvp vsp36, 96(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-NEXT: lxv v2, 16(r4)
; CHECK-NEXT: lxvp vsp32, 64(r3)
; CHECK-NEXT: lxvp vsp38, 96(r3)
; CHECK-NEXT: lxv v8, 16(r4)
; CHECK-NEXT: lxv v9, 0(r4)
; CHECK-NEXT: lxv vs0, 0(r5)
; CHECK-NEXT: lxv v3, 0(r4)
; CHECK-NEXT: dmxvf16gerx2nn dmr0, vsp34, vs0
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-NEXT: dmxvf16gerx2nn dmr0, vsp40, vs0
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-NEXT: stxvp vsp34, 96(r6)
; CHECK-NEXT: stxvp vsp36, 64(r6)
@ -987,14 +987,14 @@ define void @test_dmxvf16gerx2nn(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: lxvp vsp34, 96(r3)
; CHECK-BE-NEXT: lxvp vsp36, 64(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: lxvp vsp34, 32(r3)
; CHECK-BE-NEXT: lxvp vsp36, 0(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-BE-NEXT: lxv v2, 0(r4)
; CHECK-BE-NEXT: lxvp vsp32, 32(r3)
; CHECK-BE-NEXT: lxvp vsp38, 0(r3)
; CHECK-BE-NEXT: lxv v8, 0(r4)
; CHECK-BE-NEXT: lxv v9, 16(r4)
; CHECK-BE-NEXT: lxv vs0, 0(r5)
; CHECK-BE-NEXT: lxv v3, 16(r4)
; CHECK-BE-NEXT: dmxvf16gerx2nn dmr0, vsp34, vs0
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-BE-NEXT: dmxvf16gerx2nn dmr0, vsp40, vs0
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 1
; CHECK-BE-NEXT: stxvp vsp36, 96(r6)
; CHECK-BE-NEXT: stxvp vsp34, 64(r6)
@ -1056,14 +1056,14 @@ define void @test_pmdmxvf16gerx2pp(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxvp vsp34, 0(r3)
; CHECK-NEXT: lxvp vsp36, 32(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 64(r3)
; CHECK-NEXT: lxvp vsp36, 96(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-NEXT: lxv v2, 16(r4)
; CHECK-NEXT: lxvp vsp32, 64(r3)
; CHECK-NEXT: lxvp vsp38, 96(r3)
; CHECK-NEXT: lxv v8, 16(r4)
; CHECK-NEXT: lxv v9, 0(r4)
; CHECK-NEXT: lxv vs0, 0(r5)
; CHECK-NEXT: lxv v3, 0(r4)
; CHECK-NEXT: pmdmxvf16gerx2pp dmr0, vsp34, vs0, 33, 5, 2
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-NEXT: pmdmxvf16gerx2pp dmr0, vsp40, vs0, 33, 5, 2
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-NEXT: stxvp vsp34, 96(r6)
; CHECK-NEXT: stxvp vsp36, 64(r6)
@ -1076,14 +1076,14 @@ define void @test_pmdmxvf16gerx2pp(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: lxvp vsp34, 96(r3)
; CHECK-BE-NEXT: lxvp vsp36, 64(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: lxvp vsp34, 32(r3)
; CHECK-BE-NEXT: lxvp vsp36, 0(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-BE-NEXT: lxv v2, 0(r4)
; CHECK-BE-NEXT: lxvp vsp32, 32(r3)
; CHECK-BE-NEXT: lxvp vsp38, 0(r3)
; CHECK-BE-NEXT: lxv v8, 0(r4)
; CHECK-BE-NEXT: lxv v9, 16(r4)
; CHECK-BE-NEXT: lxv vs0, 0(r5)
; CHECK-BE-NEXT: lxv v3, 16(r4)
; CHECK-BE-NEXT: pmdmxvf16gerx2pp dmr0, vsp34, vs0, 33, 5, 2
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-BE-NEXT: pmdmxvf16gerx2pp dmr0, vsp40, vs0, 33, 5, 2
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 1
; CHECK-BE-NEXT: stxvp vsp36, 96(r6)
; CHECK-BE-NEXT: stxvp vsp34, 64(r6)
@ -1107,14 +1107,14 @@ define void @test_pmdmxvf16gerx2pn(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxvp vsp34, 0(r3)
; CHECK-NEXT: lxvp vsp36, 32(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 64(r3)
; CHECK-NEXT: lxvp vsp36, 96(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-NEXT: lxv v2, 16(r4)
; CHECK-NEXT: lxvp vsp32, 64(r3)
; CHECK-NEXT: lxvp vsp38, 96(r3)
; CHECK-NEXT: lxv v8, 16(r4)
; CHECK-NEXT: lxv v9, 0(r4)
; CHECK-NEXT: lxv vs0, 0(r5)
; CHECK-NEXT: lxv v3, 0(r4)
; CHECK-NEXT: pmdmxvf16gerx2pn dmr0, vsp34, vs0, 33, 5, 2
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-NEXT: pmdmxvf16gerx2pn dmr0, vsp40, vs0, 33, 5, 2
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-NEXT: stxvp vsp34, 96(r6)
; CHECK-NEXT: stxvp vsp36, 64(r6)
@ -1127,14 +1127,14 @@ define void @test_pmdmxvf16gerx2pn(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: lxvp vsp34, 96(r3)
; CHECK-BE-NEXT: lxvp vsp36, 64(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: lxvp vsp34, 32(r3)
; CHECK-BE-NEXT: lxvp vsp36, 0(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-BE-NEXT: lxv v2, 0(r4)
; CHECK-BE-NEXT: lxvp vsp32, 32(r3)
; CHECK-BE-NEXT: lxvp vsp38, 0(r3)
; CHECK-BE-NEXT: lxv v8, 0(r4)
; CHECK-BE-NEXT: lxv v9, 16(r4)
; CHECK-BE-NEXT: lxv vs0, 0(r5)
; CHECK-BE-NEXT: lxv v3, 16(r4)
; CHECK-BE-NEXT: pmdmxvf16gerx2pn dmr0, vsp34, vs0, 33, 5, 2
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-BE-NEXT: pmdmxvf16gerx2pn dmr0, vsp40, vs0, 33, 5, 2
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 1
; CHECK-BE-NEXT: stxvp vsp36, 96(r6)
; CHECK-BE-NEXT: stxvp vsp34, 64(r6)
@ -1158,14 +1158,14 @@ define void @test_pmdmxvf16gerx2np(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxvp vsp34, 0(r3)
; CHECK-NEXT: lxvp vsp36, 32(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 64(r3)
; CHECK-NEXT: lxvp vsp36, 96(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-NEXT: lxv v2, 16(r4)
; CHECK-NEXT: lxvp vsp32, 64(r3)
; CHECK-NEXT: lxvp vsp38, 96(r3)
; CHECK-NEXT: lxv v8, 16(r4)
; CHECK-NEXT: lxv v9, 0(r4)
; CHECK-NEXT: lxv vs0, 0(r5)
; CHECK-NEXT: lxv v3, 0(r4)
; CHECK-NEXT: pmdmxvf16gerx2np dmr0, vsp34, vs0, 33, 5, 2
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-NEXT: pmdmxvf16gerx2np dmr0, vsp40, vs0, 33, 5, 2
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-NEXT: stxvp vsp34, 96(r6)
; CHECK-NEXT: stxvp vsp36, 64(r6)
@ -1178,14 +1178,14 @@ define void @test_pmdmxvf16gerx2np(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: lxvp vsp34, 96(r3)
; CHECK-BE-NEXT: lxvp vsp36, 64(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: lxvp vsp34, 32(r3)
; CHECK-BE-NEXT: lxvp vsp36, 0(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-BE-NEXT: lxv v2, 0(r4)
; CHECK-BE-NEXT: lxvp vsp32, 32(r3)
; CHECK-BE-NEXT: lxvp vsp38, 0(r3)
; CHECK-BE-NEXT: lxv v8, 0(r4)
; CHECK-BE-NEXT: lxv v9, 16(r4)
; CHECK-BE-NEXT: lxv vs0, 0(r5)
; CHECK-BE-NEXT: lxv v3, 16(r4)
; CHECK-BE-NEXT: pmdmxvf16gerx2np dmr0, vsp34, vs0, 33, 5, 2
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-BE-NEXT: pmdmxvf16gerx2np dmr0, vsp40, vs0, 33, 5, 2
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 1
; CHECK-BE-NEXT: stxvp vsp36, 96(r6)
; CHECK-BE-NEXT: stxvp vsp34, 64(r6)
@ -1209,14 +1209,14 @@ define void @test_pmdmxvf16gerx2nn(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxvp vsp34, 0(r3)
; CHECK-NEXT: lxvp vsp36, 32(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 64(r3)
; CHECK-NEXT: lxvp vsp36, 96(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-NEXT: lxv v2, 16(r4)
; CHECK-NEXT: lxvp vsp32, 64(r3)
; CHECK-NEXT: lxvp vsp38, 96(r3)
; CHECK-NEXT: lxv v8, 16(r4)
; CHECK-NEXT: lxv v9, 0(r4)
; CHECK-NEXT: lxv vs0, 0(r5)
; CHECK-NEXT: lxv v3, 0(r4)
; CHECK-NEXT: pmdmxvbf16gerx2nn dmr0, vsp34, vs0, 33, 5, 2
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-NEXT: pmdmxvbf16gerx2nn dmr0, vsp40, vs0, 33, 5, 2
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-NEXT: stxvp vsp34, 96(r6)
; CHECK-NEXT: stxvp vsp36, 64(r6)
@ -1229,14 +1229,14 @@ define void @test_pmdmxvf16gerx2nn(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: lxvp vsp34, 96(r3)
; CHECK-BE-NEXT: lxvp vsp36, 64(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: lxvp vsp34, 32(r3)
; CHECK-BE-NEXT: lxvp vsp36, 0(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-BE-NEXT: lxv v2, 0(r4)
; CHECK-BE-NEXT: lxvp vsp32, 32(r3)
; CHECK-BE-NEXT: lxvp vsp38, 0(r3)
; CHECK-BE-NEXT: lxv v8, 0(r4)
; CHECK-BE-NEXT: lxv v9, 16(r4)
; CHECK-BE-NEXT: lxv vs0, 0(r5)
; CHECK-BE-NEXT: lxv v3, 16(r4)
; CHECK-BE-NEXT: pmdmxvbf16gerx2nn dmr0, vsp34, vs0, 33, 5, 2
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-BE-NEXT: pmdmxvbf16gerx2nn dmr0, vsp40, vs0, 33, 5, 2
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 1
; CHECK-BE-NEXT: stxvp vsp36, 96(r6)
; CHECK-BE-NEXT: stxvp vsp34, 64(r6)

86
llvm/test/CodeGen/PowerPC/dmr-enable.ll
View File

@ -39,10 +39,10 @@ define void @tdmmr(ptr nocapture readonly %vp1, ptr nocapture %resp) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxvp vsp34, 0(r3)
; CHECK-NEXT: lxvp vsp36, 32(r3)
; CHECK-NEXT: lxvp vsp32, 64(r3)
; CHECK-NEXT: lxvp vsp38, 96(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 64(r3)
; CHECK-NEXT: lxvp vsp36, 96(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-NEXT: dmmr dmr0, dmr0
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-NEXT: stxvp vsp34, 96(r4)
@ -56,10 +56,10 @@ define void @tdmmr(ptr nocapture readonly %vp1, ptr nocapture %resp) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: lxvp vsp34, 96(r3)
; CHECK-BE-NEXT: lxvp vsp36, 64(r3)
; CHECK-BE-NEXT: lxvp vsp32, 32(r3)
; CHECK-BE-NEXT: lxvp vsp38, 0(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: lxvp vsp34, 32(r3)
; CHECK-BE-NEXT: lxvp vsp36, 0(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-BE-NEXT: dmmr dmr0, dmr0
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 1
; CHECK-BE-NEXT: stxvp vsp36, 96(r4)
@ -80,16 +80,16 @@ define void @tdmxor(ptr nocapture readonly %vp1, ptr %vp2, ptr nocapture %resp)
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxvp vsp34, 0(r3)
; CHECK-NEXT: lxvp vsp36, 32(r3)
; CHECK-NEXT: lxvp vsp32, 64(r3)
; CHECK-NEXT: lxvp vsp38, 96(r3)
; CHECK-NEXT: lxvp vsp40, 0(r4)
; CHECK-NEXT: lxvp vsp42, 32(r4)
; CHECK-NEXT: lxvp vsp44, 64(r4)
; CHECK-NEXT: lxvp vsp46, 96(r4)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 64(r3)
; CHECK-NEXT: lxvp vsp36, 96(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-NEXT: lxvp vsp34, 0(r4)
; CHECK-NEXT: lxvp vsp36, 32(r4)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi1, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 64(r4)
; CHECK-NEXT: lxvp vsp36, 96(r4)
; CHECK-NEXT: dmxxinstdmr512 wacc1, vsp36, vsp34, 0
; CHECK-NEXT: dmxxinstdmr512 wacc_hi1, vsp42, vsp40, 1
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-NEXT: dmxxinstdmr512 wacc1, vsp46, vsp44, 0
; CHECK-NEXT: dmxor dmr0, dmr1
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-NEXT: stxvp vsp34, 96(r5)
@ -103,16 +103,16 @@ define void @tdmxor(ptr nocapture readonly %vp1, ptr %vp2, ptr nocapture %resp)
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: lxvp vsp34, 96(r3)
; CHECK-BE-NEXT: lxvp vsp36, 64(r3)
; CHECK-BE-NEXT: lxvp vsp32, 32(r3)
; CHECK-BE-NEXT: lxvp vsp38, 0(r3)
; CHECK-BE-NEXT: lxvp vsp40, 96(r4)
; CHECK-BE-NEXT: lxvp vsp42, 64(r4)
; CHECK-BE-NEXT: lxvp vsp44, 32(r4)
; CHECK-BE-NEXT: lxvp vsp46, 0(r4)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: lxvp vsp34, 32(r3)
; CHECK-BE-NEXT: lxvp vsp36, 0(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-BE-NEXT: lxvp vsp34, 96(r4)
; CHECK-BE-NEXT: lxvp vsp36, 64(r4)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi1, vsp36, vsp34, 1
; CHECK-BE-NEXT: lxvp vsp34, 32(r4)
; CHECK-BE-NEXT: lxvp vsp36, 0(r4)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc1, vsp36, vsp34, 0
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi1, vsp42, vsp40, 1
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-BE-NEXT: dmxxinstdmr512 wacc1, vsp46, vsp44, 0
; CHECK-BE-NEXT: dmxor dmr0, dmr1
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 1
; CHECK-BE-NEXT: stxvp vsp36, 96(r5)
@ -228,10 +228,10 @@ define void @tins512(ptr %vp1, ptr %vp2, ptr %vp3, ptr %vp4, ptr %rp1, ptr %rp2)
; CHECK-NEXT: lxv v4, 16(r6)
; CHECK-NEXT: lxv v3, 0(r5)
; CHECK-NEXT: lxv v5, 0(r6)
; CHECK-NEXT: dmxxextfdmr512 vsp32, vsp38, wacc0, 0
; CHECK-NEXT: stxvp vsp32, 96(r8)
; CHECK-NEXT: stxvp vsp38, 64(r8)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp34, vsp36, 1
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-NEXT: stxvp vsp34, 96(r8)
; CHECK-NEXT: stxvp vsp36, 64(r8)
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 1
; CHECK-NEXT: stxvp vsp34, 32(r8)
; CHECK-NEXT: stxvp vsp36, 0(r8)
@ -240,14 +240,14 @@ define void @tins512(ptr %vp1, ptr %vp2, ptr %vp3, ptr %vp4, ptr %rp1, ptr %rp2)
; CHECK-BE-LABEL: tins512:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: lxv v3, 16(r3)
; CHECK-BE-NEXT: lxv v4, 0(r4)
; CHECK-BE-NEXT: lxv v3, 16(r3)
; CHECK-BE-NEXT: lxv v5, 16(r4)
; CHECK-BE-NEXT: dmsetdmrz dmr0
; CHECK-BE-NEXT: dmxxextfdmr512 vsp32, vsp38, wacc_hi0, 1
; CHECK-BE-NEXT: stxvp vsp38, 96(r7)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp34, vsp36, 0
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 1
; CHECK-BE-NEXT: stxvp vsp36, 96(r7)
; CHECK-BE-NEXT: stxvp vsp34, 64(r7)
; CHECK-BE-NEXT: stxvp vsp32, 64(r7)
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-BE-NEXT: stxvp vsp36, 32(r7)
; CHECK-BE-NEXT: stxvp vsp34, 0(r7)
@ -296,16 +296,16 @@ define void @tins256(ptr %vp1, ptr %vp2, ptr %vp3, ptr %vp4, ptr %rp1, ptr %rp2,
; CHECK-NEXT: stxvp vsp36, 96(r8)
; CHECK-NEXT: stxvp vsp32, 64(r8)
; CHECK-NEXT: dmxxextfdmr512 vsp36, vsp32, wacc_hi0, 1
; CHECK-NEXT: dmxxinstdmr256 dmr0, vsp34, 2
; CHECK-NEXT: stxvp vsp36, 32(r8)
; CHECK-NEXT: stxvp vsp32, 0(r8)
; CHECK-NEXT: dmxxinstdmr256 dmr0, vsp34, 2
; CHECK-NEXT: dmxxextfdmr512 vsp36, vsp32, wacc0, 0
; CHECK-NEXT: stxvp vsp36, 96(r9)
; CHECK-NEXT: stxvp vsp32, 64(r9)
; CHECK-NEXT: dmxxextfdmr512 vsp36, vsp32, wacc_hi0, 1
; CHECK-NEXT: dmxxinstdmr256 dmr0, vsp34, 3
; CHECK-NEXT: stxvp vsp36, 32(r9)
; CHECK-NEXT: stxvp vsp32, 0(r9)
; CHECK-NEXT: dmxxinstdmr256 dmr0, vsp34, 3
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-NEXT: stxvp vsp34, 96(r10)
; CHECK-NEXT: stxvp vsp36, 64(r10)
@ -328,21 +328,21 @@ define void @tins256(ptr %vp1, ptr %vp2, ptr %vp3, ptr %vp4, ptr %rp1, ptr %rp2,
; CHECK-BE-NEXT: stxvp vsp34, 0(r7)
; CHECK-BE-NEXT: lxv v2, 0(r4)
; CHECK-BE-NEXT: lxv v3, 16(r4)
; CHECK-BE-NEXT: dmxxinstdmr256 dmr0, vsp34, 1
; CHECK-BE-NEXT: dmxxextfdmr512 vsp36, vsp32, wacc_hi0, 1
; CHECK-BE-NEXT: stxvp vsp32, 96(r8)
; CHECK-BE-NEXT: stxvp vsp36, 64(r8)
; CHECK-BE-NEXT: dmxxinstdmr256 dmr0, vsp34, 1
; CHECK-BE-NEXT: dmxxextfdmr512 vsp36, vsp32, wacc0, 0
; CHECK-BE-NEXT: dmxxinstdmr256 dmr0, vsp34, 2
; CHECK-BE-NEXT: stxvp vsp32, 32(r8)
; CHECK-BE-NEXT: stxvp vsp36, 0(r8)
; CHECK-BE-NEXT: dmxxinstdmr256 dmr0, vsp34, 2
; CHECK-BE-NEXT: dmxxextfdmr512 vsp36, vsp32, wacc_hi0, 1
; CHECK-BE-NEXT: stxvp vsp32, 96(r9)
; CHECK-BE-NEXT: stxvp vsp36, 64(r9)
; CHECK-BE-NEXT: dmxxextfdmr512 vsp36, vsp32, wacc0, 0
; CHECK-BE-NEXT: dmxxinstdmr256 dmr0, vsp34, 3
; CHECK-BE-NEXT: stxvp vsp32, 32(r9)
; CHECK-BE-NEXT: stxvp vsp36, 0(r9)
; CHECK-BE-NEXT: dmxxinstdmr256 dmr0, vsp34, 3
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 1
; CHECK-BE-NEXT: stxvp vsp36, 96(r10)
; CHECK-BE-NEXT: stxvp vsp34, 64(r10)
@ -372,8 +372,8 @@ define void @tbuild(ptr %p1, ptr %p2, ptr %res1, ptr %res2, ptr %v) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxv v3, 0(r7)
; CHECK-NEXT: vmr v2, v3
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp34, vsp34, 1
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp34, vsp34, 0
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp34, vsp34, 1
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-NEXT: stxvp vsp34, 96(r6)
; CHECK-NEXT: stxvp vsp36, 64(r6)
@ -382,10 +382,10 @@ define void @tbuild(ptr %p1, ptr %p2, ptr %res1, ptr %res2, ptr %v) {
; CHECK-NEXT: stxvp vsp36, 0(r6)
; CHECK-NEXT: lxvp vsp34, 0(r3)
; CHECK-NEXT: lxvp vsp36, 32(r3)
; CHECK-NEXT: lxvp vsp32, 64(r3)
; CHECK-NEXT: lxvp vsp38, 96(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 64(r3)
; CHECK-NEXT: lxvp vsp36, 96(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-NEXT: stxvp vsp34, 96(r5)
; CHECK-NEXT: stxvp vsp36, 64(r5)
@ -408,11 +408,11 @@ define void @tbuild(ptr %p1, ptr %p2, ptr %res1, ptr %res2, ptr %v) {
; CHECK-BE-NEXT: stxvp vsp34, 0(r6)
; CHECK-BE-NEXT: lxvp vsp34, 96(r3)
; CHECK-BE-NEXT: lxvp vsp36, 64(r3)
; CHECK-BE-NEXT: lxvp vsp32, 32(r3)
; CHECK-BE-NEXT: lxvp vsp38, 0(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: lxvp vsp34, 32(r3)
; CHECK-BE-NEXT: lxvp vsp36, 0(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 1
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-BE-NEXT: stxvp vsp36, 96(r5)
; CHECK-BE-NEXT: stxvp vsp34, 64(r5)
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0

48
llvm/test/CodeGen/PowerPC/dmr-spill.ll
View File

@ -21,15 +21,15 @@ define void @spillDMRreg(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) nounwind {
; CHECK-NEXT: stdu r1, -176(r1)
; CHECK-NEXT: lxvp vsp34, 0(r3)
; CHECK-NEXT: lxvp vsp36, 32(r3)
; CHECK-NEXT: mr r30, r6
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 64(r3)
; CHECK-NEXT: lxvp vsp36, 96(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-NEXT: lxv v2, 16(r4)
; CHECK-NEXT: lxv v3, 0(r4)
; CHECK-NEXT: lxvp vsp32, 64(r3)
; CHECK-NEXT: lxvp vsp38, 96(r3)
; CHECK-NEXT: lxv v8, 16(r4)
; CHECK-NEXT: lxv v9, 0(r4)
; CHECK-NEXT: lxv vs0, 0(r5)
; CHECK-NEXT: dmxvbf16gerx2pp dmr0, vsp34, vs0
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-NEXT: mr r30, r6
; CHECK-NEXT: dmxvbf16gerx2pp dmr0, vsp40, vs0
; CHECK-NEXT: dmxxextfdmr512 vsp36, vsp34, wacc0, 0
; CHECK-NEXT: stxvp vsp36, 128(r1)
; CHECK-NEXT: stxvp vsp34, 96(r1)
@ -63,15 +63,15 @@ define void @spillDMRreg(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) nounwind {
; AIX-NEXT: std r31, 248(r1) # 8-byte Folded Spill
; AIX-NEXT: lxvp vsp34, 96(r3)
; AIX-NEXT: lxvp vsp36, 64(r3)
; AIX-NEXT: mr r31, r6
; AIX-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; AIX-NEXT: lxvp vsp34, 32(r3)
; AIX-NEXT: lxvp vsp36, 0(r3)
; AIX-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; AIX-NEXT: lxv v2, 0(r4)
; AIX-NEXT: lxv v3, 16(r4)
; AIX-NEXT: lxvp vsp32, 32(r3)
; AIX-NEXT: lxvp vsp38, 0(r3)
; AIX-NEXT: lxv v8, 0(r4)
; AIX-NEXT: lxv v9, 16(r4)
; AIX-NEXT: lxv vs0, 0(r5)
; AIX-NEXT: dmxvbf16gerx2pp dmr0, vsp34, vs0
; AIX-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; AIX-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; AIX-NEXT: mr r31, r6
; AIX-NEXT: dmxvbf16gerx2pp dmr0, vsp40, vs0
; AIX-NEXT: dmxxextfdmr512 vsp36, vsp34, wacc0, 0
; AIX-NEXT: stxvp vsp36, 112(r1)
; AIX-NEXT: stxvp vsp34, 144(r1)
@ -106,15 +106,15 @@ define void @spillDMRreg(ptr %vop, ptr %vpp, ptr %vcp, ptr %resp) nounwind {
; AIX32-NEXT: stw r31, 204(r1) # 4-byte Folded Spill
; AIX32-NEXT: lxvp vsp34, 96(r3)
; AIX32-NEXT: lxvp vsp36, 64(r3)
; AIX32-NEXT: mr r31, r6
; AIX32-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; AIX32-NEXT: lxvp vsp34, 32(r3)
; AIX32-NEXT: lxvp vsp36, 0(r3)
; AIX32-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; AIX32-NEXT: lxv v2, 0(r4)
; AIX32-NEXT: lxv v3, 16(r4)
; AIX32-NEXT: lxvp vsp32, 32(r3)
; AIX32-NEXT: lxvp vsp38, 0(r3)
; AIX32-NEXT: lxv v8, 0(r4)
; AIX32-NEXT: lxv v9, 16(r4)
; AIX32-NEXT: lxv vs0, 0(r5)
; AIX32-NEXT: dmxvbf16gerx2pp dmr0, vsp34, vs0
; AIX32-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; AIX32-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; AIX32-NEXT: mr r31, r6
; AIX32-NEXT: dmxvbf16gerx2pp dmr0, vsp40, vs0
; AIX32-NEXT: dmxxextfdmr512 vsp36, vsp34, wacc0, 0
; AIX32-NEXT: stxvp vsp36, 64(r1)
; AIX32-NEXT: stxvp vsp34, 96(r1)

60
llvm/test/CodeGen/PowerPC/dmrp-spill.ll
View File

@ -21,17 +21,16 @@ define dso_local void @test_dmsha3hash(ptr %vopp, ptr %resp) nounwind {
; CHECK-NEXT: std r30, 288(r1) # 8-byte Folded Spill
; CHECK-NEXT: lxvp vsp34, 0(r3)
; CHECK-NEXT: lxvp vsp36, 32(r3)
; CHECK-NEXT: mr r30, r4
; CHECK-NEXT: lxvp vsp32, 64(r3)
; CHECK-NEXT: lxvp vsp38, 96(r3)
; CHECK-NEXT: lxvp vsp40, 128(r3)
; CHECK-NEXT: lxvp vsp42, 160(r3)
; CHECK-NEXT: lxvp vsp44, 192(r3)
; CHECK-NEXT: lxvp vsp46, 224(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi1, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 64(r3)
; CHECK-NEXT: lxvp vsp36, 96(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc1, vsp36, vsp34, 0
; CHECK-NEXT: lxvp vsp34, 128(r3)
; CHECK-NEXT: lxvp vsp36, 160(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 192(r3)
; CHECK-NEXT: lxvp vsp36, 224(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-NEXT: dmxxinstdmr512 wacc1, vsp38, vsp32, 0
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp42, vsp40, 1
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp46, vsp44, 0
; CHECK-NEXT: dmsha3hash dmrp0, 5
; CHECK-NEXT: dmxxextfdmr512 vsp36, vsp34, wacc1, 0
; CHECK-NEXT: stxvp vsp36, 128(r1)
@ -43,6 +42,7 @@ define dso_local void @test_dmsha3hash(ptr %vopp, ptr %resp) nounwind {
; CHECK-NEXT: stxvp vsp36, 256(r1)
; CHECK-NEXT: stxvp vsp34, 224(r1)
; CHECK-NEXT: dmxxextfdmr512 vsp36, vsp34, wacc_hi0, 1
; CHECK-NEXT: mr r30, r4
; CHECK-NEXT: stxvp vsp36, 192(r1)
; CHECK-NEXT: stxvp vsp34, 160(r1)
; CHECK-NEXT: bl dummy_func@notoc
@ -84,17 +84,16 @@ define dso_local void @test_dmsha3hash(ptr %vopp, ptr %resp) nounwind {
; AIX-NEXT: std r31, 376(r1) # 8-byte Folded Spill
; AIX-NEXT: lxvp vsp34, 224(r3)
; AIX-NEXT: lxvp vsp36, 192(r3)
; AIX-NEXT: mr r31, r4
; AIX-NEXT: lxvp vsp32, 160(r3)
; AIX-NEXT: lxvp vsp38, 128(r3)
; AIX-NEXT: lxvp vsp40, 96(r3)
; AIX-NEXT: lxvp vsp42, 64(r3)
; AIX-NEXT: lxvp vsp44, 32(r3)
; AIX-NEXT: lxvp vsp46, 0(r3)
; AIX-NEXT: dmxxinstdmr512 wacc_hi1, vsp36, vsp34, 1
; AIX-NEXT: lxvp vsp34, 160(r3)
; AIX-NEXT: lxvp vsp36, 128(r3)
; AIX-NEXT: dmxxinstdmr512 wacc1, vsp36, vsp34, 0
; AIX-NEXT: lxvp vsp34, 96(r3)
; AIX-NEXT: lxvp vsp36, 64(r3)
; AIX-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; AIX-NEXT: lxvp vsp34, 32(r3)
; AIX-NEXT: lxvp vsp36, 0(r3)
; AIX-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; AIX-NEXT: dmxxinstdmr512 wacc1, vsp38, vsp32, 0
; AIX-NEXT: dmxxinstdmr512 wacc_hi0, vsp42, vsp40, 1
; AIX-NEXT: dmxxinstdmr512 wacc0, vsp46, vsp44, 0
; AIX-NEXT: dmsha3hash dmrp0, 5
; AIX-NEXT: dmxxextfdmr512 vsp36, vsp34, wacc1, 0
; AIX-NEXT: stxvp vsp36, 112(r1)
@ -106,6 +105,7 @@ define dso_local void @test_dmsha3hash(ptr %vopp, ptr %resp) nounwind {
; AIX-NEXT: stxvp vsp36, 240(r1)
; AIX-NEXT: stxvp vsp34, 272(r1)
; AIX-NEXT: dmxxextfdmr512 vsp36, vsp34, wacc_hi0, 1
; AIX-NEXT: mr r31, r4
; AIX-NEXT: stxvp vsp36, 304(r1)
; AIX-NEXT: stxvp vsp34, 336(r1)
; AIX-NEXT: bl .dummy_func[PR]
@ -148,17 +148,16 @@ define dso_local void @test_dmsha3hash(ptr %vopp, ptr %resp) nounwind {
; AIX32-NEXT: stw r31, 332(r1) # 4-byte Folded Spill
; AIX32-NEXT: lxvp vsp34, 224(r3)
; AIX32-NEXT: lxvp vsp36, 192(r3)
; AIX32-NEXT: mr r31, r4
; AIX32-NEXT: lxvp vsp32, 160(r3)
; AIX32-NEXT: lxvp vsp38, 128(r3)
; AIX32-NEXT: lxvp vsp40, 96(r3)
; AIX32-NEXT: lxvp vsp42, 64(r3)
; AIX32-NEXT: lxvp vsp44, 32(r3)
; AIX32-NEXT: lxvp vsp46, 0(r3)
; AIX32-NEXT: dmxxinstdmr512 wacc_hi1, vsp36, vsp34, 1
; AIX32-NEXT: lxvp vsp34, 160(r3)
; AIX32-NEXT: lxvp vsp36, 128(r3)
; AIX32-NEXT: dmxxinstdmr512 wacc1, vsp36, vsp34, 0
; AIX32-NEXT: lxvp vsp34, 96(r3)
; AIX32-NEXT: lxvp vsp36, 64(r3)
; AIX32-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; AIX32-NEXT: lxvp vsp34, 32(r3)
; AIX32-NEXT: lxvp vsp36, 0(r3)
; AIX32-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; AIX32-NEXT: dmxxinstdmr512 wacc1, vsp38, vsp32, 0
; AIX32-NEXT: dmxxinstdmr512 wacc_hi0, vsp42, vsp40, 1
; AIX32-NEXT: dmxxinstdmr512 wacc0, vsp46, vsp44, 0
; AIX32-NEXT: dmsha3hash dmrp0, 5
; AIX32-NEXT: dmxxextfdmr512 vsp36, vsp34, wacc1, 0
; AIX32-NEXT: stxvp vsp36, 64(r1)
@ -170,6 +169,7 @@ define dso_local void @test_dmsha3hash(ptr %vopp, ptr %resp) nounwind {
; AIX32-NEXT: stxvp vsp36, 192(r1)
; AIX32-NEXT: stxvp vsp34, 224(r1)
; AIX32-NEXT: dmxxextfdmr512 vsp36, vsp34, wacc_hi0, 1
; AIX32-NEXT: mr r31, r4
; AIX32-NEXT: stxvp vsp36, 256(r1)
; AIX32-NEXT: stxvp vsp34, 288(r1)
; AIX32-NEXT: bl .dummy_func[PR]

24
llvm/test/CodeGen/PowerPC/mma-intrinsics.ll
View File

@ -1074,9 +1074,9 @@ define void @test_ldst_1(ptr nocapture readonly %vqp, ptr %vpp, <16 x i8> %vc, p
; CHECK-WACC-NEXT: lxv v1, 32(r3)
; CHECK-WACC-NEXT: lxv v4, 16(r3)
; CHECK-WACC-NEXT: lxv v0, 48(r3)
; CHECK-WACC-NEXT: plxvp vsp38, 8(r4), 0
; CHECK-WACC-NEXT: dmxxinstdmr512 wacc0, vsp32, vsp36, 0
; CHECK-WACC-NEXT: plxvp vsp36, 8(r4), 0
; CHECK-WACC-NEXT: pmxvf64gernn wacc0, vsp36, v2, 0, 0
; CHECK-WACC-NEXT: pmxvf64gernn wacc0, vsp38, v2, 0, 0
; CHECK-WACC-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-WACC-NEXT: stxv v4, 48(r7)
; CHECK-WACC-NEXT: stxv v5, 32(r7)
@ -1090,9 +1090,9 @@ define void @test_ldst_1(ptr nocapture readonly %vqp, ptr %vpp, <16 x i8> %vc, p
; CHECK-BE-WACC-NEXT: lxv v1, 16(r3)
; CHECK-BE-WACC-NEXT: lxv v4, 32(r3)
; CHECK-BE-WACC-NEXT: lxv v0, 0(r3)
; CHECK-BE-WACC-NEXT: plxvp vsp38, 8(r4), 0
; CHECK-BE-WACC-NEXT: dmxxinstdmr512 wacc0, vsp32, vsp36, 0
; CHECK-BE-WACC-NEXT: plxvp vsp36, 8(r4), 0
; CHECK-BE-WACC-NEXT: pmxvf64gernn wacc0, vsp36, v2, 0, 0
; CHECK-BE-WACC-NEXT: pmxvf64gernn wacc0, vsp38, v2, 0, 0
; CHECK-BE-WACC-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-BE-WACC-NEXT: stxv v5, 48(r7)
; CHECK-BE-WACC-NEXT: stxv v4, 32(r7)
@ -1148,9 +1148,9 @@ define void @test_ldst_2(ptr nocapture readonly %vqp, ptr %vpp, <16 x i8> %vc, p
; CHECK-WACC-NEXT: lxv v1, 32(r3)
; CHECK-WACC-NEXT: lxv v4, 16(r3)
; CHECK-WACC-NEXT: lxv v0, 48(r3)
; CHECK-WACC-NEXT: lxvp vsp38, 0(r4)
; CHECK-WACC-NEXT: dmxxinstdmr512 wacc0, vsp32, vsp36, 0
; CHECK-WACC-NEXT: lxvp vsp36, 0(r4)
; CHECK-WACC-NEXT: xvf64gernp wacc0, vsp36, v2
; CHECK-WACC-NEXT: xvf64gernp wacc0, vsp38, v2
; CHECK-WACC-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-WACC-NEXT: stxv v4, 48(r7)
; CHECK-WACC-NEXT: stxv v5, 32(r7)
@ -1164,9 +1164,9 @@ define void @test_ldst_2(ptr nocapture readonly %vqp, ptr %vpp, <16 x i8> %vc, p
; CHECK-BE-WACC-NEXT: lxv v1, 16(r3)
; CHECK-BE-WACC-NEXT: lxv v4, 32(r3)
; CHECK-BE-WACC-NEXT: lxv v0, 0(r3)
; CHECK-BE-WACC-NEXT: lxvp vsp38, 0(r4)
; CHECK-BE-WACC-NEXT: dmxxinstdmr512 wacc0, vsp32, vsp36, 0
; CHECK-BE-WACC-NEXT: lxvp vsp36, 0(r4)
; CHECK-BE-WACC-NEXT: xvf64gernp wacc0, vsp36, v2
; CHECK-BE-WACC-NEXT: xvf64gernp wacc0, vsp38, v2
; CHECK-BE-WACC-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-BE-WACC-NEXT: stxv v5, 48(r7)
; CHECK-BE-WACC-NEXT: stxv v4, 32(r7)
@ -1221,9 +1221,9 @@ define void @test_ldst_3(ptr nocapture readonly %vqp, i64 %offs, ptr %vpp, <16 x
; CHECK-WACC-NEXT: lxv v1, 32(r3)
; CHECK-WACC-NEXT: lxv v4, 16(r3)
; CHECK-WACC-NEXT: lxv v0, 48(r3)
; CHECK-WACC-NEXT: lxvp vsp38, 0(r5)
; CHECK-WACC-NEXT: dmxxinstdmr512 wacc0, vsp32, vsp36, 0
; CHECK-WACC-NEXT: lxvp vsp36, 0(r5)
; CHECK-WACC-NEXT: xvf64gernp wacc0, vsp36, v2
; CHECK-WACC-NEXT: xvf64gernp wacc0, vsp38, v2
; CHECK-WACC-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-WACC-NEXT: stxv v4, 48(r9)
; CHECK-WACC-NEXT: stxv v5, 32(r9)
@ -1237,9 +1237,9 @@ define void @test_ldst_3(ptr nocapture readonly %vqp, i64 %offs, ptr %vpp, <16 x
; CHECK-BE-WACC-NEXT: lxv v1, 16(r3)
; CHECK-BE-WACC-NEXT: lxv v4, 32(r3)
; CHECK-BE-WACC-NEXT: lxv v0, 0(r3)
; CHECK-BE-WACC-NEXT: lxvp vsp38, 0(r5)
; CHECK-BE-WACC-NEXT: dmxxinstdmr512 wacc0, vsp32, vsp36, 0
; CHECK-BE-WACC-NEXT: lxvp vsp36, 0(r5)
; CHECK-BE-WACC-NEXT: xvf64gernp wacc0, vsp36, v2
; CHECK-BE-WACC-NEXT: xvf64gernp wacc0, vsp38, v2
; CHECK-BE-WACC-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-BE-WACC-NEXT: stxv v5, 48(r9)
; CHECK-BE-WACC-NEXT: stxv v4, 32(r9)

96
llvm/test/CodeGen/PowerPC/mma-outer-product.ll
View File

@ -2352,10 +2352,10 @@ define void @test34(ptr %vqp, ptr %vpp, <16 x i8> %vc, ptr %resp) {
; CHECK-WACC-NEXT: lxv v1, 32(r3)
; CHECK-WACC-NEXT: lxv v4, 16(r3)
; CHECK-WACC-NEXT: lxv v0, 48(r3)
; CHECK-WACC-NEXT: lxv v6, 16(r4)
; CHECK-WACC-NEXT: lxv v7, 0(r4)
; CHECK-WACC-NEXT: dmxxinstdmr512 wacc0, vsp32, vsp36, 0
; CHECK-WACC-NEXT: lxv v4, 16(r4)
; CHECK-WACC-NEXT: lxv v5, 0(r4)
; CHECK-WACC-NEXT: xvf64gerpp wacc0, vsp36, v2
; CHECK-WACC-NEXT: xvf64gerpp wacc0, vsp38, v2
; CHECK-WACC-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-WACC-NEXT: stxv v4, 48(r7)
; CHECK-WACC-NEXT: stxv v5, 32(r7)
@ -2369,10 +2369,10 @@ define void @test34(ptr %vqp, ptr %vpp, <16 x i8> %vc, ptr %resp) {
; CHECK-BE-WACC-NEXT: lxv v1, 16(r3)
; CHECK-BE-WACC-NEXT: lxv v4, 32(r3)
; CHECK-BE-WACC-NEXT: lxv v0, 0(r3)
; CHECK-BE-WACC-NEXT: lxv v6, 0(r4)
; CHECK-BE-WACC-NEXT: lxv v7, 16(r4)
; CHECK-BE-WACC-NEXT: dmxxinstdmr512 wacc0, vsp32, vsp36, 0
; CHECK-BE-WACC-NEXT: lxv v4, 0(r4)
; CHECK-BE-WACC-NEXT: lxv v5, 16(r4)
; CHECK-BE-WACC-NEXT: xvf64gerpp wacc0, vsp36, v2
; CHECK-BE-WACC-NEXT: xvf64gerpp wacc0, vsp38, v2
; CHECK-BE-WACC-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-BE-WACC-NEXT: stxv v5, 48(r7)
; CHECK-BE-WACC-NEXT: stxv v4, 32(r7)
@ -2431,10 +2431,10 @@ define void @test35(ptr %vqp, ptr %vpp, <16 x i8> %vc, ptr %resp) {
; CHECK-WACC-NEXT: lxv v1, 32(r3)
; CHECK-WACC-NEXT: lxv v4, 16(r3)
; CHECK-WACC-NEXT: lxv v0, 48(r3)
; CHECK-WACC-NEXT: lxv v6, 16(r4)
; CHECK-WACC-NEXT: lxv v7, 0(r4)
; CHECK-WACC-NEXT: dmxxinstdmr512 wacc0, vsp32, vsp36, 0
; CHECK-WACC-NEXT: lxv v4, 16(r4)
; CHECK-WACC-NEXT: lxv v5, 0(r4)
; CHECK-WACC-NEXT: xvf64gerpn wacc0, vsp36, v2
; CHECK-WACC-NEXT: xvf64gerpn wacc0, vsp38, v2
; CHECK-WACC-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-WACC-NEXT: stxv v4, 48(r7)
; CHECK-WACC-NEXT: stxv v5, 32(r7)
@ -2448,10 +2448,10 @@ define void @test35(ptr %vqp, ptr %vpp, <16 x i8> %vc, ptr %resp) {
; CHECK-BE-WACC-NEXT: lxv v1, 16(r3)
; CHECK-BE-WACC-NEXT: lxv v4, 32(r3)
; CHECK-BE-WACC-NEXT: lxv v0, 0(r3)
; CHECK-BE-WACC-NEXT: lxv v6, 0(r4)
; CHECK-BE-WACC-NEXT: lxv v7, 16(r4)
; CHECK-BE-WACC-NEXT: dmxxinstdmr512 wacc0, vsp32, vsp36, 0
; CHECK-BE-WACC-NEXT: lxv v4, 0(r4)
; CHECK-BE-WACC-NEXT: lxv v5, 16(r4)
; CHECK-BE-WACC-NEXT: xvf64gerpn wacc0, vsp36, v2
; CHECK-BE-WACC-NEXT: xvf64gerpn wacc0, vsp38, v2
; CHECK-BE-WACC-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-BE-WACC-NEXT: stxv v5, 48(r7)
; CHECK-BE-WACC-NEXT: stxv v4, 32(r7)
@ -2510,10 +2510,10 @@ define void @test36(ptr %vqp, ptr %vpp, <16 x i8> %vc, ptr %resp) {
; CHECK-WACC-NEXT: lxv v1, 32(r3)
; CHECK-WACC-NEXT: lxv v4, 16(r3)
; CHECK-WACC-NEXT: lxv v0, 48(r3)
; CHECK-WACC-NEXT: lxv v6, 16(r4)
; CHECK-WACC-NEXT: lxv v7, 0(r4)
; CHECK-WACC-NEXT: dmxxinstdmr512 wacc0, vsp32, vsp36, 0
; CHECK-WACC-NEXT: lxv v4, 16(r4)
; CHECK-WACC-NEXT: lxv v5, 0(r4)
; CHECK-WACC-NEXT: xvf64gernp wacc0, vsp36, v2
; CHECK-WACC-NEXT: xvf64gernp wacc0, vsp38, v2
; CHECK-WACC-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-WACC-NEXT: stxv v4, 48(r7)
; CHECK-WACC-NEXT: stxv v5, 32(r7)
@ -2527,10 +2527,10 @@ define void @test36(ptr %vqp, ptr %vpp, <16 x i8> %vc, ptr %resp) {
; CHECK-BE-WACC-NEXT: lxv v1, 16(r3)
; CHECK-BE-WACC-NEXT: lxv v4, 32(r3)
; CHECK-BE-WACC-NEXT: lxv v0, 0(r3)
; CHECK-BE-WACC-NEXT: lxv v6, 0(r4)
; CHECK-BE-WACC-NEXT: lxv v7, 16(r4)
; CHECK-BE-WACC-NEXT: dmxxinstdmr512 wacc0, vsp32, vsp36, 0
; CHECK-BE-WACC-NEXT: lxv v4, 0(r4)
; CHECK-BE-WACC-NEXT: lxv v5, 16(r4)
; CHECK-BE-WACC-NEXT: xvf64gernp wacc0, vsp36, v2
; CHECK-BE-WACC-NEXT: xvf64gernp wacc0, vsp38, v2
; CHECK-BE-WACC-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-BE-WACC-NEXT: stxv v5, 48(r7)
; CHECK-BE-WACC-NEXT: stxv v4, 32(r7)
@ -2589,10 +2589,10 @@ define void @test37(ptr %vqp, ptr %vpp, <16 x i8> %vc, ptr %resp) {
; CHECK-WACC-NEXT: lxv v1, 32(r3)
; CHECK-WACC-NEXT: lxv v4, 16(r3)
; CHECK-WACC-NEXT: lxv v0, 48(r3)
; CHECK-WACC-NEXT: lxv v6, 16(r4)
; CHECK-WACC-NEXT: lxv v7, 0(r4)
; CHECK-WACC-NEXT: dmxxinstdmr512 wacc0, vsp32, vsp36, 0
; CHECK-WACC-NEXT: lxv v4, 16(r4)
; CHECK-WACC-NEXT: lxv v5, 0(r4)
; CHECK-WACC-NEXT: xvf64gernn wacc0, vsp36, v2
; CHECK-WACC-NEXT: xvf64gernn wacc0, vsp38, v2
; CHECK-WACC-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-WACC-NEXT: stxv v4, 48(r7)
; CHECK-WACC-NEXT: stxv v5, 32(r7)
@ -2606,10 +2606,10 @@ define void @test37(ptr %vqp, ptr %vpp, <16 x i8> %vc, ptr %resp) {
; CHECK-BE-WACC-NEXT: lxv v1, 16(r3)
; CHECK-BE-WACC-NEXT: lxv v4, 32(r3)
; CHECK-BE-WACC-NEXT: lxv v0, 0(r3)
; CHECK-BE-WACC-NEXT: lxv v6, 0(r4)
; CHECK-BE-WACC-NEXT: lxv v7, 16(r4)
; CHECK-BE-WACC-NEXT: dmxxinstdmr512 wacc0, vsp32, vsp36, 0
; CHECK-BE-WACC-NEXT: lxv v4, 0(r4)
; CHECK-BE-WACC-NEXT: lxv v5, 16(r4)
; CHECK-BE-WACC-NEXT: xvf64gernn wacc0, vsp36, v2
; CHECK-BE-WACC-NEXT: xvf64gernn wacc0, vsp38, v2
; CHECK-BE-WACC-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-BE-WACC-NEXT: stxv v5, 48(r7)
; CHECK-BE-WACC-NEXT: stxv v4, 32(r7)
@ -2726,10 +2726,10 @@ define void @test39(ptr %vqp, ptr %vpp, <16 x i8> %vc, ptr %resp) {
; CHECK-WACC-NEXT: lxv v1, 32(r3)
; CHECK-WACC-NEXT: lxv v4, 16(r3)
; CHECK-WACC-NEXT: lxv v0, 48(r3)
; CHECK-WACC-NEXT: lxv v6, 16(r4)
; CHECK-WACC-NEXT: lxv v7, 0(r4)
; CHECK-WACC-NEXT: dmxxinstdmr512 wacc0, vsp32, vsp36, 0
; CHECK-WACC-NEXT: lxv v4, 16(r4)
; CHECK-WACC-NEXT: lxv v5, 0(r4)
; CHECK-WACC-NEXT: pmxvf64gerpp wacc0, vsp36, v2, 0, 0
; CHECK-WACC-NEXT: pmxvf64gerpp wacc0, vsp38, v2, 0, 0
; CHECK-WACC-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-WACC-NEXT: stxv v4, 48(r7)
; CHECK-WACC-NEXT: stxv v5, 32(r7)
@ -2743,10 +2743,10 @@ define void @test39(ptr %vqp, ptr %vpp, <16 x i8> %vc, ptr %resp) {
; CHECK-BE-WACC-NEXT: lxv v1, 16(r3)
; CHECK-BE-WACC-NEXT: lxv v4, 32(r3)
; CHECK-BE-WACC-NEXT: lxv v0, 0(r3)
; CHECK-BE-WACC-NEXT: lxv v6, 0(r4)
; CHECK-BE-WACC-NEXT: lxv v7, 16(r4)
; CHECK-BE-WACC-NEXT: dmxxinstdmr512 wacc0, vsp32, vsp36, 0
; CHECK-BE-WACC-NEXT: lxv v4, 0(r4)
; CHECK-BE-WACC-NEXT: lxv v5, 16(r4)
; CHECK-BE-WACC-NEXT: pmxvf64gerpp wacc0, vsp36, v2, 0, 0
; CHECK-BE-WACC-NEXT: pmxvf64gerpp wacc0, vsp38, v2, 0, 0
; CHECK-BE-WACC-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-BE-WACC-NEXT: stxv v5, 48(r7)
; CHECK-BE-WACC-NEXT: stxv v4, 32(r7)
@ -2805,10 +2805,10 @@ define void @test40(ptr %vqp, ptr %vpp, <16 x i8> %vc, ptr %resp) {
; CHECK-WACC-NEXT: lxv v1, 32(r3)
; CHECK-WACC-NEXT: lxv v4, 16(r3)
; CHECK-WACC-NEXT: lxv v0, 48(r3)
; CHECK-WACC-NEXT: lxv v6, 16(r4)
; CHECK-WACC-NEXT: lxv v7, 0(r4)
; CHECK-WACC-NEXT: dmxxinstdmr512 wacc0, vsp32, vsp36, 0
; CHECK-WACC-NEXT: lxv v4, 16(r4)
; CHECK-WACC-NEXT: lxv v5, 0(r4)
; CHECK-WACC-NEXT: pmxvf64gerpn wacc0, vsp36, v2, 0, 0
; CHECK-WACC-NEXT: pmxvf64gerpn wacc0, vsp38, v2, 0, 0
; CHECK-WACC-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-WACC-NEXT: stxv v4, 48(r7)
; CHECK-WACC-NEXT: stxv v5, 32(r7)
@ -2822,10 +2822,10 @@ define void @test40(ptr %vqp, ptr %vpp, <16 x i8> %vc, ptr %resp) {
; CHECK-BE-WACC-NEXT: lxv v1, 16(r3)
; CHECK-BE-WACC-NEXT: lxv v4, 32(r3)
; CHECK-BE-WACC-NEXT: lxv v0, 0(r3)
; CHECK-BE-WACC-NEXT: lxv v6, 0(r4)
; CHECK-BE-WACC-NEXT: lxv v7, 16(r4)
; CHECK-BE-WACC-NEXT: dmxxinstdmr512 wacc0, vsp32, vsp36, 0
; CHECK-BE-WACC-NEXT: lxv v4, 0(r4)
; CHECK-BE-WACC-NEXT: lxv v5, 16(r4)
; CHECK-BE-WACC-NEXT: pmxvf64gerpn wacc0, vsp36, v2, 0, 0
; CHECK-BE-WACC-NEXT: pmxvf64gerpn wacc0, vsp38, v2, 0, 0
; CHECK-BE-WACC-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-BE-WACC-NEXT: stxv v5, 48(r7)
; CHECK-BE-WACC-NEXT: stxv v4, 32(r7)
@ -2884,10 +2884,10 @@ define void @test41(ptr %vqp, ptr %vpp, <16 x i8> %vc, ptr %resp) {
; CHECK-WACC-NEXT: lxv v1, 32(r3)
; CHECK-WACC-NEXT: lxv v4, 16(r3)
; CHECK-WACC-NEXT: lxv v0, 48(r3)
; CHECK-WACC-NEXT: lxv v6, 16(r4)
; CHECK-WACC-NEXT: lxv v7, 0(r4)
; CHECK-WACC-NEXT: dmxxinstdmr512 wacc0, vsp32, vsp36, 0
; CHECK-WACC-NEXT: lxv v4, 16(r4)
; CHECK-WACC-NEXT: lxv v5, 0(r4)
; CHECK-WACC-NEXT: pmxvf64gernp wacc0, vsp36, v2, 0, 0
; CHECK-WACC-NEXT: pmxvf64gernp wacc0, vsp38, v2, 0, 0
; CHECK-WACC-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-WACC-NEXT: stxv v4, 48(r7)
; CHECK-WACC-NEXT: stxv v5, 32(r7)
@ -2901,10 +2901,10 @@ define void @test41(ptr %vqp, ptr %vpp, <16 x i8> %vc, ptr %resp) {
; CHECK-BE-WACC-NEXT: lxv v1, 16(r3)
; CHECK-BE-WACC-NEXT: lxv v4, 32(r3)
; CHECK-BE-WACC-NEXT: lxv v0, 0(r3)
; CHECK-BE-WACC-NEXT: lxv v6, 0(r4)
; CHECK-BE-WACC-NEXT: lxv v7, 16(r4)
; CHECK-BE-WACC-NEXT: dmxxinstdmr512 wacc0, vsp32, vsp36, 0
; CHECK-BE-WACC-NEXT: lxv v4, 0(r4)
; CHECK-BE-WACC-NEXT: lxv v5, 16(r4)
; CHECK-BE-WACC-NEXT: pmxvf64gernp wacc0, vsp36, v2, 0, 0
; CHECK-BE-WACC-NEXT: pmxvf64gernp wacc0, vsp38, v2, 0, 0
; CHECK-BE-WACC-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-BE-WACC-NEXT: stxv v5, 48(r7)
; CHECK-BE-WACC-NEXT: stxv v4, 32(r7)
@ -2963,10 +2963,10 @@ define void @test42(ptr %vqp, ptr %vpp, <16 x i8> %vc, ptr %resp) {
; CHECK-WACC-NEXT: lxv v1, 32(r3)
; CHECK-WACC-NEXT: lxv v4, 16(r3)
; CHECK-WACC-NEXT: lxv v0, 48(r3)
; CHECK-WACC-NEXT: lxv v6, 16(r4)
; CHECK-WACC-NEXT: lxv v7, 0(r4)
; CHECK-WACC-NEXT: dmxxinstdmr512 wacc0, vsp32, vsp36, 0
; CHECK-WACC-NEXT: lxv v4, 16(r4)
; CHECK-WACC-NEXT: lxv v5, 0(r4)
; CHECK-WACC-NEXT: pmxvf64gernn wacc0, vsp36, v2, 0, 0
; CHECK-WACC-NEXT: pmxvf64gernn wacc0, vsp38, v2, 0, 0
; CHECK-WACC-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-WACC-NEXT: stxv v4, 48(r7)
; CHECK-WACC-NEXT: stxv v5, 32(r7)
@ -2980,10 +2980,10 @@ define void @test42(ptr %vqp, ptr %vpp, <16 x i8> %vc, ptr %resp) {
; CHECK-BE-WACC-NEXT: lxv v1, 16(r3)
; CHECK-BE-WACC-NEXT: lxv v4, 32(r3)
; CHECK-BE-WACC-NEXT: lxv v0, 0(r3)
; CHECK-BE-WACC-NEXT: lxv v6, 0(r4)
; CHECK-BE-WACC-NEXT: lxv v7, 16(r4)
; CHECK-BE-WACC-NEXT: dmxxinstdmr512 wacc0, vsp32, vsp36, 0
; CHECK-BE-WACC-NEXT: lxv v4, 0(r4)
; CHECK-BE-WACC-NEXT: lxv v5, 16(r4)
; CHECK-BE-WACC-NEXT: pmxvf64gernn wacc0, vsp36, v2, 0, 0
; CHECK-BE-WACC-NEXT: pmxvf64gernn wacc0, vsp38, v2, 0, 0
; CHECK-BE-WACC-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-BE-WACC-NEXT: stxv v5, 48(r7)
; CHECK-BE-WACC-NEXT: stxv v4, 32(r7)

88
llvm/test/CodeGen/PowerPC/mmaplus-crypto.ll
View File

@ -13,16 +13,16 @@ define dso_local void @test_dmsha2hash(ptr %vop, ptr %vinp, ptr %resp) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxvp vsp34, 0(r3)
; CHECK-NEXT: lxvp vsp36, 32(r3)
; CHECK-NEXT: lxvp vsp32, 64(r3)
; CHECK-NEXT: lxvp vsp38, 96(r3)
; CHECK-NEXT: lxvp vsp40, 0(r4)
; CHECK-NEXT: lxvp vsp42, 32(r4)
; CHECK-NEXT: lxvp vsp44, 64(r4)
; CHECK-NEXT: lxvp vsp46, 96(r4)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 64(r3)
; CHECK-NEXT: lxvp vsp36, 96(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-NEXT: lxvp vsp34, 0(r4)
; CHECK-NEXT: lxvp vsp36, 32(r4)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi1, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 64(r4)
; CHECK-NEXT: lxvp vsp36, 96(r4)
; CHECK-NEXT: dmxxinstdmr512 wacc1, vsp36, vsp34, 0
; CHECK-NEXT: dmxxinstdmr512 wacc_hi1, vsp42, vsp40, 1
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-NEXT: dmxxinstdmr512 wacc1, vsp46, vsp44, 0
; CHECK-NEXT: dmsha256hash dmr0, dmr1
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-NEXT: stxvp vsp34, 96(r5)
@ -36,16 +36,16 @@ define dso_local void @test_dmsha2hash(ptr %vop, ptr %vinp, ptr %resp) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: lxvp vsp34, 96(r3)
; CHECK-BE-NEXT: lxvp vsp36, 64(r3)
; CHECK-BE-NEXT: lxvp vsp32, 32(r3)
; CHECK-BE-NEXT: lxvp vsp38, 0(r3)
; CHECK-BE-NEXT: lxvp vsp40, 96(r4)
; CHECK-BE-NEXT: lxvp vsp42, 64(r4)
; CHECK-BE-NEXT: lxvp vsp44, 32(r4)
; CHECK-BE-NEXT: lxvp vsp46, 0(r4)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: lxvp vsp34, 32(r3)
; CHECK-BE-NEXT: lxvp vsp36, 0(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-BE-NEXT: lxvp vsp34, 96(r4)
; CHECK-BE-NEXT: lxvp vsp36, 64(r4)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi1, vsp36, vsp34, 1
; CHECK-BE-NEXT: lxvp vsp34, 32(r4)
; CHECK-BE-NEXT: lxvp vsp36, 0(r4)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc1, vsp36, vsp34, 0
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi1, vsp42, vsp40, 1
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-BE-NEXT: dmxxinstdmr512 wacc1, vsp46, vsp44, 0
; CHECK-BE-NEXT: dmsha256hash dmr0, dmr1
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 1
; CHECK-BE-NEXT: stxvp vsp36, 96(r5)
@ -69,16 +69,16 @@ define dso_local void @test_dmsha3hash(ptr %vopp, ptr %resp) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxvp vsp34, 0(r3)
; CHECK-NEXT: lxvp vsp36, 32(r3)
; CHECK-NEXT: lxvp vsp32, 64(r3)
; CHECK-NEXT: lxvp vsp38, 96(r3)
; CHECK-NEXT: lxvp vsp40, 128(r3)
; CHECK-NEXT: lxvp vsp42, 160(r3)
; CHECK-NEXT: lxvp vsp44, 192(r3)
; CHECK-NEXT: lxvp vsp46, 224(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi1, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 64(r3)
; CHECK-NEXT: lxvp vsp36, 96(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc1, vsp36, vsp34, 0
; CHECK-NEXT: lxvp vsp34, 128(r3)
; CHECK-NEXT: lxvp vsp36, 160(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 192(r3)
; CHECK-NEXT: lxvp vsp36, 224(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-NEXT: dmxxinstdmr512 wacc1, vsp38, vsp32, 0
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp42, vsp40, 1
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp46, vsp44, 0
; CHECK-NEXT: dmsha3hash dmrp0, 5
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-NEXT: stxvp vsp34, 224(r4)
@ -98,16 +98,16 @@ define dso_local void @test_dmsha3hash(ptr %vopp, ptr %resp) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: lxvp vsp34, 224(r3)
; CHECK-BE-NEXT: lxvp vsp36, 192(r3)
; CHECK-BE-NEXT: lxvp vsp32, 160(r3)
; CHECK-BE-NEXT: lxvp vsp38, 128(r3)
; CHECK-BE-NEXT: lxvp vsp40, 96(r3)
; CHECK-BE-NEXT: lxvp vsp42, 64(r3)
; CHECK-BE-NEXT: lxvp vsp44, 32(r3)
; CHECK-BE-NEXT: lxvp vsp46, 0(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi1, vsp36, vsp34, 1
; CHECK-BE-NEXT: lxvp vsp34, 160(r3)
; CHECK-BE-NEXT: lxvp vsp36, 128(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc1, vsp36, vsp34, 0
; CHECK-BE-NEXT: lxvp vsp34, 96(r3)
; CHECK-BE-NEXT: lxvp vsp36, 64(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: lxvp vsp34, 32(r3)
; CHECK-BE-NEXT: lxvp vsp36, 0(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-BE-NEXT: dmxxinstdmr512 wacc1, vsp38, vsp32, 0
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp42, vsp40, 1
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp46, vsp44, 0
; CHECK-BE-NEXT: dmsha3hash dmrp0, 5
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi1, 1
; CHECK-BE-NEXT: stxvp vsp36, 224(r4)
@ -136,11 +136,11 @@ define dso_local void @test_dmxxshapad(ptr %vopp, ptr %vcp, ptr %resp) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxvp vsp34, 0(r3)
; CHECK-NEXT: lxvp vsp36, 32(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 64(r3)
; CHECK-NEXT: lxvp vsp36, 96(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-NEXT: lxvp vsp32, 64(r3)
; CHECK-NEXT: lxvp vsp38, 96(r3)
; CHECK-NEXT: lxv vs0, 0(r4)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-NEXT: dmxxshapad dmr0, vs0, 2, 1, 3
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-NEXT: stxvp vsp34, 96(r5)
@ -154,11 +154,11 @@ define dso_local void @test_dmxxshapad(ptr %vopp, ptr %vcp, ptr %resp) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: lxvp vsp34, 96(r3)
; CHECK-BE-NEXT: lxvp vsp36, 64(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: lxvp vsp34, 32(r3)
; CHECK-BE-NEXT: lxvp vsp36, 0(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-BE-NEXT: lxvp vsp32, 32(r3)
; CHECK-BE-NEXT: lxvp vsp38, 0(r3)
; CHECK-BE-NEXT: lxv vs0, 0(r4)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-BE-NEXT: dmxxshapad dmr0, vs0, 2, 1, 3
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 1
; CHECK-BE-NEXT: stxvp vsp36, 96(r5)

16
llvm/test/CodeGen/PowerPC/mmaplus-intrinsics.ll
View File

@ -1049,9 +1049,9 @@ define void @test_ldst_1(ptr nocapture readonly %vqp, ptr %vpp, <16 x i8> %vc, p
; CHECK-NEXT: lxv v1, 32(r3)
; CHECK-NEXT: lxv v4, 16(r3)
; CHECK-NEXT: lxv v0, 48(r3)
; CHECK-NEXT: plxvp vsp38, 8(r4), 0
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp32, vsp36, 0
; CHECK-NEXT: plxvp vsp36, 8(r4), 0
; CHECK-NEXT: pmxvf64gernn wacc0, vsp36, v2, 0, 0
; CHECK-NEXT: pmxvf64gernn wacc0, vsp38, v2, 0, 0
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-NEXT: stxv v4, 48(r7)
; CHECK-NEXT: stxv v5, 32(r7)
@ -1065,9 +1065,9 @@ define void @test_ldst_1(ptr nocapture readonly %vqp, ptr %vpp, <16 x i8> %vc, p
; CHECK-BE-NEXT: lxv v1, 16(r3)
; CHECK-BE-NEXT: lxv v4, 32(r3)
; CHECK-BE-NEXT: lxv v0, 0(r3)
; CHECK-BE-NEXT: plxvp vsp38, 8(r4), 0
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp32, vsp36, 0
; CHECK-BE-NEXT: plxvp vsp36, 8(r4), 0
; CHECK-BE-NEXT: pmxvf64gernn wacc0, vsp36, v2, 0, 0
; CHECK-BE-NEXT: pmxvf64gernn wacc0, vsp38, v2, 0, 0
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-BE-NEXT: stxv v5, 48(r7)
; CHECK-BE-NEXT: stxv v4, 32(r7)
@ -1137,9 +1137,9 @@ define void @test_ldst_1(ptr nocapture readonly %vqp, ptr %vpp, <16 x i8> %vc, p
; CHECK-AIX64-NEXT: lxv 1, 16(3)
; CHECK-AIX64-NEXT: lxv 4, 32(3)
; CHECK-AIX64-NEXT: lxv 0, 0(3)
; CHECK-AIX64-NEXT: plxvp 38, 8(4), 0
; CHECK-AIX64-NEXT: dmxxinstdmr512 0, 32, 36, 0
; CHECK-AIX64-NEXT: plxvp 36, 8(4), 0
; CHECK-AIX64-NEXT: pmxvf64gernn 0, 36, 2, 0, 0
; CHECK-AIX64-NEXT: pmxvf64gernn 0, 38, 2, 0, 0
; CHECK-AIX64-NEXT: dmxxextfdmr512 34, 36, 0, 0
; CHECK-AIX64-NEXT: stxv 5, 48(5)
; CHECK-AIX64-NEXT: stxv 4, 32(5)
@ -1153,9 +1153,9 @@ define void @test_ldst_1(ptr nocapture readonly %vqp, ptr %vpp, <16 x i8> %vc, p
; CHECK-AIX32-NEXT: lxv 1, 16(3)
; CHECK-AIX32-NEXT: lxv 4, 32(3)
; CHECK-AIX32-NEXT: lxv 0, 0(3)
; CHECK-AIX32-NEXT: plxvp 38, 8(4), 0
; CHECK-AIX32-NEXT: dmxxinstdmr512 0, 32, 36, 0
; CHECK-AIX32-NEXT: plxvp 36, 8(4), 0
; CHECK-AIX32-NEXT: pmxvf64gernn 0, 36, 2, 0, 0
; CHECK-AIX32-NEXT: pmxvf64gernn 0, 38, 2, 0, 0
; CHECK-AIX32-NEXT: dmxxextfdmr512 34, 36, 0, 0
; CHECK-AIX32-NEXT: stxv 5, 48(5)
; CHECK-AIX32-NEXT: stxv 4, 32(5)

12
llvm/test/CodeGen/PowerPC/v1024ls.ll
View File

@ -11,10 +11,10 @@ define void @v1024ls(ptr nocapture readonly %vqp, ptr nocapture %resp) {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxvp vsp34, 0(r3)
; CHECK-NEXT: lxvp vsp36, 32(r3)
; CHECK-NEXT: lxvp vsp32, 64(r3)
; CHECK-NEXT: lxvp vsp38, 96(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-NEXT: lxvp vsp34, 64(r3)
; CHECK-NEXT: lxvp vsp36, 96(r3)
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
; CHECK-NEXT: stxvp vsp34, 96(r4)
; CHECK-NEXT: stxvp vsp36, 64(r4)
@ -27,11 +27,11 @@ define void @v1024ls(ptr nocapture readonly %vqp, ptr nocapture %resp) {
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: lxvp vsp34, 96(r3)
; CHECK-BE-NEXT: lxvp vsp36, 64(r3)
; CHECK-BE-NEXT: lxvp vsp32, 32(r3)
; CHECK-BE-NEXT: lxvp vsp38, 0(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc_hi0, vsp36, vsp34, 1
; CHECK-BE-NEXT: lxvp vsp34, 32(r3)
; CHECK-BE-NEXT: lxvp vsp36, 0(r3)
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp36, vsp34, 0
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc_hi0, 1
; CHECK-BE-NEXT: dmxxinstdmr512 wacc0, vsp38, vsp32, 0
; CHECK-BE-NEXT: stxvp vsp36, 96(r4)
; CHECK-BE-NEXT: stxvp vsp34, 64(r4)
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0