[AMDGPU][True16][CodeGen] srl pattern for true16 mode (#132987)
Added a srl pattern for true16 flow. Changing right shift 16bit to a reg_sequence `srl vgpr32, 16 -> reg_sequence (vgpr32.hi16, 0)` and finally it's lowered to two COPY `vdst.lo16 = COPY vsrc.hi16` `vdst.hi16 = COPY 0` The benefits of this transform is allowing the following pass to optimize out these copy.
This commit is contained in:
Brox Chen
GitHub
parent
6075275e68
commit
06411399fb
@ -2425,6 +2425,13 @@ def : GCNPat <(i1 imm:$imm),
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let WaveSizePredicate = isWave32;
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}
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let True16Predicate = UseRealTrue16Insts in
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foreach vt = [i32, v2i16] in
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def : GCNPat <
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(vt (DivergentBinFrag<srl> VGPR_32:$src, (i32 16))),
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(REG_SEQUENCE VGPR_32, (i16 (EXTRACT_SUBREG $src, hi16)), lo16, (V_MOV_B16_t16_e64 0, (i16 0x0000), 0), hi16)
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>;
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/********** ================== **********/
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/********** Intrinsic Patterns **********/
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/********** ================== **********/
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@ -658,26 +658,47 @@ define amdgpu_kernel void @v_test_add_v2i16_zext_to_v2i32(ptr addrspace(1) %out,
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; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
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; GFX10-NEXT: s_endpgm
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;
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; GFX11-LABEL: v_test_add_v2i16_zext_to_v2i32:
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; GFX11: ; %bb.0:
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; GFX11-NEXT: s_clause 0x1
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; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
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; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
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; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0
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; GFX11-NEXT: v_mov_b32_e32 v2, 0
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; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
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; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0
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; GFX11-NEXT: s_waitcnt lgkmcnt(0)
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; GFX11-NEXT: global_load_b32 v1, v0, s[2:3] glc dlc
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; GFX11-NEXT: s_waitcnt vmcnt(0)
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; GFX11-NEXT: global_load_b32 v0, v0, s[4:5] glc dlc
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; GFX11-NEXT: s_waitcnt vmcnt(0)
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; GFX11-NEXT: v_pk_add_u16 v0, v1, v0
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; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX11-NEXT: v_lshrrev_b32_e32 v1, 16, v0
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; GFX11-NEXT: v_and_b32_e32 v0, 0xffff, v0
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; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]
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; GFX11-NEXT: s_endpgm
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; GFX11-TRUE16-LABEL: v_test_add_v2i16_zext_to_v2i32:
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; GFX11-TRUE16: ; %bb.0:
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; GFX11-TRUE16-NEXT: s_clause 0x1
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; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
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; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
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; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, 0 :: v_dual_and_b32 v0, 0x3ff, v0
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; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 2, v0
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; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
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; GFX11-TRUE16-NEXT: global_load_b32 v1, v0, s[2:3] glc dlc
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; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
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; GFX11-TRUE16-NEXT: global_load_b32 v0, v0, s[4:5] glc dlc
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; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
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; GFX11-TRUE16-NEXT: v_pk_add_u16 v2, v1, v0
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; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, 0
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; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
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; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v2
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; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v2.h
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; GFX11-TRUE16-NEXT: global_store_b64 v3, v[0:1], s[0:1]
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; GFX11-TRUE16-NEXT: s_endpgm
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;
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; GFX11-FAKE16-LABEL: v_test_add_v2i16_zext_to_v2i32:
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; GFX11-FAKE16: ; %bb.0:
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; GFX11-FAKE16-NEXT: s_clause 0x1
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; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
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; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
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; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
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; GFX11-FAKE16-NEXT: v_mov_b32_e32 v2, 0
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; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
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; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 2, v0
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; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
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; GFX11-FAKE16-NEXT: global_load_b32 v1, v0, s[2:3] glc dlc
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; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
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; GFX11-FAKE16-NEXT: global_load_b32 v0, v0, s[4:5] glc dlc
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; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
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; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, v1, v0
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; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
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; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
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; GFX11-FAKE16-NEXT: global_store_b64 v2, v[0:1], s[0:1]
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; GFX11-FAKE16-NEXT: s_endpgm
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%gep.out = getelementptr inbounds <2 x i32>, ptr addrspace(1) %out, i32 %tid
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%gep.in0 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in0, i32 %tid
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@ -971,30 +992,57 @@ define amdgpu_kernel void @v_test_add_v2i16_sext_to_v2i64(ptr addrspace(1) %out,
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; GFX10-NEXT: global_store_dwordx4 v4, v[0:3], s[0:1]
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; GFX10-NEXT: s_endpgm
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;
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; GFX11-LABEL: v_test_add_v2i16_sext_to_v2i64:
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; GFX11: ; %bb.0:
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; GFX11-NEXT: s_clause 0x1
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; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
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; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
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; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0
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; GFX11-NEXT: v_mov_b32_e32 v4, 0
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; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
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; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0
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; GFX11-NEXT: s_waitcnt lgkmcnt(0)
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; GFX11-NEXT: s_clause 0x1
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; GFX11-NEXT: global_load_b32 v1, v0, s[2:3]
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; GFX11-NEXT: global_load_b32 v0, v0, s[4:5]
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; GFX11-NEXT: s_waitcnt vmcnt(0)
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; GFX11-NEXT: v_pk_add_u16 v0, v1, v0
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; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
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; GFX11-NEXT: v_lshrrev_b32_e32 v1, 16, v0
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; GFX11-NEXT: v_bfe_i32 v0, v0, 0, 16
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; GFX11-NEXT: v_bfe_i32 v2, v1, 0, 16
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; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
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; GFX11-NEXT: v_ashrrev_i32_e32 v1, 31, v0
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; GFX11-NEXT: v_ashrrev_i32_e32 v3, 31, v2
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; GFX11-NEXT: global_store_b128 v4, v[0:3], s[0:1]
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; GFX11-NEXT: s_endpgm
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; GFX11-TRUE16-LABEL: v_test_add_v2i16_sext_to_v2i64:
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; GFX11-TRUE16: ; %bb.0:
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; GFX11-TRUE16-NEXT: s_clause 0x1
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; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
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; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
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; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
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; GFX11-TRUE16-NEXT: v_mov_b32_e32 v4, 0
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; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
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; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 2, v0
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; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
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; GFX11-TRUE16-NEXT: s_clause 0x1
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; GFX11-TRUE16-NEXT: global_load_b32 v1, v0, s[2:3]
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; GFX11-TRUE16-NEXT: global_load_b32 v0, v0, s[4:5]
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; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
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; GFX11-TRUE16-NEXT: v_pk_add_u16 v0, v1, v0
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; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, 0
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; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
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; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v0.h
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; GFX11-TRUE16-NEXT: v_bfe_i32 v0, v0, 0, 16
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; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
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; GFX11-TRUE16-NEXT: v_bfe_i32 v2, v1, 0, 16
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; GFX11-TRUE16-NEXT: v_ashrrev_i32_e32 v1, 31, v0
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; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
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; GFX11-TRUE16-NEXT: v_ashrrev_i32_e32 v3, 31, v2
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; GFX11-TRUE16-NEXT: global_store_b128 v4, v[0:3], s[0:1]
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; GFX11-TRUE16-NEXT: s_endpgm
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;
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; GFX11-FAKE16-LABEL: v_test_add_v2i16_sext_to_v2i64:
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; GFX11-FAKE16: ; %bb.0:
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; GFX11-FAKE16-NEXT: s_clause 0x1
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; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
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; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
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; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
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; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, 0
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; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
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; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 2, v0
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; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
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; GFX11-FAKE16-NEXT: s_clause 0x1
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; GFX11-FAKE16-NEXT: global_load_b32 v1, v0, s[2:3]
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; GFX11-FAKE16-NEXT: global_load_b32 v0, v0, s[4:5]
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; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
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; GFX11-FAKE16-NEXT: v_pk_add_u16 v0, v1, v0
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; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
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; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
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; GFX11-FAKE16-NEXT: v_bfe_i32 v0, v0, 0, 16
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; GFX11-FAKE16-NEXT: v_bfe_i32 v2, v1, 0, 16
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; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
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; GFX11-FAKE16-NEXT: v_ashrrev_i32_e32 v1, 31, v0
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; GFX11-FAKE16-NEXT: v_ashrrev_i32_e32 v3, 31, v2
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; GFX11-FAKE16-NEXT: global_store_b128 v4, v[0:3], s[0:1]
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; GFX11-FAKE16-NEXT: s_endpgm
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%gep.out = getelementptr inbounds <2 x i64>, ptr addrspace(1) %out, i32 %tid
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%gep.in0 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in0, i32 %tid
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File diff suppressed because it is too large
Load Diff
@ -737,15 +737,26 @@ define i64 @v_bswap_i48(i64 %src) {
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; VI-NEXT: v_lshrrev_b32_e32 v1, 16, v2
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; VI-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX11-LABEL: v_bswap_i48:
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; GFX11: ; %bb.0:
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; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX11-NEXT: v_perm_b32 v2, 0, v0, 0x10203
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; GFX11-NEXT: v_perm_b32 v0, 0, v1, 0x10203
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; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
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; GFX11-NEXT: v_lshrrev_b32_e32 v1, 16, v2
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; GFX11-NEXT: v_alignbit_b32 v0, v2, v0, 16
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; GFX11-NEXT: s_setpc_b64 s[30:31]
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; GFX11-REAL16-LABEL: v_bswap_i48:
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; GFX11-REAL16: ; %bb.0:
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; GFX11-REAL16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX11-REAL16-NEXT: v_perm_b32 v2, 0, v0, 0x10203
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; GFX11-REAL16-NEXT: v_perm_b32 v0, 0, v1, 0x10203
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; GFX11-REAL16-NEXT: v_mov_b16_e32 v1.h, 0
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; GFX11-REAL16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
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; GFX11-REAL16-NEXT: v_mov_b16_e32 v1.l, v2.h
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; GFX11-REAL16-NEXT: v_alignbit_b32 v0, v2, v0, 16
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; GFX11-REAL16-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX11-FAKE16-LABEL: v_bswap_i48:
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; GFX11-FAKE16: ; %bb.0:
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; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX11-FAKE16-NEXT: v_perm_b32 v2, 0, v0, 0x10203
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; GFX11-FAKE16-NEXT: v_perm_b32 v0, 0, v1, 0x10203
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; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
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; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v2
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; GFX11-FAKE16-NEXT: v_alignbit_b32 v0, v2, v0, 16
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; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
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%trunc = trunc i64 %src to i48
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%bswap = call i48 @llvm.bswap.i48(i48 %trunc)
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%zext = zext i48 %bswap to i64
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@ -679,34 +679,30 @@ define amdgpu_kernel void @v_extractelement_v8f16_dynamic_sgpr(ptr addrspace(1)
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; GFX11-TRUE16-NEXT: s_cselect_b32 s2, -1, 0
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; GFX11-TRUE16-NEXT: s_cmp_eq_u32 s4, 2
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; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
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; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v0
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; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
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; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v5.l, s2
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; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v0.h, s2
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; GFX11-TRUE16-NEXT: s_cselect_b32 s2, -1, 0
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; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v1
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; GFX11-TRUE16-NEXT: s_cmp_eq_u32 s4, 3
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; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
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; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v1.l, s2
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; GFX11-TRUE16-NEXT: s_cselect_b32 s2, -1, 0
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; GFX11-TRUE16-NEXT: s_cmp_eq_u32 s4, 4
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; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v2
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; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
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; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v5.l, s2
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; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v1.h, s2
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; GFX11-TRUE16-NEXT: s_cselect_b32 s2, -1, 0
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; GFX11-TRUE16-NEXT: s_cmp_eq_u32 s4, 5
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; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 1, v4
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; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
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; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s2
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; GFX11-TRUE16-NEXT: s_cselect_b32 s2, -1, 0
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; GFX11-TRUE16-NEXT: s_cmp_eq_u32 s4, 6
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; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 1, v4
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; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
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; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v1.l, s2
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; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.h, s2
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; GFX11-TRUE16-NEXT: s_cselect_b32 s2, -1, 0
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; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v3
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; GFX11-TRUE16-NEXT: s_cmp_eq_u32 s4, 7
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v3.l, s2
|
||||
; GFX11-TRUE16-NEXT: s_cselect_b32 s2, -1, 0
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v1.l, s2
|
||||
; GFX11-TRUE16-NEXT: global_store_b16 v2, v0, s[0:1]
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v3.h, s2
|
||||
; GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]
|
||||
; GFX11-TRUE16-NEXT: s_endpgm
|
||||
;
|
||||
; GFX11-FAKE16-LABEL: v_extractelement_v8f16_dynamic_sgpr:
|
||||
@ -941,67 +937,59 @@ define amdgpu_kernel void @v_extractelement_v16f16_dynamic_sgpr(ptr addrspace(1)
|
||||
; GFX11-TRUE16-NEXT: s_cselect_b32 s2, -1, 0
|
||||
; GFX11-TRUE16-NEXT: s_cmp_eq_u32 s4, 2
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v0
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v9.l, s2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v0.h, s2
|
||||
; GFX11-TRUE16-NEXT: s_cselect_b32 s2, -1, 0
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v1
|
||||
; GFX11-TRUE16-NEXT: s_cmp_eq_u32 s4, 3
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v1.l, s2
|
||||
; GFX11-TRUE16-NEXT: s_cselect_b32 s2, -1, 0
|
||||
; GFX11-TRUE16-NEXT: s_cmp_eq_u32 s4, 4
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v2
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v9.l, s2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v1.h, s2
|
||||
; GFX11-TRUE16-NEXT: s_cselect_b32 s2, -1, 0
|
||||
; GFX11-TRUE16-NEXT: s_cmp_eq_u32 s4, 5
|
||||
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 1, v8
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.l, s2
|
||||
; GFX11-TRUE16-NEXT: s_cselect_b32 s2, -1, 0
|
||||
; GFX11-TRUE16-NEXT: s_cmp_eq_u32 s4, 6
|
||||
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 1, v8
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v1.l, s2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v2.h, s2
|
||||
; GFX11-TRUE16-NEXT: s_cselect_b32 s2, -1, 0
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v3
|
||||
; GFX11-TRUE16-NEXT: s_cmp_eq_u32 s4, 7
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v3.l, s2
|
||||
; GFX11-TRUE16-NEXT: s_cselect_b32 s2, -1, 0
|
||||
; GFX11-TRUE16-NEXT: s_cmp_eq_u32 s4, 8
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v1.l, s2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v3.h, s2
|
||||
; GFX11-TRUE16-NEXT: s_cselect_b32 s2, -1, 0
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v4
|
||||
; GFX11-TRUE16-NEXT: s_cmp_eq_u32 s4, 9
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v4.l, s2
|
||||
; GFX11-TRUE16-NEXT: s_cselect_b32 s2, -1, 0
|
||||
; GFX11-TRUE16-NEXT: s_cmp_eq_u32 s4, 10
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v1.l, s2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v4.h, s2
|
||||
; GFX11-TRUE16-NEXT: s_cselect_b32 s2, -1, 0
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v5
|
||||
; GFX11-TRUE16-NEXT: s_cmp_eq_u32 s4, 11
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v5.l, s2
|
||||
; GFX11-TRUE16-NEXT: s_cselect_b32 s2, -1, 0
|
||||
; GFX11-TRUE16-NEXT: s_cmp_eq_u32 s4, 12
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v1.l, s2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v5.h, s2
|
||||
; GFX11-TRUE16-NEXT: s_cselect_b32 s2, -1, 0
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v6
|
||||
; GFX11-TRUE16-NEXT: s_cmp_eq_u32 s4, 13
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v6.l, s2
|
||||
; GFX11-TRUE16-NEXT: s_cselect_b32 s2, -1, 0
|
||||
; GFX11-TRUE16-NEXT: s_cmp_eq_u32 s4, 14
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v1.l, s2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v6.h, s2
|
||||
; GFX11-TRUE16-NEXT: s_cselect_b32 s2, -1, 0
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v7
|
||||
; GFX11-TRUE16-NEXT: s_cmp_eq_u32 s4, 15
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v7.l, s2
|
||||
; GFX11-TRUE16-NEXT: s_cselect_b32 s2, -1, 0
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v1.l, s2
|
||||
; GFX11-TRUE16-NEXT: global_store_b16 v2, v0, s[0:1]
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v7.h, s2
|
||||
; GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]
|
||||
; GFX11-TRUE16-NEXT: s_endpgm
|
||||
;
|
||||
; GFX11-FAKE16-LABEL: v_extractelement_v16f16_dynamic_sgpr:
|
||||
|
||||
@ -675,10 +675,8 @@ define amdgpu_kernel void @v_extract_fabs_fold_v2f16(ptr addrspace(1) %in) #0 {
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: global_load_b32 v0, v0, s[0:1]
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_mul_f16_e64 v0.l, |v0.l|, 4.0
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
|
||||
; GFX11-TRUE16-NEXT: v_add_f16_e64 v0.h, |v1.l|, 2.0
|
||||
; GFX11-TRUE16-NEXT: v_add_f16_e64 v0.h, |v0.h|, 2.0
|
||||
; GFX11-TRUE16-NEXT: global_store_b16 v[0:1], v0, off dlc
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt_vscnt null, 0x0
|
||||
; GFX11-TRUE16-NEXT: global_store_d16_hi_b16 v[0:1], v0, off dlc
|
||||
|
||||
@ -2204,10 +2204,8 @@ define <2 x half> @v_rsq_v2f16(<2 x half> %a) {
|
||||
; GFX11-TRUE16-LABEL: v_rsq_v2f16:
|
||||
; GFX11-TRUE16: ; %bb.0:
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_rsq_f16_e32 v0.h, v0.h
|
||||
; GFX11-TRUE16-NEXT: v_rsq_f16_e32 v0.l, v0.l
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_rsq_f16_e32 v0.h, v1.l
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt_depctr 0xfff
|
||||
; GFX11-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h
|
||||
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
@ -2416,10 +2414,8 @@ define <2 x half> @v_neg_rsq_v2f16(<2 x half> %a) {
|
||||
; GFX11-TRUE16-LABEL: v_neg_rsq_v2f16:
|
||||
; GFX11-TRUE16: ; %bb.0:
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_rsq_f16_e32 v0.h, v0.h
|
||||
; GFX11-TRUE16-NEXT: v_rsq_f16_e32 v0.l, v0.l
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_rsq_f16_e32 v0.h, v1.l
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt_depctr 0xfff
|
||||
; GFX11-TRUE16-NEXT: v_pack_b32_f16 v0, -v0.l, -v0.h
|
||||
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
|
||||
@ -621,12 +621,11 @@ define <2 x i32> @test_D139469_v2f16(<2 x half> %arg) {
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_pk_mul_f16 v1, 0x291e, v0 op_sel_hi:[0,1]
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_pk_fma_f16 v0, 0x291e, v0, s0 op_sel_hi:[0,1,0]
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_pk_min_f16 v0, v1, v0
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, 0, v0.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_pk_min_f16 v1, v1, v0
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, 0, v1.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, 0, v1.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, 0, v1.h
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
@ -700,13 +699,12 @@ define <2 x i32> @test_D139469_v2f16(<2 x half> %arg) {
|
||||
; GFX12-SDAG-TRUE16-NEXT: s_wait_alu 0xfffe
|
||||
; GFX12-SDAG-TRUE16-NEXT: v_pk_fma_f16 v0, 0x291e, v0, s0 op_sel_hi:[0,1,0]
|
||||
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
|
||||
; GFX12-SDAG-TRUE16-NEXT: v_pk_min_num_f16 v0, v1, v0
|
||||
; GFX12-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
|
||||
; GFX12-SDAG-TRUE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, 0, v0.l
|
||||
; GFX12-SDAG-TRUE16-NEXT: v_pk_min_num_f16 v1, v1, v0
|
||||
; GFX12-SDAG-TRUE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, 0, v1.l
|
||||
; GFX12-SDAG-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
|
||||
; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
|
||||
; GFX12-SDAG-TRUE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, 0, v1.l
|
||||
; GFX12-SDAG-TRUE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, 0, v1.h
|
||||
; GFX12-SDAG-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo
|
||||
; GFX12-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
|
||||
@ -164,13 +164,11 @@ define <2 x half> @test_fmax_legacy_ugt_v2f16(<2 x half> %a, <2 x half> %b) #0 {
|
||||
; GFX11-SAFE-TRUE16-LABEL: test_fmax_legacy_ugt_v2f16:
|
||||
; GFX11-SAFE-TRUE16: ; %bb.0:
|
||||
; GFX11-SAFE-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v0
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_nle_f16_e32 vcc_lo, v0.h, v1.h
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_nle_f16_e64 s0, v0.l, v1.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_nle_f16_e32 vcc_lo, v3.l, v2.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v0.h, v1.h, v0.h, vcc_lo
|
||||
; GFX11-SAFE-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v0.l, v1.l, v0.l, s0
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v0.h, v2.l, v3.l, vcc_lo
|
||||
; GFX11-SAFE-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-SAFE-FAKE16-LABEL: test_fmax_legacy_ugt_v2f16:
|
||||
@ -286,16 +284,13 @@ define <3 x half> @test_fmax_legacy_ugt_v3f16(<3 x half> %a, <3 x half> %b) #0 {
|
||||
; GFX11-SAFE-TRUE16-LABEL: test_fmax_legacy_ugt_v3f16:
|
||||
; GFX11-SAFE-TRUE16: ; %bb.0:
|
||||
; GFX11-SAFE-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v2
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v0
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_nle_f16_e32 vcc_lo, v0.l, v2.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_nle_f16_e32 vcc_lo, v0.h, v2.h
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_nle_f16_e64 s0, v0.l, v2.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_nle_f16_e64 s1, v1.l, v3.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_nle_f16_e64 s0, v5.l, v4.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, vcc_lo
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v0.h, v2.h, v0.h, vcc_lo
|
||||
; GFX11-SAFE-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, s0
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, s1
|
||||
; GFX11-SAFE-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v0.h, v4.l, v5.l, s0
|
||||
; GFX11-SAFE-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-SAFE-FAKE16-LABEL: test_fmax_legacy_ugt_v3f16:
|
||||
@ -437,20 +432,16 @@ define <4 x half> @test_fmax_legacy_ugt_v4f16(<4 x half> %a, <4 x half> %b) #0 {
|
||||
; GFX11-SAFE-TRUE16-LABEL: test_fmax_legacy_ugt_v4f16:
|
||||
; GFX11-SAFE-TRUE16: ; %bb.0:
|
||||
; GFX11-SAFE-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v2
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v0
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v3
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v1
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_nle_f16_e32 vcc_lo, v1.l, v3.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_nle_f16_e64 s0, v0.l, v2.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_nle_f16_e64 s1, v5.l, v4.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_nle_f16_e64 s2, v7.l, v6.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, vcc_lo
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, s0
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_nle_f16_e32 vcc_lo, v1.h, v3.h
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_nle_f16_e64 s0, v0.h, v2.h
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_nle_f16_e64 s1, v0.l, v2.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_nle_f16_e64 s2, v1.l, v3.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v1.h, v3.h, v1.h, vcc_lo
|
||||
; GFX11-SAFE-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v0.h, v4.l, v5.l, s1
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v1.h, v6.l, v7.l, s2
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v0.h, v2.h, v0.h, s0
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, s1
|
||||
; GFX11-SAFE-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, s2
|
||||
; GFX11-SAFE-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-SAFE-FAKE16-LABEL: test_fmax_legacy_ugt_v4f16:
|
||||
@ -676,26 +667,18 @@ define <8 x half> @test_fmax_legacy_ugt_v8f16(<8 x half> %a, <8 x half> %b) #0 {
|
||||
; GFX11-SAFE-TRUE16-LABEL: test_fmax_legacy_ugt_v8f16:
|
||||
; GFX11-SAFE-TRUE16: ; %bb.0:
|
||||
; GFX11-SAFE-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v4
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v0
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v5
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v1
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 16, v6
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v2
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v7
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 16, v3
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_nle_f16_e32 vcc_lo, v9.l, v8.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_nle_f16_e64 s0, v11.l, v10.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_nle_f16_e64 s1, v13.l, v12.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_nle_f16_e32 vcc_lo, v0.h, v4.h
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_nle_f16_e64 s0, v1.h, v5.h
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_nle_f16_e64 s1, v2.h, v6.h
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_nle_f16_e64 s2, v3.h, v7.h
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_nle_f16_e64 s3, v0.l, v4.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_nle_f16_e64 s2, v15.l, v14.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_nle_f16_e64 s4, v1.l, v5.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_nle_f16_e64 s5, v2.l, v6.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_nle_f16_e64 s6, v3.l, v7.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v2.h, v12.l, v13.l, s1
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v3.h, v14.l, v15.l, s2
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v1.h, v10.l, v11.l, s0
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v0.h, v8.l, v9.l, vcc_lo
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v3.h, v7.h, v3.h, s2
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v2.h, v6.h, v2.h, s1
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v1.h, v5.h, v1.h, s0
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v0.h, v4.h, v0.h, vcc_lo
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v0.l, v4.l, v0.l, s3
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v1.l, v5.l, v1.l, s4
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v2.l, v6.l, v2.l, s5
|
||||
|
||||
@ -165,13 +165,11 @@ define <2 x half> @test_fmin_legacy_ule_v2f16(<2 x half> %a, <2 x half> %b) #0 {
|
||||
; GFX11-SAFE-TRUE16-LABEL: test_fmin_legacy_ule_v2f16:
|
||||
; GFX11-SAFE-TRUE16: ; %bb.0:
|
||||
; GFX11-SAFE-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v0
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_ngt_f16_e32 vcc_lo, v0.h, v1.h
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_ngt_f16_e64 s0, v0.l, v1.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_ngt_f16_e32 vcc_lo, v3.l, v2.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v0.h, v1.h, v0.h, vcc_lo
|
||||
; GFX11-SAFE-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v0.l, v1.l, v0.l, s0
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v0.h, v2.l, v3.l, vcc_lo
|
||||
; GFX11-SAFE-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-SAFE-FAKE16-LABEL: test_fmin_legacy_ule_v2f16:
|
||||
@ -287,16 +285,13 @@ define <3 x half> @test_fmin_legacy_ule_v3f16(<3 x half> %a, <3 x half> %b) #0 {
|
||||
; GFX11-SAFE-TRUE16-LABEL: test_fmin_legacy_ule_v3f16:
|
||||
; GFX11-SAFE-TRUE16: ; %bb.0:
|
||||
; GFX11-SAFE-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v2
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v0
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_ngt_f16_e32 vcc_lo, v0.l, v2.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_ngt_f16_e32 vcc_lo, v0.h, v2.h
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_ngt_f16_e64 s0, v0.l, v2.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_ngt_f16_e64 s1, v1.l, v3.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_ngt_f16_e64 s0, v5.l, v4.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, vcc_lo
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v0.h, v2.h, v0.h, vcc_lo
|
||||
; GFX11-SAFE-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, s0
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, s1
|
||||
; GFX11-SAFE-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v0.h, v4.l, v5.l, s0
|
||||
; GFX11-SAFE-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-SAFE-FAKE16-LABEL: test_fmin_legacy_ule_v3f16:
|
||||
@ -438,20 +433,16 @@ define <4 x half> @test_fmin_legacy_ule_v4f16(<4 x half> %a, <4 x half> %b) #0 {
|
||||
; GFX11-SAFE-TRUE16-LABEL: test_fmin_legacy_ule_v4f16:
|
||||
; GFX11-SAFE-TRUE16: ; %bb.0:
|
||||
; GFX11-SAFE-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v2
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v0
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v3
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v1
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_ngt_f16_e32 vcc_lo, v1.l, v3.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_ngt_f16_e64 s0, v0.l, v2.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_ngt_f16_e64 s1, v5.l, v4.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_ngt_f16_e64 s2, v7.l, v6.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, vcc_lo
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, s0
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_ngt_f16_e32 vcc_lo, v1.h, v3.h
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_ngt_f16_e64 s0, v0.h, v2.h
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_ngt_f16_e64 s1, v0.l, v2.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_ngt_f16_e64 s2, v1.l, v3.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v1.h, v3.h, v1.h, vcc_lo
|
||||
; GFX11-SAFE-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v0.h, v4.l, v5.l, s1
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v1.h, v6.l, v7.l, s2
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v0.h, v2.h, v0.h, s0
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, s1
|
||||
; GFX11-SAFE-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, s2
|
||||
; GFX11-SAFE-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-SAFE-FAKE16-LABEL: test_fmin_legacy_ule_v4f16:
|
||||
@ -677,26 +668,18 @@ define <8 x half> @test_fmin_legacy_ule_v8f16(<8 x half> %a, <8 x half> %b) #0 {
|
||||
; GFX11-SAFE-TRUE16-LABEL: test_fmin_legacy_ule_v8f16:
|
||||
; GFX11-SAFE-TRUE16: ; %bb.0:
|
||||
; GFX11-SAFE-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v4
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v0
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v5
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v1
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 16, v6
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v2
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v7
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 16, v3
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_ngt_f16_e32 vcc_lo, v9.l, v8.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_ngt_f16_e64 s0, v11.l, v10.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_ngt_f16_e64 s1, v13.l, v12.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_ngt_f16_e32 vcc_lo, v0.h, v4.h
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_ngt_f16_e64 s0, v1.h, v5.h
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_ngt_f16_e64 s1, v2.h, v6.h
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_ngt_f16_e64 s2, v3.h, v7.h
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_ngt_f16_e64 s3, v0.l, v4.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_ngt_f16_e64 s2, v15.l, v14.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_ngt_f16_e64 s4, v1.l, v5.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_ngt_f16_e64 s5, v2.l, v6.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cmp_ngt_f16_e64 s6, v3.l, v7.l
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v2.h, v12.l, v13.l, s1
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v3.h, v14.l, v15.l, s2
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v1.h, v10.l, v11.l, s0
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v0.h, v8.l, v9.l, vcc_lo
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v3.h, v7.h, v3.h, s2
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v2.h, v6.h, v2.h, s1
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v1.h, v5.h, v1.h, s0
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v0.h, v4.h, v0.h, vcc_lo
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v0.l, v4.l, v0.l, s3
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v1.l, v5.l, v1.l, s4
|
||||
; GFX11-SAFE-TRUE16-NEXT: v_cndmask_b16 v2.l, v6.l, v2.l, s5
|
||||
|
||||
@ -1314,25 +1314,21 @@ define <3 x i16> @v_fshr_v3i16(<3 x i16> %src0, <3 x i16> %src1, <3 x i16> %src2
|
||||
; GFX11-TRUE16-LABEL: v_fshr_v3i16:
|
||||
; GFX11-TRUE16: ; %bb.0:
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v4
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v2
|
||||
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.h, 1, v0.h
|
||||
; GFX11-TRUE16-NEXT: v_xor_b16 v1.h, v4.h, -1
|
||||
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v1.l, 1, v1.l
|
||||
; GFX11-TRUE16-NEXT: v_xor_b16 v2.h, v5.l, -1
|
||||
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.h, 1, v6.l
|
||||
; GFX11-TRUE16-NEXT: v_xor_b16 v1.h, v7.l, -1
|
||||
; GFX11-TRUE16-NEXT: v_xor_b16 v3.h, v5.l, -1
|
||||
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.l, 1, v0.l
|
||||
; GFX11-TRUE16-NEXT: v_xor_b16 v3.h, v4.l, -1
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b16 v4.h, v7.l, v8.l
|
||||
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v1.l, v2.h, v1.l
|
||||
; GFX11-TRUE16-NEXT: v_xor_b16 v5.h, v4.l, -1
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b16 v2.h, v4.h, v2.h
|
||||
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.h, v1.h, v0.h
|
||||
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v1.l, v3.h, v1.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b16 v1.h, v4.l, v2.l
|
||||
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.l, v3.h, v0.l
|
||||
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.l, v5.h, v0.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b16 v2.l, v5.l, v3.l
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
|
||||
; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v4.h
|
||||
; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v2.h
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
|
||||
; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v1.h
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
|
||||
; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v2.l
|
||||
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
@ -1370,25 +1366,21 @@ define <3 x i16> @v_fshr_v3i16(<3 x i16> %src0, <3 x i16> %src1, <3 x i16> %src2
|
||||
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
|
||||
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
|
||||
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
|
||||
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v0
|
||||
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v4
|
||||
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v2
|
||||
; GFX12-TRUE16-NEXT: v_lshlrev_b16 v0.h, 1, v0.h
|
||||
; GFX12-TRUE16-NEXT: v_xor_b16 v1.h, v4.h, -1
|
||||
; GFX12-TRUE16-NEXT: v_lshlrev_b16 v1.l, 1, v1.l
|
||||
; GFX12-TRUE16-NEXT: v_xor_b16 v2.h, v5.l, -1
|
||||
; GFX12-TRUE16-NEXT: v_lshlrev_b16 v0.h, 1, v6.l
|
||||
; GFX12-TRUE16-NEXT: v_xor_b16 v1.h, v7.l, -1
|
||||
; GFX12-TRUE16-NEXT: v_xor_b16 v3.h, v5.l, -1
|
||||
; GFX12-TRUE16-NEXT: v_lshlrev_b16 v0.l, 1, v0.l
|
||||
; GFX12-TRUE16-NEXT: v_xor_b16 v3.h, v4.l, -1
|
||||
; GFX12-TRUE16-NEXT: v_lshrrev_b16 v4.h, v7.l, v8.l
|
||||
; GFX12-TRUE16-NEXT: v_lshlrev_b16 v1.l, v2.h, v1.l
|
||||
; GFX12-TRUE16-NEXT: v_xor_b16 v5.h, v4.l, -1
|
||||
; GFX12-TRUE16-NEXT: v_lshrrev_b16 v2.h, v4.h, v2.h
|
||||
; GFX12-TRUE16-NEXT: v_lshlrev_b16 v0.h, v1.h, v0.h
|
||||
; GFX12-TRUE16-NEXT: v_lshlrev_b16 v1.l, v3.h, v1.l
|
||||
; GFX12-TRUE16-NEXT: v_lshrrev_b16 v1.h, v4.l, v2.l
|
||||
; GFX12-TRUE16-NEXT: v_lshlrev_b16 v0.l, v3.h, v0.l
|
||||
; GFX12-TRUE16-NEXT: v_lshlrev_b16 v0.l, v5.h, v0.l
|
||||
; GFX12-TRUE16-NEXT: v_lshrrev_b16 v2.l, v5.l, v3.l
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
|
||||
; GFX12-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v4.h
|
||||
; GFX12-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v2.h
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
|
||||
; GFX12-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v1.h
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
|
||||
; GFX12-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v2.l
|
||||
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
@ -1552,30 +1544,24 @@ define <4 x i16> @v_fshr_v4i16(<4 x i16> %src0, <4 x i16> %src1, <4 x i16> %src2
|
||||
; GFX11-TRUE16-LABEL: v_fshr_v4i16:
|
||||
; GFX11-TRUE16: ; %bb.0:
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v3
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v5
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v1
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v4
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b16 v3.h, v5.h, v3.h
|
||||
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v1.h, 1, v1.h
|
||||
; GFX11-TRUE16-NEXT: v_xor_b16 v5.h, v5.h, -1
|
||||
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.h, 1, v0.h
|
||||
; GFX11-TRUE16-NEXT: v_xor_b16 v6.l, v4.h, -1
|
||||
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v1.l, 1, v1.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b16 v0.h, v7.l, v6.l
|
||||
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v1.h, 1, v8.l
|
||||
; GFX11-TRUE16-NEXT: v_xor_b16 v3.h, v7.l, -1
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v2
|
||||
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.h, 1, v9.l
|
||||
; GFX11-TRUE16-NEXT: v_xor_b16 v4.h, v10.l, -1
|
||||
; GFX11-TRUE16-NEXT: v_xor_b16 v5.h, v5.l, -1
|
||||
; GFX11-TRUE16-NEXT: v_xor_b16 v6.h, v5.l, -1
|
||||
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.l, 1, v0.l
|
||||
; GFX11-TRUE16-NEXT: v_xor_b16 v6.l, v4.l, -1
|
||||
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v1.h, v3.h, v1.h
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b16 v3.h, v10.l, v7.l
|
||||
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v2.h, v4.h, v2.h
|
||||
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v1.l, v5.h, v1.l
|
||||
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.l, v6.l, v0.l
|
||||
; GFX11-TRUE16-NEXT: v_xor_b16 v7.l, v4.l, -1
|
||||
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v1.h, v5.h, v1.h
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b16 v2.h, v4.h, v2.h
|
||||
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.h, v6.l, v0.h
|
||||
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v1.l, v6.h, v1.l
|
||||
; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.l, v7.l, v0.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b16 v2.l, v4.l, v2.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b16 v3.l, v5.l, v3.l
|
||||
; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v0.h
|
||||
; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v2.h, v3.h
|
||||
; GFX11-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v3.h
|
||||
; GFX11-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v2.h
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v2.l
|
||||
; GFX11-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v3.l
|
||||
@ -1623,30 +1609,24 @@ define <4 x i16> @v_fshr_v4i16(<4 x i16> %src0, <4 x i16> %src1, <4 x i16> %src2
|
||||
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
|
||||
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
|
||||
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
|
||||
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v3
|
||||
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v5
|
||||
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v1
|
||||
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v0
|
||||
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v4
|
||||
; GFX12-TRUE16-NEXT: v_lshrrev_b16 v3.h, v5.h, v3.h
|
||||
; GFX12-TRUE16-NEXT: v_lshlrev_b16 v1.h, 1, v1.h
|
||||
; GFX12-TRUE16-NEXT: v_xor_b16 v5.h, v5.h, -1
|
||||
; GFX12-TRUE16-NEXT: v_lshlrev_b16 v0.h, 1, v0.h
|
||||
; GFX12-TRUE16-NEXT: v_xor_b16 v6.l, v4.h, -1
|
||||
; GFX12-TRUE16-NEXT: v_lshlrev_b16 v1.l, 1, v1.l
|
||||
; GFX12-TRUE16-NEXT: v_lshrrev_b16 v0.h, v7.l, v6.l
|
||||
; GFX12-TRUE16-NEXT: v_lshlrev_b16 v1.h, 1, v8.l
|
||||
; GFX12-TRUE16-NEXT: v_xor_b16 v3.h, v7.l, -1
|
||||
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v2
|
||||
; GFX12-TRUE16-NEXT: v_lshlrev_b16 v2.h, 1, v9.l
|
||||
; GFX12-TRUE16-NEXT: v_xor_b16 v4.h, v10.l, -1
|
||||
; GFX12-TRUE16-NEXT: v_xor_b16 v5.h, v5.l, -1
|
||||
; GFX12-TRUE16-NEXT: v_xor_b16 v6.h, v5.l, -1
|
||||
; GFX12-TRUE16-NEXT: v_lshlrev_b16 v0.l, 1, v0.l
|
||||
; GFX12-TRUE16-NEXT: v_xor_b16 v6.l, v4.l, -1
|
||||
; GFX12-TRUE16-NEXT: v_lshlrev_b16 v1.h, v3.h, v1.h
|
||||
; GFX12-TRUE16-NEXT: v_lshrrev_b16 v3.h, v10.l, v7.l
|
||||
; GFX12-TRUE16-NEXT: v_lshlrev_b16 v2.h, v4.h, v2.h
|
||||
; GFX12-TRUE16-NEXT: v_lshlrev_b16 v1.l, v5.h, v1.l
|
||||
; GFX12-TRUE16-NEXT: v_lshlrev_b16 v0.l, v6.l, v0.l
|
||||
; GFX12-TRUE16-NEXT: v_xor_b16 v7.l, v4.l, -1
|
||||
; GFX12-TRUE16-NEXT: v_lshlrev_b16 v1.h, v5.h, v1.h
|
||||
; GFX12-TRUE16-NEXT: v_lshrrev_b16 v2.h, v4.h, v2.h
|
||||
; GFX12-TRUE16-NEXT: v_lshlrev_b16 v0.h, v6.l, v0.h
|
||||
; GFX12-TRUE16-NEXT: v_lshlrev_b16 v1.l, v6.h, v1.l
|
||||
; GFX12-TRUE16-NEXT: v_lshlrev_b16 v0.l, v7.l, v0.l
|
||||
; GFX12-TRUE16-NEXT: v_lshrrev_b16 v2.l, v4.l, v2.l
|
||||
; GFX12-TRUE16-NEXT: v_lshrrev_b16 v3.l, v5.l, v3.l
|
||||
; GFX12-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v0.h
|
||||
; GFX12-TRUE16-NEXT: v_or_b16 v0.h, v2.h, v3.h
|
||||
; GFX12-TRUE16-NEXT: v_or_b16 v1.h, v1.h, v3.h
|
||||
; GFX12-TRUE16-NEXT: v_or_b16 v0.h, v0.h, v2.h
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
|
||||
; GFX12-TRUE16-NEXT: v_or_b16 v0.l, v0.l, v2.l
|
||||
; GFX12-TRUE16-NEXT: v_or_b16 v1.l, v1.l, v3.l
|
||||
|
||||
@ -33,45 +33,85 @@ define bfloat @v_uitofp_i1_to_bf16(i1 %num) {
|
||||
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
|
||||
; GFX9-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-LABEL: v_uitofp_i1_to_bf16:
|
||||
; GFX11: ; %bb.0:
|
||||
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-NEXT: v_and_b32_e32 v0, 1, v0
|
||||
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
|
||||
; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0
|
||||
; GFX11-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc_lo
|
||||
; GFX11-NEXT: v_bfe_u32 v1, v0, 16, 1
|
||||
; GFX11-NEXT: v_or_b32_e32 v2, 0x400000, v0
|
||||
; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
|
||||
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
|
||||
; GFX11-NEXT: v_add3_u32 v1, v1, v0, 0x7fff
|
||||
; GFX11-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo
|
||||
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX11-NEXT: v_lshrrev_b32_e32 v0, 16, v0
|
||||
; GFX11-NEXT: s_setpc_b64 s[30:31]
|
||||
; GFX11-TRUE16-LABEL: v_uitofp_i1_to_bf16:
|
||||
; GFX11-TRUE16: ; %bb.0:
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 1, v0
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v0
|
||||
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h
|
||||
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX12-LABEL: v_uitofp_i1_to_bf16:
|
||||
; GFX12: ; %bb.0:
|
||||
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
|
||||
; GFX12-NEXT: s_wait_expcnt 0x0
|
||||
; GFX12-NEXT: s_wait_samplecnt 0x0
|
||||
; GFX12-NEXT: s_wait_bvhcnt 0x0
|
||||
; GFX12-NEXT: s_wait_kmcnt 0x0
|
||||
; GFX12-NEXT: v_and_b32_e32 v0, 1, v0
|
||||
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
|
||||
; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0
|
||||
; GFX12-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc_lo
|
||||
; GFX12-NEXT: v_bfe_u32 v1, v0, 16, 1
|
||||
; GFX12-NEXT: v_or_b32_e32 v2, 0x400000, v0
|
||||
; GFX12-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
|
||||
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
|
||||
; GFX12-NEXT: v_add3_u32 v1, v1, v0, 0x7fff
|
||||
; GFX12-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo
|
||||
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX12-NEXT: v_lshrrev_b32_e32 v0, 16, v0
|
||||
; GFX12-NEXT: s_setpc_b64 s[30:31]
|
||||
; GFX11-FAKE16-LABEL: v_uitofp_i1_to_bf16:
|
||||
; GFX11-FAKE16: ; %bb.0:
|
||||
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 1, v0
|
||||
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
|
||||
; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0
|
||||
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc_lo
|
||||
; GFX11-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 1
|
||||
; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v0
|
||||
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
|
||||
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
|
||||
; GFX11-FAKE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff
|
||||
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo
|
||||
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
|
||||
; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX12-TRUE16-LABEL: v_uitofp_i1_to_bf16:
|
||||
; GFX12-TRUE16: ; %bb.0:
|
||||
; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
|
||||
; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
|
||||
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
|
||||
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
|
||||
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
|
||||
; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 1, v0
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
|
||||
; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 1
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v0
|
||||
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h
|
||||
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX12-FAKE16-LABEL: v_uitofp_i1_to_bf16:
|
||||
; GFX12-FAKE16: ; %bb.0:
|
||||
; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
|
||||
; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
|
||||
; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
|
||||
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
|
||||
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
|
||||
; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, 1, v0
|
||||
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
|
||||
; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0
|
||||
; GFX12-FAKE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc_lo
|
||||
; GFX12-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 1
|
||||
; GFX12-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v0
|
||||
; GFX12-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
|
||||
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
|
||||
; GFX12-FAKE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff
|
||||
; GFX12-FAKE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo
|
||||
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
|
||||
; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
|
||||
%op = uitofp i1 %num to bfloat
|
||||
ret bfloat %op
|
||||
}
|
||||
@ -196,7 +236,7 @@ define <2 x bfloat> @v_uitofp_v2i1_to_v2bf16(<2 x i1> %num) {
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v0, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v0
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v0
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v0, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 1, v1
|
||||
@ -204,14 +244,14 @@ define <2 x bfloat> @v_uitofp_v2i1_to_v2bf16(<2 x i1> %num) {
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v1, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v1
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v1, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v4, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v1
|
||||
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v2, v4, v1, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v3, v3, v1, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_bfi_b32 v0, 0xffff, v0, v1
|
||||
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
@ -255,7 +295,7 @@ define <2 x bfloat> @v_uitofp_v2i1_to_v2bf16(<2 x i1> %num) {
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v2, v0, 16, 1
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v0
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v0
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v2, v2, v0, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: v_and_b32_e32 v1, 1, v1
|
||||
@ -264,16 +304,16 @@ define <2 x bfloat> @v_uitofp_v2i1_to_v2bf16(<2 x i1> %num) {
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v4, v1, 16, 1
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v3, v1, 16, 1
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v1
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v4, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v1
|
||||
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v2, v4, v1, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v3, v3, v1, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
|
||||
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
|
||||
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX12-TRUE16-NEXT: v_bfi_b32 v0, 0xffff, v0, v1
|
||||
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
@ -495,39 +535,38 @@ define <3 x bfloat> @v_uitofp_v3i1_to_v3bf16(<3 x i1> %num) {
|
||||
; GFX11-TRUE16: ; %bb.0:
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 1, v0
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 1, v1
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 1, v2
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v0
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 1, v1
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v1
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v1, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v5, v5, v1, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 1, v2
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v2
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v0
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v1, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 1.0, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v2, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v1
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v1
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v1, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v2, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v3, v3, v2, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v5, v4, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v2
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v5, v6, v2, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
|
||||
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v7, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
|
||||
; GFX11-TRUE16-NEXT: v_bfi_b32 v0, 0xffff, v0, v1
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v3, v6, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v5, v3, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v2.h
|
||||
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-FAKE16-LABEL: v_uitofp_v3i1_to_v3bf16:
|
||||
@ -575,44 +614,43 @@ define <3 x bfloat> @v_uitofp_v3i1_to_v3bf16(<3 x i1> %num) {
|
||||
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
|
||||
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
|
||||
; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 1, v0
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
|
||||
; GFX12-TRUE16-NEXT: v_and_b32_e32 v1, 1, v1
|
||||
; GFX12-TRUE16-NEXT: v_and_b32_e32 v2, 1, v2
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
|
||||
; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v0
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: v_and_b32_e32 v1, 1, v1
|
||||
; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v1
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v5, v1, 16, 1
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v5, v5, v1, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: v_and_b32_e32 v2, 1, v2
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
|
||||
; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v2
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v0
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v4, v1, 16, 1
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 1.0, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v2
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v1
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v4, v4, v1, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v6, v2, 16, 1
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v3, v2, 16, 1
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v1
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
|
||||
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v3, v3, v2, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v2
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v5, v6, v2, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_2)
|
||||
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v1, v5, v4, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v7, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
|
||||
; GFX12-TRUE16-NEXT: v_bfi_b32 v0, 0xffff, v0, v1
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v2, v3, v6, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v2
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v2, v5, v3, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v1.l, v2.h
|
||||
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX12-FAKE16-LABEL: v_uitofp_v3i1_to_v3bf16:
|
||||
@ -899,45 +937,47 @@ define <4 x bfloat> @v_uitofp_v4i1_to_v4bf16(<4 x i1> %num) {
|
||||
; GFX11-TRUE16-LABEL: v_uitofp_v4i1_to_v4bf16:
|
||||
; GFX11-TRUE16: ; %bb.0:
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 1, v2
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 1, v3
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 1, v0
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 1.0, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 1, v2
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v3
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v2, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v3, 0, 1.0, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v2
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v3, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v3
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 1.0, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v3, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 1, v0
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v2, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v2
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v2
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v2, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 1, v1
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v5, v5, v2, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v3, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v3
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v0, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v0
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v0, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 1, v1
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v1
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v0, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v0
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v5, v5, v3, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v0, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v4, v7, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v1, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v5, v8, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v1, 16, 1
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v6, v9, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v1
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v5, v9, v1, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
|
||||
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v2.h
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v7, v10, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v1, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v1
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v5, v8, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v4, v6, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v6, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v5, v8, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_bfi_b32 v0, 0xffff, v0, v1
|
||||
; GFX11-TRUE16-NEXT: v_bfi_b32 v1, 0xffff, v2, v3
|
||||
@ -997,52 +1037,55 @@ define <4 x bfloat> @v_uitofp_v4i1_to_v4bf16(<4 x i1> %num) {
|
||||
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
|
||||
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
|
||||
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
|
||||
; GFX12-TRUE16-NEXT: v_and_b32_e32 v2, 1, v2
|
||||
; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 1, v3
|
||||
; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 1, v0
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
|
||||
; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v2
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 1.0, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_and_b32_e32 v2, 1, v2
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
|
||||
; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v3
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v4, v2, 16, 1
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v3, 0, 1.0, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v2
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v4, v3, 16, 1
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v3
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 1.0, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v4, v4, v3, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 1, v0
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v5, v2, 16, 1
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v2
|
||||
; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v2
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v4, v4, v2, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: v_and_b32_e32 v1, 1, v1
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v5, v5, v2, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1.0, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v5, v3, 16, 1
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v3
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v7, v0, 16, 1
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v0
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v7, v7, v0, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: v_and_b32_e32 v1, 1, v1
|
||||
; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v1
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v6, v0, 16, 1
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v0
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v5, v5, v3, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 1.0, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v6, v6, v0, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v9, v1, 16, 1
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v2, v4, v7, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v2, v5, v8, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v4, v1, 16, 1
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
|
||||
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v1
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v5, v9, v1, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_2)
|
||||
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v2.l, v2.h
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v0, v6, v9, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v0, v7, v10, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v4, v4, v1, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v1
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
|
||||
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
|
||||
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v3, v5, v8, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v3, v4, v6, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v6, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v1, v5, v8, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX12-TRUE16-NEXT: v_bfi_b32 v0, 0xffff, v0, v1
|
||||
; GFX12-TRUE16-NEXT: v_bfi_b32 v1, 0xffff, v2, v3
|
||||
@ -1344,45 +1387,85 @@ define bfloat @v_sitofp_i1_to_bf16(i1 %num) {
|
||||
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
|
||||
; GFX9-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-LABEL: v_sitofp_i1_to_bf16:
|
||||
; GFX11: ; %bb.0:
|
||||
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-NEXT: v_and_b32_e32 v0, 1, v0
|
||||
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
|
||||
; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0
|
||||
; GFX11-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc_lo
|
||||
; GFX11-NEXT: v_bfe_u32 v1, v0, 16, 1
|
||||
; GFX11-NEXT: v_or_b32_e32 v2, 0x400000, v0
|
||||
; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
|
||||
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
|
||||
; GFX11-NEXT: v_add3_u32 v1, v1, v0, 0x7fff
|
||||
; GFX11-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo
|
||||
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX11-NEXT: v_lshrrev_b32_e32 v0, 16, v0
|
||||
; GFX11-NEXT: s_setpc_b64 s[30:31]
|
||||
; GFX11-TRUE16-LABEL: v_sitofp_i1_to_bf16:
|
||||
; GFX11-TRUE16: ; %bb.0:
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 1, v0
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v0
|
||||
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h
|
||||
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX12-LABEL: v_sitofp_i1_to_bf16:
|
||||
; GFX12: ; %bb.0:
|
||||
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
|
||||
; GFX12-NEXT: s_wait_expcnt 0x0
|
||||
; GFX12-NEXT: s_wait_samplecnt 0x0
|
||||
; GFX12-NEXT: s_wait_bvhcnt 0x0
|
||||
; GFX12-NEXT: s_wait_kmcnt 0x0
|
||||
; GFX12-NEXT: v_and_b32_e32 v0, 1, v0
|
||||
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
|
||||
; GFX12-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0
|
||||
; GFX12-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc_lo
|
||||
; GFX12-NEXT: v_bfe_u32 v1, v0, 16, 1
|
||||
; GFX12-NEXT: v_or_b32_e32 v2, 0x400000, v0
|
||||
; GFX12-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
|
||||
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
|
||||
; GFX12-NEXT: v_add3_u32 v1, v1, v0, 0x7fff
|
||||
; GFX12-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo
|
||||
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX12-NEXT: v_lshrrev_b32_e32 v0, 16, v0
|
||||
; GFX12-NEXT: s_setpc_b64 s[30:31]
|
||||
; GFX11-FAKE16-LABEL: v_sitofp_i1_to_bf16:
|
||||
; GFX11-FAKE16: ; %bb.0:
|
||||
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 1, v0
|
||||
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
|
||||
; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0
|
||||
; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc_lo
|
||||
; GFX11-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 1
|
||||
; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v0
|
||||
; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
|
||||
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
|
||||
; GFX11-FAKE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff
|
||||
; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo
|
||||
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
|
||||
; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX12-TRUE16-LABEL: v_sitofp_i1_to_bf16:
|
||||
; GFX12-TRUE16: ; %bb.0:
|
||||
; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x0
|
||||
; GFX12-TRUE16-NEXT: s_wait_expcnt 0x0
|
||||
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
|
||||
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
|
||||
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
|
||||
; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 1, v0
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
|
||||
; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 1
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v0
|
||||
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h
|
||||
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX12-FAKE16-LABEL: v_sitofp_i1_to_bf16:
|
||||
; GFX12-FAKE16: ; %bb.0:
|
||||
; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x0
|
||||
; GFX12-FAKE16-NEXT: s_wait_expcnt 0x0
|
||||
; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x0
|
||||
; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x0
|
||||
; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x0
|
||||
; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, 1, v0
|
||||
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
|
||||
; GFX12-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0
|
||||
; GFX12-FAKE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc_lo
|
||||
; GFX12-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 1
|
||||
; GFX12-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v0
|
||||
; GFX12-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
|
||||
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
|
||||
; GFX12-FAKE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff
|
||||
; GFX12-FAKE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo
|
||||
; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX12-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
|
||||
; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]
|
||||
%op = sitofp i1 %num to bfloat
|
||||
ret bfloat %op
|
||||
}
|
||||
@ -1507,7 +1590,7 @@ define <2 x bfloat> @v_sitofp_v2i1_to_v2bf16(<2 x i1> %num) {
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v2, v0, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v0
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v0
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v2, v2, v0, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 1, v1
|
||||
@ -1515,14 +1598,14 @@ define <2 x bfloat> @v_sitofp_v2i1_to_v2bf16(<2 x i1> %num) {
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v1, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v1
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v1, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v4, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v1
|
||||
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v2, v4, v1, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v3, v3, v1, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_bfi_b32 v0, 0xffff, v0, v1
|
||||
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
@ -1566,7 +1649,7 @@ define <2 x bfloat> @v_sitofp_v2i1_to_v2bf16(<2 x i1> %num) {
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v2, v0, 16, 1
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v0
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v0
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v2, v2, v0, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: v_and_b32_e32 v1, 1, v1
|
||||
@ -1575,16 +1658,16 @@ define <2 x bfloat> @v_sitofp_v2i1_to_v2bf16(<2 x i1> %num) {
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v4, v1, 16, 1
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v3, v1, 16, 1
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v1
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v4, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v1
|
||||
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v2, v4, v1, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v3, v3, v1, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
|
||||
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
|
||||
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX12-TRUE16-NEXT: v_bfi_b32 v0, 0xffff, v0, v1
|
||||
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
@ -1804,39 +1887,38 @@ define <3 x bfloat> @v_sitofp_v3i1_to_v3bf16(<3 x i1> %num) {
|
||||
; GFX11-TRUE16: ; %bb.0:
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 1, v0
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 1, v1
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 1, v2
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v0
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 1, v1
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v1
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v1, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v5, v5, v1, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 1, v2
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v2
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v0
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v1, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, -1.0, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v2, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v1
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v1
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v1, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v2, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v3, v3, v2, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v5, v4, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v2
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v5, v6, v2, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
|
||||
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v7, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
|
||||
; GFX11-TRUE16-NEXT: v_bfi_b32 v0, 0xffff, v0, v1
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v3, v6, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v5, v3, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v2.h
|
||||
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-FAKE16-LABEL: v_sitofp_v3i1_to_v3bf16:
|
||||
@ -1884,44 +1966,43 @@ define <3 x bfloat> @v_sitofp_v3i1_to_v3bf16(<3 x i1> %num) {
|
||||
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
|
||||
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
|
||||
; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 1, v0
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
|
||||
; GFX12-TRUE16-NEXT: v_and_b32_e32 v1, 1, v1
|
||||
; GFX12-TRUE16-NEXT: v_and_b32_e32 v2, 1, v2
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
|
||||
; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v0
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: v_and_b32_e32 v1, 1, v1
|
||||
; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v1
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v3, v0, 16, 1
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v5, v1, 16, 1
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v5, v5, v1, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: v_and_b32_e32 v2, 1, v2
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
|
||||
; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v2
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v0
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v4, v1, 16, 1
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, -1.0, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v2
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v1
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v4, v4, v1, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v6, v2, 16, 1
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v3, v2, 16, 1
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v1
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
|
||||
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v3, v3, v2, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v3, 0x400000, v2
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v5, v6, v2, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_2)
|
||||
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v1, v5, v4, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v7, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
|
||||
; GFX12-TRUE16-NEXT: v_bfi_b32 v0, 0xffff, v0, v1
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v2, v3, v6, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v2
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v2, v5, v3, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v1.l, v2.h
|
||||
; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX12-FAKE16-LABEL: v_sitofp_v3i1_to_v3bf16:
|
||||
@ -2205,45 +2286,47 @@ define <4 x bfloat> @v_sitofp_v4i1_to_v4bf16(<4 x i1> %num) {
|
||||
; GFX11-TRUE16-LABEL: v_sitofp_v4i1_to_v4bf16:
|
||||
; GFX11-TRUE16: ; %bb.0:
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 1, v2
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v3, 1, v3
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 1, v0
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, -1.0, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 1, v2
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v3
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v2, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v3, 0, -1.0, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v2
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v3, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v3
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, -1.0, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v3, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 1, v0
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v2, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v2
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v2
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v2, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 1, v1
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v5, v5, v2, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v5, v3, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v3
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v0, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v0
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v7, v7, v0, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 1, v1
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v1
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v0, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v0
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v5, v5, v3, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v6, v6, v0, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v4, v7, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v9, v1, 16, 1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v5, v8, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
|
||||
; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v1, 16, 1
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v6, v9, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v1
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v5, v9, v1, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
|
||||
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v2.l, v2.h
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v0, v7, v10, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
|
||||
; GFX11-TRUE16-NEXT: v_add3_u32 v4, v4, v1, 0x7fff
|
||||
; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v1
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v5, v8, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v4, v6, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v6, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v5, v8, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_bfi_b32 v0, 0xffff, v0, v1
|
||||
; GFX11-TRUE16-NEXT: v_bfi_b32 v1, 0xffff, v2, v3
|
||||
@ -2303,52 +2386,55 @@ define <4 x bfloat> @v_sitofp_v4i1_to_v4bf16(<4 x i1> %num) {
|
||||
; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x0
|
||||
; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x0
|
||||
; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x0
|
||||
; GFX12-TRUE16-NEXT: v_and_b32_e32 v2, 1, v2
|
||||
; GFX12-TRUE16-NEXT: v_and_b32_e32 v3, 1, v3
|
||||
; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 1, v0
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
|
||||
; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v2
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, -1.0, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_and_b32_e32 v2, 1, v2
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
|
||||
; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v3
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v4, v2, 16, 1
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v3, 0, -1.0, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v2
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v4, v3, 16, 1
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v3
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, -1.0, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v4, v4, v3, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 1, v0
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v5, v2, 16, 1
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v2
|
||||
; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v2
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v4, v4, v2, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: v_and_b32_e32 v1, 1, v1
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v5, v5, v2, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1.0, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v5, v3, 16, 1
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v3
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v7, v0, 16, 1
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v0
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v7, v7, v0, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: v_and_b32_e32 v1, 1, v1
|
||||
; GFX12-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v1
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v6, v0, 16, 1
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v0
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v5, v5, v3, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1.0, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v6, v6, v0, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v9, v1, 16, 1
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v2, v4, v7, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v2, v5, v8, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0
|
||||
; GFX12-TRUE16-NEXT: v_bfe_u32 v4, v1, 16, 1
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
|
||||
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v1
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v5, v9, v1, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_2)
|
||||
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v2.l, v2.h
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v0, v6, v9, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v0, v7, v10, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
|
||||
; GFX12-TRUE16-NEXT: v_add3_u32 v4, v4, v1, 0x7fff
|
||||
; GFX12-TRUE16-NEXT: v_or_b32_e32 v6, 0x400000, v1
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
|
||||
; GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
|
||||
; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v3, v5, v8, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v3, v4, v6, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
|
||||
; GFX12-TRUE16-NEXT: s_wait_alu 0xfffd
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v1, v4, v6, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: v_cndmask_b32_e32 v1, v5, v8, vcc_lo
|
||||
; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX12-TRUE16-NEXT: v_bfi_b32 v0, 0xffff, v0, v1
|
||||
; GFX12-TRUE16-NEXT: v_bfi_b32 v1, 0xffff, v2, v3
|
||||
|
||||
@ -878,7 +878,7 @@ define amdgpu_kernel void @v_insertelement_v2i16_0_reghi(ptr addrspace(1) %out,
|
||||
; GFX11-TRUE16-NEXT: global_load_b32 v1, v0, s[2:3]
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e64 v2, 16, s4
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
|
||||
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v1.h
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_lshl_or_b32 v1, v1, 16, v2
|
||||
; GFX11-TRUE16-NEXT: global_store_b32 v0, v1, s[0:1]
|
||||
@ -2799,11 +2799,11 @@ define amdgpu_kernel void @v_insertelement_v8f16_dynamic(ptr addrspace(1) %out,
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
|
||||
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x10
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 4, v0
|
||||
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 4, v0
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: global_load_b128 v[0:3], v6, s[2:3]
|
||||
; GFX11-TRUE16-NEXT: global_load_b128 v[0:3], v5, s[2:3]
|
||||
; GFX11-TRUE16-NEXT: s_cmp_eq_u32 s5, 6
|
||||
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, s4
|
||||
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, s4
|
||||
; GFX11-TRUE16-NEXT: s_cselect_b32 s2, -1, 0
|
||||
; GFX11-TRUE16-NEXT: s_cmp_eq_u32 s5, 7
|
||||
; GFX11-TRUE16-NEXT: s_cselect_b32 s3, -1, 0
|
||||
@ -2820,19 +2820,15 @@ define amdgpu_kernel void @v_insertelement_v8f16_dynamic(ptr addrspace(1) %out,
|
||||
; GFX11-TRUE16-NEXT: s_cmp_eq_u32 s5, 1
|
||||
; GFX11-TRUE16-NEXT: s_cselect_b32 s5, -1, 0
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v3
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v2
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v1
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v3.l, v5.l, s2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v2.l, v5.l, s6
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v1.l, v5.l, s8
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v0.l, v5.l, s4
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.h, v7.l, v5.l, s3
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.h, v8.l, v5.l, s7
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, v9.l, v5.l, s9
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v10.l, v5.l, s5
|
||||
; GFX11-TRUE16-NEXT: global_store_b128 v6, v[1:4], s[0:1]
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v4.l, s2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.h, v3.h, v4.l, s3
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v4.l, s6
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, v2.h, v4.l, s7
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v4.l, s8
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v1.h, v4.l, s9
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v4.l, s4
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v0.h, v4.l, s5
|
||||
; GFX11-TRUE16-NEXT: global_store_b128 v5, v[0:3], s[0:1]
|
||||
; GFX11-TRUE16-NEXT: s_endpgm
|
||||
;
|
||||
; GFX11-FAKE16-LABEL: v_insertelement_v8f16_dynamic:
|
||||
@ -3447,13 +3443,13 @@ define amdgpu_kernel void @v_insertelement_v16f16_dynamic(ptr addrspace(1) %out,
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
|
||||
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x10
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 5, v0
|
||||
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 5, v0
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: s_clause 0x1
|
||||
; GFX11-TRUE16-NEXT: global_load_b128 v[0:3], v12, s[2:3]
|
||||
; GFX11-TRUE16-NEXT: global_load_b128 v[4:7], v12, s[2:3] offset:16
|
||||
; GFX11-TRUE16-NEXT: global_load_b128 v[0:3], v9, s[2:3]
|
||||
; GFX11-TRUE16-NEXT: global_load_b128 v[4:7], v9, s[2:3] offset:16
|
||||
; GFX11-TRUE16-NEXT: s_cmp_eq_u32 s5, 6
|
||||
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.h, s4
|
||||
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v8.l, s4
|
||||
; GFX11-TRUE16-NEXT: s_cselect_b32 s2, -1, 0
|
||||
; GFX11-TRUE16-NEXT: s_cmp_eq_u32 s5, 7
|
||||
; GFX11-TRUE16-NEXT: s_cselect_b32 s3, -1, 0
|
||||
@ -3486,34 +3482,26 @@ define amdgpu_kernel void @v_insertelement_v16f16_dynamic(ptr addrspace(1) %out,
|
||||
; GFX11-TRUE16-NEXT: s_cmp_eq_u32 s5, 9
|
||||
; GFX11-TRUE16-NEXT: s_cselect_b32 s5, -1, 0
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.l, v3.l, v8.h, s2
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v3
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.l, v2.l, v8.h, s6
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v1.l, v8.h, s8
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 16, v1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v0.l, v8.h, s10
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v8.l, s2
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v7.l, v8.h, s12
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v7
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v6.l, v8.h, s14
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v6
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v5.l, v8.h, s16
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v5
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v4.l, v8.h, s4
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v4
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.h, v7.l, v8.h, s13
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, v6.l, v8.h, s15
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v5.l, v8.h, s17
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.h, v13.l, v8.h, s3
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v4.l, v8.h, s5
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.h, v14.l, v8.h, s7
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.h, v15.l, v8.h, s9
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.h, v16.l, v8.h, s11
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v7.l, v8.l, s12
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.h, v7.h, v8.l, s13
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v6.l, v8.l, s14
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.h, v6.h, v8.l, s15
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v5.l, v8.l, s16
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.h, v5.h, v8.l, s17
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v4.l, v8.l, s4
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.h, v4.h, v8.l, s5
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.h, v3.h, v8.l, s3
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v2.l, v8.l, s6
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, v2.h, v8.l, s7
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v8.l, s8
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v1.h, v8.l, s9
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v8.l, s10
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v0.h, v8.l, s11
|
||||
; GFX11-TRUE16-NEXT: s_clause 0x1
|
||||
; GFX11-TRUE16-NEXT: global_store_b128 v12, v[0:3], s[0:1] offset:16
|
||||
; GFX11-TRUE16-NEXT: global_store_b128 v12, v[8:11], s[0:1]
|
||||
; GFX11-TRUE16-NEXT: global_store_b128 v9, v[4:7], s[0:1] offset:16
|
||||
; GFX11-TRUE16-NEXT: global_store_b128 v9, v[0:3], s[0:1]
|
||||
; GFX11-TRUE16-NEXT: s_endpgm
|
||||
;
|
||||
; GFX11-FAKE16-LABEL: v_insertelement_v16f16_dynamic:
|
||||
|
||||
@ -1054,11 +1054,10 @@ define <2 x i1> @isnan_v2bf16(<2 x bfloat> %x) nounwind {
|
||||
; GFX11SELDAG-TRUE16-LABEL: isnan_v2bf16:
|
||||
; GFX11SELDAG-TRUE16: ; %bb.0:
|
||||
; GFX11SELDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v0
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cmp_lt_i16_e32 vcc_lo, 0x7f80, v0.l
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_and_b32_e32 v1, 0x7fff7fff, v0
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cmp_lt_i16_e32 vcc_lo, 0x7f80, v1.l
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cmp_lt_i16_e32 vcc_lo, 0x7f80, v1.h
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo
|
||||
; GFX11SELDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
@ -1141,12 +1140,11 @@ define <3 x i1> @isnan_v3bf16(<3 x bfloat> %x) nounwind {
|
||||
; GFX11SELDAG-TRUE16-LABEL: isnan_v3bf16:
|
||||
; GFX11SELDAG-TRUE16: ; %bb.0:
|
||||
; GFX11SELDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v0
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_and_b32_e32 v2, 0x7fff7fff, v0
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_and_b32_e32 v3, 0x7fff, v1
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cmp_lt_i16_e32 vcc_lo, 0x7f80, v0.l
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cmp_lt_i16_e32 vcc_lo, 0x7f80, v2.l
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cmp_lt_i16_e32 vcc_lo, 0x7f80, v2.h
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cmp_lt_i16_e32 vcc_lo, 0x7f80, v3.l
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo
|
||||
@ -1245,17 +1243,15 @@ define <4 x i1> @isnan_v4bf16(<4 x bfloat> %x) nounwind {
|
||||
; GFX11SELDAG-TRUE16-LABEL: isnan_v4bf16:
|
||||
; GFX11SELDAG-TRUE16: ; %bb.0:
|
||||
; GFX11SELDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v0
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_and_b32_e32 v1, 0x7fff7fff, v1
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cmp_lt_i16_e32 vcc_lo, 0x7f80, v0.l
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cmp_lt_i16_e32 vcc_lo, 0x7f80, v1.l
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cmp_lt_i16_e32 vcc_lo, 0x7f80, v4.l
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_and_b32_e32 v3, 0x7fff7fff, v0
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_and_b32_e32 v4, 0x7fff7fff, v1
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cmp_lt_i16_e32 vcc_lo, 0x7f80, v3.l
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cmp_lt_i16_e32 vcc_lo, 0x7f80, v4.l
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cmp_lt_i16_e32 vcc_lo, 0x7f80, v3.h
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cmp_lt_i16_e32 vcc_lo, 0x7f80, v4.h
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc_lo
|
||||
; GFX11SELDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
|
||||
@ -1341,10 +1341,10 @@ define <2 x i1> @isnan_v2f16(<2 x half> %x) nounwind {
|
||||
; GFX11SELDAG-TRUE16-LABEL: isnan_v2f16:
|
||||
; GFX11SELDAG-TRUE16: ; %bb.0:
|
||||
; GFX11SELDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cmp_u_f16_e32 vcc_lo, v0.l, v0.l
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cmp_u_f16_e32 vcc_lo, v1.l, v1.l
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cmp_u_f16_e32 vcc_lo, v0.h, v0.h
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_mov_b32_e32 v0, v2
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo
|
||||
; GFX11SELDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
@ -1499,11 +1499,10 @@ define <3 x i1> @isnan_v3f16(<3 x half> %x) nounwind {
|
||||
; GFX11SELDAG-TRUE16-LABEL: isnan_v3f16:
|
||||
; GFX11SELDAG-TRUE16: ; %bb.0:
|
||||
; GFX11SELDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cmp_u_f16_e32 vcc_lo, v0.h, v0.h
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc_lo
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cmp_u_f16_e32 vcc_lo, v0.l, v0.l
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cmp_u_f16_e32 vcc_lo, v2.l, v2.l
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc_lo
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cmp_u_f16_e32 vcc_lo, v1.l, v1.l
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_mov_b32_e32 v1, v3
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo
|
||||
@ -1690,15 +1689,14 @@ define <4 x i1> @isnan_v4f16(<4 x half> %x) nounwind {
|
||||
; GFX11SELDAG-TRUE16-LABEL: isnan_v4f16:
|
||||
; GFX11SELDAG-TRUE16: ; %bb.0:
|
||||
; GFX11SELDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cmp_u_f16_e32 vcc_lo, v0.h, v0.h
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc_lo
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cmp_u_f16_e32 vcc_lo, v0.l, v0.l
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cmp_u_f16_e32 vcc_lo, v1.l, v1.l
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cmp_u_f16_e32 vcc_lo, v4.l, v4.l
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cmp_u_f16_e32 vcc_lo, v3.l, v3.l
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cmp_u_f16_e32 vcc_lo, v1.h, v1.h
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_mov_b32_e32 v1, v4
|
||||
; GFX11SELDAG-TRUE16-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc_lo
|
||||
; GFX11SELDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
|
||||
@ -471,13 +471,12 @@ define <2 x half> @test_ldexp_v2f16_v2i32(<2 x half> %a, <2 x i32> %b) {
|
||||
; GFX11-SDAG-TRUE16: ; %bb.0:
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_movk_i32 s0, 0x8000
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v0
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v2, v2, s0, 0x7fff
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v1, v1, s0, 0x7fff
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v3.l, v2.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v2, v2, s0, 0x7fff
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v0.l, v1.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v0.h, v2.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
@ -594,11 +593,9 @@ define <2 x half> @test_ldexp_v2f16_v2i16(<2 x half> %a, <2 x i16> %b) {
|
||||
; GFX11-SDAG-TRUE16-LABEL: test_ldexp_v2f16_v2i16:
|
||||
; GFX11-SDAG-TRUE16: ; %bb.0:
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v0
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v0.h, v1.h
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v0.l, v1.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v3.l, v2.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
@ -712,15 +709,15 @@ define <3 x half> @test_ldexp_v3f16_v3i32(<3 x half> %a, <3 x i32> %b) {
|
||||
; GFX11-SDAG-TRUE16: ; %bb.0:
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_movk_i32 s0, 0x8000
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v0
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v3, v3, s0, 0x7fff
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v2, v2, s0, 0x7fff
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v5.l, v3.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v3, v3, s0, 0x7fff
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v0.l, v2.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v0.h, v3.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v2, v4, s0, 0x7fff
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v1.l, v1.l, v2.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
@ -856,12 +853,10 @@ define <3 x half> @test_ldexp_v3f16_v3i16(<3 x half> %a, <3 x i16> %b) {
|
||||
; GFX11-SDAG-TRUE16-LABEL: test_ldexp_v3f16_v3i16:
|
||||
; GFX11-SDAG-TRUE16: ; %bb.0:
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v2
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v0
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v0.h, v2.h
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v0.l, v2.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v1.l, v1.l, v3.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v5.l, v4.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
@ -993,18 +988,17 @@ define <4 x half> @test_ldexp_v4f16_v4i32(<4 x half> %a, <4 x i32> %b) {
|
||||
; GFX11-SDAG-TRUE16: ; %bb.0:
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_movk_i32 s0, 0x8000
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v1
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v5, v5, s0, 0x7fff
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v3, v3, s0, 0x7fff
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v0
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v2, v2, s0, 0x7fff
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v4, v4, s0, 0x7fff
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v1.h, v6.l, v5.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v7.l, v3.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v0.l, v2.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v2, v2, s0, 0x7fff
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v3, v3, s0, 0x7fff
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v5, v5, s0, 0x7fff
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v1.l, v1.l, v4.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v0.l, v2.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v0.h, v3.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v1.h, v1.h, v5.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_pack_b32_f16 v1, v1.l, v1.h
|
||||
@ -1174,15 +1168,10 @@ define <4 x half> @test_ldexp_v4f16_v4i16(<4 x half> %a, <4 x i16> %b) {
|
||||
; GFX11-SDAG-TRUE16-LABEL: test_ldexp_v4f16_v4i16:
|
||||
; GFX11-SDAG-TRUE16: ; %bb.0:
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v3
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v2
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v0
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v1
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v1.l, v1.l, v3.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v1.h, v1.h, v3.h
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v0.h, v2.h
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v0.l, v2.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v6.l, v5.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v1.h, v7.l, v4.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v1.l, v1.l, v3.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_pack_b32_f16 v1, v1.l, v1.h
|
||||
|
||||
@ -712,16 +712,12 @@ define <2 x half> @v_maximum_v2f16(<2 x half> %src0, <2 x half> %src1) {
|
||||
; GFX11-TRUE16-LABEL: v_maximum_v2f16:
|
||||
; GFX11-TRUE16: ; %bb.0:
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v4, v0, v1
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v0.l, v1.l
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v3.l, v2.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v4
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v4.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v1.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v2, v0, v1
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v0.h, v1.h
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v2.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v2.h, s0
|
||||
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-FAKE16-LABEL: v_maximum_v2f16:
|
||||
@ -886,16 +882,12 @@ define <2 x half> @v_maximum_v2f16__nsz(<2 x half> %src0, <2 x half> %src1) {
|
||||
; GFX11-TRUE16-LABEL: v_maximum_v2f16__nsz:
|
||||
; GFX11-TRUE16: ; %bb.0:
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v4, v0, v1
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v0.l, v1.l
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v3.l, v2.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v4
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v4.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v1.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v2, v0, v1
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v0.h, v1.h
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v2.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v2.h, s0
|
||||
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-FAKE16-LABEL: v_maximum_v2f16__nsz:
|
||||
@ -1240,19 +1232,16 @@ define <3 x half> @v_maximum_v3f16(<3 x half> %src0, <3 x half> %src1) {
|
||||
; GFX11-TRUE16-LABEL: v_maximum_v3f16:
|
||||
; GFX11-TRUE16: ; %bb.0:
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v2
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v6, v0, v2
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v1.l, v3.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v0.l, v2.l
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v4, v0, v2
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v0.h, v2.h
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v1, v1, v3
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v5.l, v4.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v6
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v6.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v1.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v4.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v4.h, s1
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v2.l, s1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v1.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-FAKE16-LABEL: v_maximum_v3f16:
|
||||
@ -1450,19 +1439,16 @@ define <3 x half> @v_maximum_v3f16__nsz(<3 x half> %src0, <3 x half> %src1) {
|
||||
; GFX11-TRUE16-LABEL: v_maximum_v3f16__nsz:
|
||||
; GFX11-TRUE16: ; %bb.0:
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v2
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v6, v0, v2
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v1.l, v3.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v0.l, v2.l
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v4, v0, v2
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v0.h, v2.h
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v1, v1, v3
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v5.l, v4.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v6
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v6.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v1.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v4.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v4.h, s1
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v2.l, s1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v1.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-FAKE16-LABEL: v_maximum_v3f16__nsz:
|
||||
@ -1683,22 +1669,17 @@ define <4 x half> @v_maximum_v4f16(<4 x half> %src0, <4 x half> %src1) {
|
||||
; GFX11-TRUE16: ; %bb.0:
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v1.l, v3.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v3
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v1
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v2
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v8, v0, v2
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v1, v1, v3
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v5.l, v4.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v0.l, v2.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s2, v7.l, v6.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v8
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v1.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v8.l, s1
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v4, v1, v3
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v0.l, v2.l
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v5, v0, v2
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v0.h, v2.h
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s2, v1.h, v3.h
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v4.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v2.l, s2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, 0x7e00, v3.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v5.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v5.h, s1
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, 0x7e00, v4.h, s2
|
||||
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-FAKE16-LABEL: v_maximum_v4f16:
|
||||
@ -1931,22 +1912,17 @@ define <4 x half> @v_maximum_v4f16__nsz(<4 x half> %src0, <4 x half> %src1) {
|
||||
; GFX11-TRUE16: ; %bb.0:
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v1.l, v3.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v3
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v1
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v2
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v8, v0, v2
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v1, v1, v3
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v5.l, v4.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v0.l, v2.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s2, v7.l, v6.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v8
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v1.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v8.l, s1
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v4, v1, v3
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v0.l, v2.l
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v5, v0, v2
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v0.h, v2.h
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s2, v1.h, v3.h
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v4.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v2.l, s2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, 0x7e00, v3.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v5.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v5.h, s1
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, 0x7e00, v4.h, s2
|
||||
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-FAKE16-LABEL: v_maximum_v4f16__nsz:
|
||||
@ -2258,36 +2234,24 @@ define <8 x half> @v_maximum_v8f16(<8 x half> %src0, <8 x half> %src1) {
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v3.l, v7.l
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v8, v3, v7
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v7
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v3
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v2.l, v6.l
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v10, v2, v6
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v6
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v2
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v9, v2, v6
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v0.l, v4.l
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v10, v0, v4
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, 0x7e00, v8.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v9.l, v7.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v8
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, 0x7e00, v10.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v11.l, v6.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v1.l, v5.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v5
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v1
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v4
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v12, v0, v4
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v1, v1, v5
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s2, v8.l, v6.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s3, v0.l, v4.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s4, v11.l, v9.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v12
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v1
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v10
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v1.l, s1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v12.l, s3
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v4.l, s4
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, 0x7e00, v5.l, s2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, 0x7e00, v6.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.h, 0x7e00, v7.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v3.h, v7.h
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, 0x7e00, v9.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v1.l, v5.l
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v7, v1, v5
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s2, v0.h, v4.h
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s3, v1.h, v5.h
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s4, v2.h, v6.h
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v10.l, s1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v7.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v10.h, s2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, 0x7e00, v7.h, s3
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, 0x7e00, v9.h, s4
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.h, 0x7e00, v8.h, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-FAKE16-LABEL: v_maximum_v8f16:
|
||||
@ -2696,70 +2660,46 @@ define <16 x half> @v_maximum_v16f16(<16 x half> %src0, <16 x half> %src1) {
|
||||
; GFX11-TRUE16-LABEL: v_maximum_v16f16:
|
||||
; GFX11-TRUE16: ; %bb.0:
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 16, v15
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 16, v7
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v18, v7, v15
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v7.l, v15.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v6.l, v14.l
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v19, v5, v13
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v17.l, v16.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 16, v18
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v16, v6, v14
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, 0x7e00, v18.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v14
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 16, v13
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.h, 0x7e00, v15.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 16, v6
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v5
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, 0x7e00, v16.l, s1
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v5.l, v13.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v19
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v15.l, v14.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v16
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v18.l, v17.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s2, v4.l, v12.l
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v15, v4, v12
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 16, v12
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 16, v4
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.h, 0x7e00, v14.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, 0x7e00, v19.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.h, 0x7e00, v13.l, s1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, 0x7e00, v15.l, s2
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v16.l, v12.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 16, v15
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v16, v7, v15
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v6.l, v14.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v6.h, v14.h
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s2, v5.l, v13.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s3, v5.h, v13.h
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, 0x7e00, v16.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v7.h, v15.h
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v15, v6, v14
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v14, v5, v13
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v13, v4, v12
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s4, v1.h, v9.h
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.h, 0x7e00, v16.h, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, 0x7e00, v15.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.h, 0x7e00, v15.h, s1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, 0x7e00, v14.l, s2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.h, 0x7e00, v14.h, s3
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v4.l, v12.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v3.l, v11.l
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v13, v3, v11
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v11
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v3
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v14, v3, v11
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v2.l, v10.l
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v15, v2, v10
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v10
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 16, v2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, 0x7e00, v13.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v14.l, v11.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v13
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, 0x7e00, v13.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v4.h, v12.h
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, 0x7e00, v14.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v3.h, v11.h
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, 0x7e00, v15.l, s1
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v16.l, v10.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s2, v1.l, v9.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v9
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v1
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v8
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v17, v0, v8
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v1, v1, v9
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s3, v13.l, v10.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s4, v0.l, v8.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s5, v16.l, v14.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v17
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v1
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v15
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v1.l, s2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v17.l, s4
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v8.l, s5
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, 0x7e00, v9.l, s3
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, 0x7e00, v10.l, s1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.h, 0x7e00, v11.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.h, 0x7e00, v12.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v1.l, v9.l
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v11, v1, v9
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s2, v0.l, v8.l
|
||||
; GFX11-TRUE16-NEXT: v_pk_max_f16 v12, v0, v8
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s3, v0.h, v8.h
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s5, v2.h, v10.h
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v11.l, s1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, 0x7e00, v11.h, s4
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v12.l, s2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v12.h, s3
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, 0x7e00, v15.h, s5
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.h, 0x7e00, v14.h, s0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.h, 0x7e00, v13.h, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-FAKE16-LABEL: v_maximum_v16f16:
|
||||
|
||||
@ -602,16 +602,12 @@ define <2 x half> @v_minimum_v2f16(<2 x half> %src0, <2 x half> %src1) {
|
||||
; GFX11-TRUE16-LABEL: v_minimum_v2f16:
|
||||
; GFX11-TRUE16: ; %bb.0:
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v4, v0, v1
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v0.l, v1.l
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v3.l, v2.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v4
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v4.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v1.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v2, v0, v1
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v0.h, v1.h
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v2.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v2.h, s0
|
||||
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-FAKE16-LABEL: v_minimum_v2f16:
|
||||
@ -741,16 +737,12 @@ define <2 x half> @v_minimum_v2f16__nsz(<2 x half> %src0, <2 x half> %src1) {
|
||||
; GFX11-TRUE16-LABEL: v_minimum_v2f16__nsz:
|
||||
; GFX11-TRUE16: ; %bb.0:
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v4, v0, v1
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v0.l, v1.l
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v3.l, v2.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v4
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v4.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v1.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v2, v0, v1
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v0.h, v1.h
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v2.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v2.h, s0
|
||||
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-FAKE16-LABEL: v_minimum_v2f16__nsz:
|
||||
@ -1026,19 +1018,16 @@ define <3 x half> @v_minimum_v3f16(<3 x half> %src0, <3 x half> %src1) {
|
||||
; GFX11-TRUE16-LABEL: v_minimum_v3f16:
|
||||
; GFX11-TRUE16: ; %bb.0:
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v2
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v6, v0, v2
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v1.l, v3.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v0.l, v2.l
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v4, v0, v2
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v0.h, v2.h
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v1, v1, v3
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v5.l, v4.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v6
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v6.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v1.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v4.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v4.h, s1
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v2.l, s1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v1.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-FAKE16-LABEL: v_minimum_v3f16:
|
||||
@ -1189,19 +1178,16 @@ define <3 x half> @v_minimum_v3f16__nsz(<3 x half> %src0, <3 x half> %src1) {
|
||||
; GFX11-TRUE16-LABEL: v_minimum_v3f16__nsz:
|
||||
; GFX11-TRUE16: ; %bb.0:
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v2
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v6, v0, v2
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v1.l, v3.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v0.l, v2.l
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v4, v0, v2
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v0.h, v2.h
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v1, v1, v3
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v5.l, v4.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v6
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v6.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v1.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v4.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v4.h, s1
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v2.l, s1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v1.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-FAKE16-LABEL: v_minimum_v3f16__nsz:
|
||||
@ -1368,22 +1354,17 @@ define <4 x half> @v_minimum_v4f16(<4 x half> %src0, <4 x half> %src1) {
|
||||
; GFX11-TRUE16: ; %bb.0:
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v1.l, v3.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v3
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v1
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v2
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v8, v0, v2
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v1, v1, v3
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v5.l, v4.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v0.l, v2.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s2, v7.l, v6.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v8
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v1.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v8.l, s1
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v4, v1, v3
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v0.l, v2.l
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v5, v0, v2
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v0.h, v2.h
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s2, v1.h, v3.h
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v4.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v2.l, s2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, 0x7e00, v3.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v5.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v5.h, s1
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, 0x7e00, v4.h, s2
|
||||
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-FAKE16-LABEL: v_minimum_v4f16:
|
||||
@ -1557,22 +1538,17 @@ define <4 x half> @v_minimum_v4f16__nsz(<4 x half> %src0, <4 x half> %src1) {
|
||||
; GFX11-TRUE16: ; %bb.0:
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v1.l, v3.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v3
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v1
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v2
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v8, v0, v2
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v1, v1, v3
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v5.l, v4.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v0.l, v2.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s2, v7.l, v6.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v8
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v1.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v8.l, s1
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v4, v1, v3
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v0.l, v2.l
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v5, v0, v2
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v0.h, v2.h
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s2, v1.h, v3.h
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v4.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v2.l, s2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, 0x7e00, v3.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v5.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v5.h, s1
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, 0x7e00, v4.h, s2
|
||||
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-FAKE16-LABEL: v_minimum_v4f16__nsz:
|
||||
@ -1797,36 +1773,24 @@ define <8 x half> @v_minimum_v8f16(<8 x half> %src0, <8 x half> %src1) {
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v3.l, v7.l
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v8, v3, v7
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v7
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v3
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v2.l, v6.l
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v10, v2, v6
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v6
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v2
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v9, v2, v6
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v0.l, v4.l
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v10, v0, v4
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, 0x7e00, v8.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v9.l, v7.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v8
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, 0x7e00, v10.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v11.l, v6.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v1.l, v5.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v5
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v1
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v4
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v12, v0, v4
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v1, v1, v5
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s2, v8.l, v6.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s3, v0.l, v4.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s4, v11.l, v9.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v12
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v1
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v10
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v1.l, s1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v12.l, s3
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v4.l, s4
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, 0x7e00, v5.l, s2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, 0x7e00, v6.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.h, 0x7e00, v7.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v3.h, v7.h
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, 0x7e00, v9.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v1.l, v5.l
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v7, v1, v5
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s2, v0.h, v4.h
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s3, v1.h, v5.h
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s4, v2.h, v6.h
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v10.l, s1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v7.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v10.h, s2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, 0x7e00, v7.h, s3
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, 0x7e00, v9.h, s4
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.h, 0x7e00, v8.h, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-FAKE16-LABEL: v_minimum_v8f16:
|
||||
@ -2115,70 +2079,46 @@ define <16 x half> @v_minimum_v16f16(<16 x half> %src0, <16 x half> %src1) {
|
||||
; GFX11-TRUE16-LABEL: v_minimum_v16f16:
|
||||
; GFX11-TRUE16: ; %bb.0:
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 16, v15
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 16, v7
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v18, v7, v15
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v7.l, v15.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v6.l, v14.l
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v19, v5, v13
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v17.l, v16.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 16, v18
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v16, v6, v14
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, 0x7e00, v18.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v14
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 16, v13
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.h, 0x7e00, v15.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 16, v6
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v5
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, 0x7e00, v16.l, s1
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v5.l, v13.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v19
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v15.l, v14.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v16
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v18.l, v17.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s2, v4.l, v12.l
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v15, v4, v12
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 16, v12
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 16, v4
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.h, 0x7e00, v14.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, 0x7e00, v19.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.h, 0x7e00, v13.l, s1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, 0x7e00, v15.l, s2
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v16.l, v12.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 16, v15
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v16, v7, v15
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v6.l, v14.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v6.h, v14.h
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s2, v5.l, v13.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s3, v5.h, v13.h
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, 0x7e00, v16.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v7.h, v15.h
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v15, v6, v14
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v14, v5, v13
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v13, v4, v12
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s4, v1.h, v9.h
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.h, 0x7e00, v16.h, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, 0x7e00, v15.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.h, 0x7e00, v15.h, s1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, 0x7e00, v14.l, s2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.h, 0x7e00, v14.h, s3
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v4.l, v12.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v3.l, v11.l
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v13, v3, v11
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v11
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v3
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v14, v3, v11
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v2.l, v10.l
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v15, v2, v10
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v10
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 16, v2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, 0x7e00, v13.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v14.l, v11.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v13
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, 0x7e00, v13.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e32 vcc_lo, v4.h, v12.h
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, 0x7e00, v14.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s0, v3.h, v11.h
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, 0x7e00, v15.l, s1
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v16.l, v10.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s2, v1.l, v9.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v9
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v1
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v14, 16, v8
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v17, v0, v8
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v1, v1, v9
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s3, v13.l, v10.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s4, v0.l, v8.l
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s5, v16.l, v14.l
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v17
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v1
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v15
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v1.l, s2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v17.l, s4
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v8.l, s5
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, 0x7e00, v9.l, s3
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, 0x7e00, v10.l, s1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.h, 0x7e00, v11.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.h, 0x7e00, v12.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s1, v1.l, v9.l
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v11, v1, v9
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s2, v0.l, v8.l
|
||||
; GFX11-TRUE16-NEXT: v_pk_min_f16 v12, v0, v8
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s3, v0.h, v8.h
|
||||
; GFX11-TRUE16-NEXT: v_cmp_o_f16_e64 s5, v2.h, v10.h
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x7e00, v11.l, s1
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, 0x7e00, v11.h, s4
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x7e00, v12.l, s2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, 0x7e00, v12.h, s3
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, 0x7e00, v15.h, s5
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.h, 0x7e00, v14.h, s0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.h, 0x7e00, v13.h, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-FAKE16-LABEL: v_minimum_v16f16:
|
||||
|
||||
@ -2354,9 +2354,8 @@ define float @v_mad_mix_f32_precvtnegf16hi_abs_f16lo_f16lo(i32 %src0.arg, half %
|
||||
; SDAG-GFX1100-TRUE16-LABEL: v_mad_mix_f32_precvtnegf16hi_abs_f16lo_f16lo:
|
||||
; SDAG-GFX1100-TRUE16: ; %bb.0:
|
||||
; SDAG-GFX1100-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; SDAG-GFX1100-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v0
|
||||
; SDAG-GFX1100-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
|
||||
; SDAG-GFX1100-TRUE16-NEXT: v_xor_b16 v0.l, 0x8000, v0.l
|
||||
; SDAG-GFX1100-TRUE16-NEXT: v_xor_b16 v0.l, 0x8000, v0.h
|
||||
; SDAG-GFX1100-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; SDAG-GFX1100-TRUE16-NEXT: v_fma_mix_f32 v0, |v0|, v1, v2 op_sel_hi:[1,1,1]
|
||||
; SDAG-GFX1100-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -1778,17 +1778,13 @@ define <4 x half> @v_vselect_v4f16(<4 x half> %a, <4 x half> %b, <4 x i32> %cond
|
||||
; GFX11-TRUE16-LABEL: v_vselect_v4f16:
|
||||
; GFX11-TRUE16: ; %bb.0:
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v5
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, 0, v7
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v1
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v3
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v2
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v7
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, 0, v5
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s1, 0, v4
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s2, 0, v6
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v7.l, v5.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v3.h, v1.h, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v9.l, v8.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v2.h, v0.h, s0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, s1
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, s2
|
||||
@ -1993,23 +1989,15 @@ define <8 x half> @v_vselect_v8f16(<8 x half> %a, <8 x half> %b, <8 x i32> %cond
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v8
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, 0, v10
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s1, 0, v12
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s2, 0, v9
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s3, 0, v11
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s4, 0, v13
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s5, 0, v15
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v3
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v7
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v2
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v6
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 16, v1
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v13, 16, v5
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 16, v4
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s2, 0, v15
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s3, 0, v13
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s4, 0, v11
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s5, 0, v9
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s6, 0, v14
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.h, v9.l, v8.l, s5
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, v11.l, v10.l, s4
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v13.l, v12.l, s3
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v16.l, v15.l, s2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.h, v7.h, v3.h, s2
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, v6.h, v2.h, s3
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v5.h, v1.h, s4
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v4.h, v0.h, s5
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v4.l, v0.l, vcc_lo
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v5.l, v1.l, s0
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v6.l, v2.l, s1
|
||||
@ -2408,35 +2396,19 @@ define <16 x half> @v_vselect_v16f16(<16 x half> %a, <16 x half> %b, <16 x i32>
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s6, 0, v30
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s7, 0, v17
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s8, 0, v19
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s9, 0, v21
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s10, 0, v23
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s9, 0, v29
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s10, 0, v27
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s11, 0, v25
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s12, 0, v27
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s13, 0, v29
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 16, v7
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 16, v15
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 16, v6
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 16, v14
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 16, v5
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 16, v13
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 16, v4
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 16, v12
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v3
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v11
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v2
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v10
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v1
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v9
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v8
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s12, 0, v23
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s13, 0, v21
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v12.l, v4.l, s3
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.h, v19.l, v18.l, s13
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.h, v21.l, v20.l, s12
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.h, v23.l, v22.l, s11
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.h, v25.l, v24.l, s10
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, v27.l, v26.l, s9
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v29.l, v28.l, s8
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v32.l, v30.l, s7
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.h, v14.h, v6.h, s9
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.h, v13.h, v5.h, s10
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.h, v12.h, v4.h, s11
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.h, v11.h, v3.h, s12
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, v10.h, v2.h, s13
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v9.h, v1.h, s8
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v8.h, v0.h, s7
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v15.l, v7.l, s6
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v14.l, v6.l, s5
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v13.l, v5.l, s4
|
||||
@ -2447,7 +2419,7 @@ define <16 x half> @v_vselect_v16f16(<16 x half> %a, <16 x half> %b, <16 x i32>
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s3, 0, v31
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.h, v17.l, v16.l, s3
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.h, v15.h, v7.h, s3
|
||||
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-FAKE16-LABEL: v_vselect_v16f16:
|
||||
@ -3414,48 +3386,17 @@ define <32 x half> @v_vselect_v32f16(<32 x half> %a, <32 x half> %b, <32 x i32>
|
||||
; GFX11-TRUE16-NEXT: scratch_load_b32 v80, off, s32 offset:80
|
||||
; GFX11-TRUE16-NEXT: scratch_load_b32 v81, off, s32 offset:88
|
||||
; GFX11-TRUE16-NEXT: scratch_load_b32 v82, off, s32 offset:128
|
||||
; GFX11-TRUE16-NEXT: scratch_load_b32 v83, off, s32
|
||||
; GFX11-TRUE16-NEXT: scratch_load_b32 v84, off, s32 offset:120
|
||||
; GFX11-TRUE16-NEXT: scratch_load_b32 v85, off, s32 offset:112
|
||||
; GFX11-TRUE16-NEXT: scratch_load_b32 v86, off, s32 offset:104
|
||||
; GFX11-TRUE16-NEXT: scratch_load_b32 v87, off, s32 offset:96
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v15
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v97, 16, v14
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v98, 16, v30
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v99, 16, v13
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v100, 16, v29
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v101, 16, v12
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v102, 16, v28
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v103, 16, v11
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v112, 16, v27
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v113, 16, v10
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v114, 16, v26
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v115, 16, v9
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v116, 16, v25
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v117, 16, v8
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v118, 16, v24
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v119, 16, v7
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v128, 16, v23
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v129, 16, v6
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v130, 16, v22
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v131, 16, v5
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v132, 16, v21
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v133, 16, v4
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v134, 16, v20
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v135, 16, v3
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v144, 16, v19
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v145, 16, v2
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v146, 16, v18
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v147, 16, v1
|
||||
; GFX11-TRUE16-NEXT: scratch_load_b32 v83, off, s32 offset:120
|
||||
; GFX11-TRUE16-NEXT: scratch_load_b32 v84, off, s32 offset:112
|
||||
; GFX11-TRUE16-NEXT: scratch_load_b32 v85, off, s32 offset:104
|
||||
; GFX11-TRUE16-NEXT: scratch_load_b32 v86, off, s32 offset:96
|
||||
; GFX11-TRUE16-NEXT: scratch_load_b32 v87, off, s32
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(32)
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v31
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v17
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(31)
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, 0, v32
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v0
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(30)
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s1, 0, v33
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v16
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(29)
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s2, 0, v34
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(28)
|
||||
@ -3507,32 +3448,31 @@ define <32 x half> @v_vselect_v32f16(<32 x half> %a, <32 x half> %b, <32 x i32>
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(5)
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s26, 0, v82
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(4)
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v83
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s27, 0, v83
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(3)
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s27, 0, v84
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s28, 0, v84
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(2)
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s28, 0, v85
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s29, 0, v85
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s29, 0, v86
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s40, 0, v86
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s40, 0, v87
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v15.h, v34.l, v96.l, s26
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v14.h, v98.l, v97.l, s27
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v13.h, v100.l, v99.l, s28
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v12.h, v102.l, v101.l, s29
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.h, v112.l, v103.l, s40
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.h, v114.l, v113.l, s25
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.h, v116.l, v115.l, s24
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.h, v118.l, v117.l, s23
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.h, v128.l, v119.l, s22
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.h, v130.l, v129.l, s21
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.h, v132.l, v131.l, s20
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.h, v134.l, v133.l, s19
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.h, v144.l, v135.l, s18
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, v146.l, v145.l, s17
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v31.l, v147.l, s16
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v33.l, v32.l, s15
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v15.l, v83.l, v15.l, s14
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v15.h, v87.h, v15.h, s26
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v14.h, v30.h, v14.h, s27
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v13.h, v29.h, v13.h, s28
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v12.h, v28.h, v12.h, s29
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.h, v27.h, v11.h, s40
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.h, v26.h, v10.h, s25
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.h, v25.h, v9.h, s24
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.h, v24.h, v8.h, s23
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.h, v23.h, v7.h, s22
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.h, v22.h, v6.h, s21
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.h, v21.h, v5.h, s20
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.h, v20.h, v4.h, s19
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.h, v19.h, v3.h, s18
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, v18.h, v2.h, s17
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v17.h, v1.h, s16
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v16.h, v0.h, s15
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v15.l, v87.l, v15.l, s14
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v14.l, v30.l, v14.l, s13
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v13.l, v29.l, v13.l, s12
|
||||
; GFX11-TRUE16-NEXT: v_cndmask_b16 v12.l, v28.l, v12.l, s11
|
||||
|
||||
@ -242,14 +242,10 @@ define <4 x half> @v_constained_fadd_v4f16_fpexcept_strict(<4 x half> %x, <4 x h
|
||||
; GFX11-TRUE16-LABEL: v_constained_fadd_v4f16_fpexcept_strict:
|
||||
; GFX11-TRUE16: ; %bb.0:
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v3
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v2
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v1
|
||||
; GFX11-TRUE16-NEXT: v_add_f16_e32 v1.l, v1.l, v3.l
|
||||
; GFX11-TRUE16-NEXT: v_add_f16_e32 v1.h, v1.h, v3.h
|
||||
; GFX11-TRUE16-NEXT: v_add_f16_e32 v0.h, v0.h, v2.h
|
||||
; GFX11-TRUE16-NEXT: v_add_f16_e32 v0.l, v0.l, v2.l
|
||||
; GFX11-TRUE16-NEXT: v_add_f16_e32 v0.h, v6.l, v5.l
|
||||
; GFX11-TRUE16-NEXT: v_add_f16_e32 v1.h, v7.l, v4.l
|
||||
; GFX11-TRUE16-NEXT: v_add_f16_e32 v1.l, v1.l, v3.l
|
||||
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-FAKE16-LABEL: v_constained_fadd_v4f16_fpexcept_strict:
|
||||
|
||||
@ -171,18 +171,10 @@ define <4 x half> @v_constained_fma_v4f16_fpexcept_strict(<4 x half> %x, <4 x ha
|
||||
; GFX11-TRUE16-LABEL: v_constained_fma_v4f16_fpexcept_strict:
|
||||
; GFX11-TRUE16: ; %bb.0:
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v5
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v3
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 16, v4
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v9, 16, v2
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 16, v0
|
||||
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 16, v1
|
||||
; GFX11-TRUE16-NEXT: v_fmac_f16_e32 v5.l, v1.l, v3.l
|
||||
; GFX11-TRUE16-NEXT: v_fma_f16 v5.h, v1.h, v3.h, v5.h
|
||||
; GFX11-TRUE16-NEXT: v_fma_f16 v4.h, v0.h, v2.h, v4.h
|
||||
; GFX11-TRUE16-NEXT: v_fmac_f16_e32 v4.l, v0.l, v2.l
|
||||
; GFX11-TRUE16-NEXT: v_fmac_f16_e32 v8.l, v10.l, v9.l
|
||||
; GFX11-TRUE16-NEXT: v_fmac_f16_e32 v6.l, v11.l, v7.l
|
||||
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v8.l
|
||||
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v6.l
|
||||
; GFX11-TRUE16-NEXT: v_fmac_f16_e32 v5.l, v1.l, v3.l
|
||||
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5
|
||||
; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
|
||||
@ -367,14 +367,10 @@ define <4 x half> @v_constained_fmul_v4f16_fpexcept_strict(<4 x half> %x, <4 x h
|
||||
; GFX11-SDAG-TRUE16-LABEL: v_constained_fmul_v4f16_fpexcept_strict:
|
||||
; GFX11-SDAG-TRUE16: ; %bb.0:
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v3
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v2
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v0
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v1
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v1.l, v1.l, v3.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v1.h, v1.h, v3.h
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.h, v0.h, v2.h
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v2.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.h, v6.l, v5.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v1.h, v7.l, v4.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v1.l, v1.l, v3.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-SDAG-FAKE16-LABEL: v_constained_fmul_v4f16_fpexcept_strict:
|
||||
|
||||
@ -203,10 +203,8 @@ define <2 x half> @v_constained_fsub_v2f16_fpexcept_strict(<2 x half> %x, <2 x h
|
||||
; GFX11-SDAG-TRUE16-LABEL: v_constained_fsub_v2f16_fpexcept_strict:
|
||||
; GFX11-SDAG-TRUE16: ; %bb.0:
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v0
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_sub_f16_e32 v0.h, v0.h, v1.h
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_sub_f16_e32 v0.l, v0.l, v1.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_sub_f16_e32 v0.h, v3.l, v2.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-SDAG-FAKE16-LABEL: v_constained_fsub_v2f16_fpexcept_strict:
|
||||
@ -292,10 +290,8 @@ define <2 x half> @v_constained_fsub_v2f16_fpexcept_ignore(<2 x half> %x, <2 x h
|
||||
; GFX11-SDAG-TRUE16-LABEL: v_constained_fsub_v2f16_fpexcept_ignore:
|
||||
; GFX11-SDAG-TRUE16: ; %bb.0:
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v0
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_sub_f16_e32 v0.h, v0.h, v1.h
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_sub_f16_e32 v0.l, v0.l, v1.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_sub_f16_e32 v0.h, v3.l, v2.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-SDAG-FAKE16-LABEL: v_constained_fsub_v2f16_fpexcept_ignore:
|
||||
@ -381,10 +377,8 @@ define <2 x half> @v_constained_fsub_v2f16_fpexcept_maytrap(<2 x half> %x, <2 x
|
||||
; GFX11-SDAG-TRUE16-LABEL: v_constained_fsub_v2f16_fpexcept_maytrap:
|
||||
; GFX11-SDAG-TRUE16: ; %bb.0:
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v1
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v0
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_sub_f16_e32 v0.h, v0.h, v1.h
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_sub_f16_e32 v0.l, v0.l, v1.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_sub_f16_e32 v0.h, v3.l, v2.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-SDAG-FAKE16-LABEL: v_constained_fsub_v2f16_fpexcept_maytrap:
|
||||
@ -480,11 +474,9 @@ define <3 x half> @v_constained_fsub_v3f16_fpexcept_strict(<3 x half> %x, <3 x h
|
||||
; GFX11-SDAG-TRUE16-LABEL: v_constained_fsub_v3f16_fpexcept_strict:
|
||||
; GFX11-SDAG-TRUE16: ; %bb.0:
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v2
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v0
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_sub_f16_e32 v0.h, v0.h, v2.h
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_sub_f16_e32 v0.l, v0.l, v2.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_sub_f16_e32 v1.l, v1.l, v3.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_sub_f16_e32 v0.h, v5.l, v4.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-SDAG-FAKE16-LABEL: v_constained_fsub_v3f16_fpexcept_strict:
|
||||
@ -616,14 +608,10 @@ define <4 x half> @v_constained_fsub_v4f16_fpexcept_strict(<4 x half> %x, <4 x h
|
||||
; GFX11-SDAG-TRUE16-LABEL: v_constained_fsub_v4f16_fpexcept_strict:
|
||||
; GFX11-SDAG-TRUE16: ; %bb.0:
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v3
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v2
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v0
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v1
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_sub_f16_e32 v1.l, v1.l, v3.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_sub_f16_e32 v1.h, v1.h, v3.h
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_sub_f16_e32 v0.h, v0.h, v2.h
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_sub_f16_e32 v0.l, v0.l, v2.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_sub_f16_e32 v0.h, v6.l, v5.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_sub_f16_e32 v1.h, v7.l, v4.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_sub_f16_e32 v1.l, v1.l, v3.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-SDAG-FAKE16-LABEL: v_constained_fsub_v4f16_fpexcept_strict:
|
||||
|
||||
@ -128,12 +128,12 @@ define <2 x half> @test_ldexp_v2f16_v2i32(ptr addrspace(1) %out, <2 x half> %a,
|
||||
; GFX11-SDAG-TRUE16: ; %bb.0:
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_movk_i32 s0, 0x8000
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v2
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v0, v4, s0, 0x7fff
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v3, v3, s0, 0x7fff
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v1.l, v0.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v2.l, v3.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v0, v3, s0, 0x7fff
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v1, v4, s0, 0x7fff
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v2.l, v0.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v2.h, v1.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-SDAG-FAKE16-LABEL: test_ldexp_v2f16_v2i32:
|
||||
@ -239,15 +239,14 @@ define <3 x half> @test_ldexp_v3f16_v3i32(ptr addrspace(1) %out, <3 x half> %a,
|
||||
; GFX11-SDAG-TRUE16: ; %bb.0:
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_movk_i32 s0, 0x8000
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v2
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v0, v5, s0, 0x7fff
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v4, v4, s0, 0x7fff
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v5, v6, s0, 0x7fff
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v0, v4, s0, 0x7fff
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v1, v5, s0, 0x7fff
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v4, v6, s0, 0x7fff
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v2.l, v0.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v1.l, v0.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v2.l, v4.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v1.l, v3.l, v5.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v2.h, v1.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v1.l, v3.l, v4.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-SDAG-FAKE16-LABEL: test_ldexp_v3f16_v3i32:
|
||||
@ -370,18 +369,17 @@ define <4 x half> @test_ldexp_v4f16_v4i32(ptr addrspace(1) %out, <4 x half> %a,
|
||||
; GFX11-SDAG-TRUE16: ; %bb.0:
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_movk_i32 s0, 0x8000
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v3
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v0, v7, s0, 0x7fff
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v5, v5, s0, 0x7fff
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v2
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v0, v6, s0, 0x7fff
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v4, v4, s0, 0x7fff
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v6, v6, s0, 0x7fff
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v1.h, v1.l, v0.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v5, v5, s0, 0x7fff
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v6, v7, s0, 0x7fff
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v1.l, v3.l, v0.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v7.l, v5.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v2.l, v4.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v2.h, v5.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v1.l, v3.l, v6.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v1.h, v3.h, v6.l
|
||||
; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX11-SDAG-FAKE16-LABEL: test_ldexp_v4f16_v4i32:
|
||||
|
||||
@ -684,27 +684,50 @@ define amdgpu_kernel void @v_test_sub_v2i16_zext_to_v2i32(ptr addrspace(1) %out,
|
||||
; GFX10-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
|
||||
; GFX10-NEXT: s_endpgm
|
||||
;
|
||||
; GFX11-LABEL: v_test_sub_v2i16_zext_to_v2i32:
|
||||
; GFX11: ; %bb.0:
|
||||
; GFX11-NEXT: s_clause 0x1
|
||||
; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
|
||||
; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
|
||||
; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0
|
||||
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0
|
||||
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX11-NEXT: global_load_b32 v1, v0, s[2:3] glc dlc
|
||||
; GFX11-NEXT: s_waitcnt vmcnt(0)
|
||||
; GFX11-NEXT: global_load_b32 v0, v0, s[4:5] glc dlc
|
||||
; GFX11-NEXT: s_waitcnt vmcnt(0)
|
||||
; GFX11-NEXT: s_mov_b32 s3, 0x31016000
|
||||
; GFX11-NEXT: s_mov_b32 s2, -1
|
||||
; GFX11-NEXT: v_pk_sub_i16 v0, v1, v0
|
||||
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX11-NEXT: v_lshrrev_b32_e32 v1, 16, v0
|
||||
; GFX11-NEXT: v_and_b32_e32 v0, 0xffff, v0
|
||||
; GFX11-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0
|
||||
; GFX11-NEXT: s_endpgm
|
||||
; GFX11-TRUE16-LABEL: v_test_sub_v2i16_zext_to_v2i32:
|
||||
; GFX11-TRUE16: ; %bb.0:
|
||||
; GFX11-TRUE16-NEXT: s_clause 0x1
|
||||
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
|
||||
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 2, v0
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: global_load_b32 v1, v0, s[2:3] glc dlc
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: global_load_b32 v0, v0, s[4:5] glc dlc
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
|
||||
; GFX11-TRUE16-NEXT: s_mov_b32 s2, -1
|
||||
; GFX11-TRUE16-NEXT: v_pk_sub_i16 v2, v1, v0
|
||||
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, 0
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v2
|
||||
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v2.h
|
||||
; GFX11-TRUE16-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0
|
||||
; GFX11-TRUE16-NEXT: s_endpgm
|
||||
;
|
||||
; GFX11-FAKE16-LABEL: v_test_sub_v2i16_zext_to_v2i32:
|
||||
; GFX11-FAKE16: ; %bb.0:
|
||||
; GFX11-FAKE16-NEXT: s_clause 0x1
|
||||
; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
|
||||
; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
|
||||
; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
|
||||
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 2, v0
|
||||
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX11-FAKE16-NEXT: global_load_b32 v1, v0, s[2:3] glc dlc
|
||||
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
|
||||
; GFX11-FAKE16-NEXT: global_load_b32 v0, v0, s[4:5] glc dlc
|
||||
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
|
||||
; GFX11-FAKE16-NEXT: s_mov_b32 s3, 0x31016000
|
||||
; GFX11-FAKE16-NEXT: s_mov_b32 s2, -1
|
||||
; GFX11-FAKE16-NEXT: v_pk_sub_i16 v0, v1, v0
|
||||
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
|
||||
; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0
|
||||
; GFX11-FAKE16-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0
|
||||
; GFX11-FAKE16-NEXT: s_endpgm
|
||||
%tid = call i32 @llvm.amdgcn.workitem.id.x()
|
||||
%gep.out = getelementptr inbounds <2 x i32>, ptr addrspace(1) %out, i32 %tid
|
||||
%gep.in0 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in0, i32 %tid
|
||||
@ -1014,31 +1037,59 @@ define amdgpu_kernel void @v_test_sub_v2i16_sext_to_v2i64(ptr addrspace(1) %out,
|
||||
; GFX10-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
|
||||
; GFX10-NEXT: s_endpgm
|
||||
;
|
||||
; GFX11-LABEL: v_test_sub_v2i16_sext_to_v2i64:
|
||||
; GFX11: ; %bb.0:
|
||||
; GFX11-NEXT: s_clause 0x1
|
||||
; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
|
||||
; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
|
||||
; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v0
|
||||
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0
|
||||
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX11-NEXT: s_clause 0x1
|
||||
; GFX11-NEXT: global_load_b32 v1, v0, s[2:3]
|
||||
; GFX11-NEXT: global_load_b32 v0, v0, s[4:5]
|
||||
; GFX11-NEXT: s_mov_b32 s3, 0x31016000
|
||||
; GFX11-NEXT: s_mov_b32 s2, -1
|
||||
; GFX11-NEXT: s_waitcnt vmcnt(0)
|
||||
; GFX11-NEXT: v_pk_sub_i16 v0, v1, v0
|
||||
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
|
||||
; GFX11-NEXT: v_lshrrev_b32_e32 v1, 16, v0
|
||||
; GFX11-NEXT: v_bfe_i32 v0, v0, 0, 16
|
||||
; GFX11-NEXT: v_bfe_i32 v2, v1, 0, 16
|
||||
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
|
||||
; GFX11-NEXT: v_ashrrev_i32_e32 v1, 31, v0
|
||||
; GFX11-NEXT: v_ashrrev_i32_e32 v3, 31, v2
|
||||
; GFX11-NEXT: buffer_store_b128 v[0:3], off, s[0:3], 0
|
||||
; GFX11-NEXT: s_endpgm
|
||||
; GFX11-TRUE16-LABEL: v_test_sub_v2i16_sext_to_v2i64:
|
||||
; GFX11-TRUE16: ; %bb.0:
|
||||
; GFX11-TRUE16-NEXT: s_clause 0x1
|
||||
; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
|
||||
; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
|
||||
; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 2, v0
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: s_clause 0x1
|
||||
; GFX11-TRUE16-NEXT: global_load_b32 v1, v0, s[2:3]
|
||||
; GFX11-TRUE16-NEXT: global_load_b32 v0, v0, s[4:5]
|
||||
; GFX11-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
|
||||
; GFX11-TRUE16-NEXT: s_mov_b32 s2, -1
|
||||
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
|
||||
; GFX11-TRUE16-NEXT: v_pk_sub_i16 v0, v1, v0
|
||||
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.h, 0
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
|
||||
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v0.h
|
||||
; GFX11-TRUE16-NEXT: v_bfe_i32 v0, v0, 0, 16
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
|
||||
; GFX11-TRUE16-NEXT: v_bfe_i32 v2, v1, 0, 16
|
||||
; GFX11-TRUE16-NEXT: v_ashrrev_i32_e32 v1, 31, v0
|
||||
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
|
||||
; GFX11-TRUE16-NEXT: v_ashrrev_i32_e32 v3, 31, v2
|
||||
; GFX11-TRUE16-NEXT: buffer_store_b128 v[0:3], off, s[0:3], 0
|
||||
; GFX11-TRUE16-NEXT: s_endpgm
|
||||
;
|
||||
; GFX11-FAKE16-LABEL: v_test_sub_v2i16_sext_to_v2i64:
|
||||
; GFX11-FAKE16: ; %bb.0:
|
||||
; GFX11-FAKE16-NEXT: s_clause 0x1
|
||||
; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
|
||||
; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
|
||||
; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
|
||||
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 2, v0
|
||||
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX11-FAKE16-NEXT: s_clause 0x1
|
||||
; GFX11-FAKE16-NEXT: global_load_b32 v1, v0, s[2:3]
|
||||
; GFX11-FAKE16-NEXT: global_load_b32 v0, v0, s[4:5]
|
||||
; GFX11-FAKE16-NEXT: s_mov_b32 s3, 0x31016000
|
||||
; GFX11-FAKE16-NEXT: s_mov_b32 s2, -1
|
||||
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
|
||||
; GFX11-FAKE16-NEXT: v_pk_sub_i16 v0, v1, v0
|
||||
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
|
||||
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0
|
||||
; GFX11-FAKE16-NEXT: v_bfe_i32 v0, v0, 0, 16
|
||||
; GFX11-FAKE16-NEXT: v_bfe_i32 v2, v1, 0, 16
|
||||
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
|
||||
; GFX11-FAKE16-NEXT: v_ashrrev_i32_e32 v1, 31, v0
|
||||
; GFX11-FAKE16-NEXT: v_ashrrev_i32_e32 v3, 31, v2
|
||||
; GFX11-FAKE16-NEXT: buffer_store_b128 v[0:3], off, s[0:3], 0
|
||||
; GFX11-FAKE16-NEXT: s_endpgm
|
||||
%tid = call i32 @llvm.amdgcn.workitem.id.x()
|
||||
%gep.out = getelementptr inbounds <2 x i64>, ptr addrspace(1) %out, i32 %tid
|
||||
%gep.in0 = getelementptr inbounds <2 x i16>, ptr addrspace(1) %in0, i32 %tid
|
||||
|
||||
@ -1392,9 +1392,8 @@ define i16 @basic_smax_smin_vec_input(<2 x i16> %src) {
|
||||
; SDAG-GFX12-TRUE16-NEXT: v_pk_min_i16 v0, 0xff, v0 op_sel_hi:[0,1]
|
||||
; SDAG-GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
|
||||
; SDAG-GFX12-TRUE16-NEXT: v_pk_max_i16 v1, v0, 0
|
||||
; SDAG-GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v1
|
||||
; SDAG-GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
|
||||
; SDAG-GFX12-TRUE16-NEXT: v_lshlrev_b16 v0.l, 8, v0.l
|
||||
; SDAG-GFX12-TRUE16-NEXT: v_lshlrev_b16 v0.l, 8, v1.h
|
||||
; SDAG-GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; SDAG-GFX12-TRUE16-NEXT: v_or_b16 v0.l, v1.l, v0.l
|
||||
; SDAG-GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
@ -1542,9 +1541,8 @@ define i16 @basic_smax_smin_vec_input_rev(<2 x i16> %src) {
|
||||
; SDAG-GFX12-TRUE16-NEXT: v_pk_max_i16 v0, v0, 0
|
||||
; SDAG-GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
|
||||
; SDAG-GFX12-TRUE16-NEXT: v_pk_min_i16 v1, 0xff, v0 op_sel_hi:[0,1]
|
||||
; SDAG-GFX12-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v1
|
||||
; SDAG-GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
|
||||
; SDAG-GFX12-TRUE16-NEXT: v_lshlrev_b16 v0.l, 8, v0.l
|
||||
; SDAG-GFX12-TRUE16-NEXT: v_lshlrev_b16 v0.l, 8, v1.h
|
||||
; SDAG-GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; SDAG-GFX12-TRUE16-NEXT: v_or_b16 v0.l, v1.l, v0.l
|
||||
; SDAG-GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
|
||||
Loading…
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Reference in New Issue
Block a user