From 0769dde7a23bda0e748b395b761ab0b6d4069bc5 Mon Sep 17 00:00:00 2001
From: Stefan Mada <smada@nvidia.com>
Date: Tue, 17 Mar 2026 11:12:52 -0700
Subject: [PATCH] Removed Hardcoded SM Number from Mlir Test (#186917)

This MR removes a hard-coded compute number in an MLIR test. This will
allow the test to not need to be updated in the future. The default
value will come from `NVVMOps.td`.
---
 .../Integration/GPU/CUDA/module-to-binary-compiler-log.mlir     | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/mlir/test/Integration/GPU/CUDA/module-to-binary-compiler-log.mlir b/mlir/test/Integration/GPU/CUDA/module-to-binary-compiler-log.mlir
index a5c89b5704c8..0b2adcf224f0 100644
--- a/mlir/test/Integration/GPU/CUDA/module-to-binary-compiler-log.mlir
+++ b/mlir/test/Integration/GPU/CUDA/module-to-binary-compiler-log.mlir
@@ -4,7 +4,7 @@
 module attributes {gpu.container_module} {
   // CHECK-LABEL: gpu.binary @kernel_module
   // CHECK: properties = {{{.*}}ISACompilerLog = {{.*}}
-  gpu.module @kernel_module [#nvvm.target<chip = "sm_70", flags = {"collect-compiler-diagnostics"}>] {
+  gpu.module @kernel_module [#nvvm.target<flags = {"collect-compiler-diagnostics"}>] {
     llvm.func @kernel(%arg0: i32, %arg1: !llvm.ptr,
         %arg2: !llvm.ptr, %arg3: i64, %arg4: i64,
         %arg5: i64) attributes {gpu.kernel} {