Revert "[NVVMReflect] Force dead branch elimination in NVVMReflect (#81189)"
This reverts commit 9211e67da36782db44a46ccb9ac06734ccf2570f. Summary: This seemed to crash one one of the CUDA math tests. Revert until it can be fixed.
This commit is contained in:
Joseph Huber
parent
c429f48b56
commit
0800a36053
@ -296,11 +296,6 @@ pipeline, immediately after the link stage. The ``internalize`` pass is also
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recommended to remove unused math functions from the resulting PTX. For an
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input IR module ``module.bc``, the following compilation flow is recommended:
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The ``NVVMReflect`` pass will attempt to remove dead code even without
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optimizations. This allows potentially incompatible instructions to be avoided
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at all optimizations levels. This currently only works for simple conditionals
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like the above example.
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1. Save list of external functions in ``module.bc``
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2. Link ``module.bc`` with ``libdevice.compute_XX.YY.bc``
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3. Internalize all functions not in list from (1)
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@ -20,7 +20,6 @@
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#include "NVPTX.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/Analysis/ConstantFolding.h"
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#include "llvm/IR/Constants.h"
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#include "llvm/IR/DerivedTypes.h"
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#include "llvm/IR/Function.h"
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@ -37,8 +36,6 @@
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#include "llvm/Support/raw_os_ostream.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Transforms/Scalar.h"
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#include "llvm/Transforms/Utils/BasicBlockUtils.h"
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#include "llvm/Transforms/Utils/Local.h"
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#include <sstream>
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#include <string>
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#define NVVM_REFLECT_FUNCTION "__nvvm_reflect"
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@ -90,7 +87,6 @@ static bool runNVVMReflect(Function &F, unsigned SmVersion) {
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}
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SmallVector<Instruction *, 4> ToRemove;
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SmallVector<ICmpInst *, 4> ToSimplify;
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// Go through the calls in this function. Each call to __nvvm_reflect or
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// llvm.nvvm.reflect should be a CallInst with a ConstantArray argument.
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@ -175,13 +171,6 @@ static bool runNVVMReflect(Function &F, unsigned SmVersion) {
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} else if (ReflectArg == "__CUDA_ARCH") {
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ReflectVal = SmVersion * 10;
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}
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// If the immediate user is a simple comparison we want to simplify it.
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// TODO: This currently does not handle switch instructions.
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for (User *U : Call->users())
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if (ICmpInst *I = dyn_cast<ICmpInst>(U))
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ToSimplify.push_back(I);
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Call->replaceAllUsesWith(ConstantInt::get(Call->getType(), ReflectVal));
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ToRemove.push_back(Call);
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}
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@ -189,57 +178,6 @@ static bool runNVVMReflect(Function &F, unsigned SmVersion) {
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for (Instruction *I : ToRemove)
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I->eraseFromParent();
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// The code guarded by __nvvm_reflect may be invalid for the target machine.
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// We need to do some basic dead code elimination to trim invalid code before
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// it reaches the backend at all optimization levels.
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SmallVector<BranchInst *> Simplified;
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for (ICmpInst *Cmp : ToSimplify) {
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Constant *LHS = dyn_cast<Constant>(Cmp->getOperand(0));
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Constant *RHS = dyn_cast<Constant>(Cmp->getOperand(1));
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if (!LHS || !RHS)
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continue;
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// If the comparison is a compile time constant we simply propagate it.
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Constant *C = ConstantFoldCompareInstOperands(
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Cmp->getPredicate(), LHS, RHS, Cmp->getModule()->getDataLayout());
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if (!C)
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continue;
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for (User *U : Cmp->users())
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if (BranchInst *I = dyn_cast<BranchInst>(U))
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Simplified.push_back(I);
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Cmp->replaceAllUsesWith(C);
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Cmp->eraseFromParent();
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}
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// Each instruction here is a conditional branch off of a constant true or
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// false value. Simply replace it with an unconditional branch to the
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// appropriate basic block and delete the rest if it is trivially dead.
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DenseSet<Instruction *> Removed;
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for (BranchInst *Branch : Simplified) {
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if (Removed.contains(Branch))
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continue;
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ConstantInt *C = dyn_cast<ConstantInt>(Branch->getCondition());
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if (!C || (!C->isOne() && !C->isZero()))
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continue;
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BasicBlock *TrueBB =
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C->isOne() ? Branch->getSuccessor(0) : Branch->getSuccessor(1);
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BasicBlock *FalseBB =
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C->isOne() ? Branch->getSuccessor(1) : Branch->getSuccessor(0);
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ReplaceInstWithInst(Branch, BranchInst::Create(TrueBB));
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if (FalseBB->use_empty() && FalseBB->hasNPredecessors(0) &&
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FalseBB->getFirstNonPHIOrDbg()) {
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Removed.insert(FalseBB->getFirstNonPHIOrDbg());
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changeToUnreachable(FalseBB->getFirstNonPHIOrDbg());
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}
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}
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return ToRemove.size() > 0;
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}
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@ -1,141 +0,0 @@
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_52 -mattr=+ptx64 -O0 | FileCheck %s --check-prefix=SM_52
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_70 -mattr=+ptx64 -O0 | FileCheck %s --check-prefix=SM_70
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_90 -mattr=+ptx72 -O0 | FileCheck %s --check-prefix=SM_90
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@.str = private unnamed_addr constant [12 x i8] c"__CUDA_ARCH\00"
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declare i32 @__nvvm_reflect(ptr)
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; SM_52: .visible .func (.param .b32 func_retval0) foo()
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; SM_52: mov.b32 %[[REG:.+]], 3;
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; SM_52-NEXT: st.param.b32 [func_retval0+0], %[[REG:.+]];
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; SM_52-NEXT: ret;
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;
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; SM_70: .visible .func (.param .b32 func_retval0) foo()
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; SM_70: mov.b32 %[[REG:.+]], 2;
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; SM_70-NEXT: st.param.b32 [func_retval0+0], %[[REG:.+]];
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; SM_70-NEXT: ret;
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;
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; SM_90: .visible .func (.param .b32 func_retval0) foo()
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; SM_90: mov.b32 %[[REG:.+]], 1;
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; SM_90-NEXT: st.param.b32 [func_retval0+0], %[[REG:.+]];
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; SM_90-NEXT: ret;
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define i32 @foo() {
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entry:
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%call = call i32 @__nvvm_reflect(ptr @.str)
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%cmp = icmp uge i32 %call, 900
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br i1 %cmp, label %if.then, label %if.else
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if.then:
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br label %return
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if.else:
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%call1 = call i32 @__nvvm_reflect(ptr @.str)
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%cmp2 = icmp uge i32 %call1, 700
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br i1 %cmp2, label %if.then3, label %if.else4
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if.then3:
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br label %return
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if.else4:
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%call5 = call i32 @__nvvm_reflect(ptr @.str)
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%cmp6 = icmp uge i32 %call5, 520
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br i1 %cmp6, label %if.then7, label %if.else8
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if.then7:
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br label %return
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if.else8:
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br label %return
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return:
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%retval.0 = phi i32 [ 1, %if.then ], [ 2, %if.then3 ], [ 3, %if.then7 ], [ 4, %if.else8 ]
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ret i32 %retval.0
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}
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; SM_52: .visible .func (.param .b32 func_retval0) bar()
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; SM_52: mov.b32 %[[REG:.+]], 2;
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; SM_52-NEXT: st.param.b32 [func_retval0+0], %[[REG:.+]];
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; SM_52-NEXT: ret;
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;
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; SM_70: .visible .func (.param .b32 func_retval0) bar()
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; SM_70: mov.b32 %[[REG:.+]], 1;
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; SM_70-NEXT: st.param.b32 [func_retval0+0], %[[REG:.+]];
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; SM_70-NEXT: ret;
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;
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; SM_90: .visible .func (.param .b32 func_retval0) bar()
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; SM_90: mov.b32 %[[REG:.+]], 1;
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; SM_90-NEXT: st.param.b32 [func_retval0+0], %[[REG:.+]];
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; SM_90-NEXT: ret;
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define i32 @bar() {
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entry:
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%call = call i32 @__nvvm_reflect(ptr @.str)
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%cmp = icmp uge i32 %call, 700
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br i1 %cmp, label %if.then, label %if.else
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if.then:
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br label %if.end
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if.else:
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br label %if.end
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if.end:
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%x = phi i32 [ 1, %if.then ], [ 2, %if.else ]
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ret i32 %x
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}
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; SM_52-NOT: valid;
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; SM_70: valid;
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; SM_90: valid;
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define void @baz() {
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entry:
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%call = call i32 @__nvvm_reflect(ptr @.str)
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%cmp = icmp uge i32 %call, 700
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br i1 %cmp, label %if.then, label %if.end
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if.then:
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call void asm sideeffect "valid;\0A", ""()
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br label %if.end
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if.end:
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ret void
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}
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; SM_52: .visible .func (.param .b32 func_retval0) qux()
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; SM_52: mov.u32 %[[REG1:.+]], %[[REG2:.+]];
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; SM_52: st.param.b32 [func_retval0+0], %[[REG1:.+]];
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; SM_52: ret;
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; SM_70: .visible .func (.param .b32 func_retval0) qux()
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; SM_70: mov.u32 %[[REG1:.+]], %[[REG2:.+]];
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; SM_70: st.param.b32 [func_retval0+0], %[[REG1:.+]];
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; SM_70: ret;
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; SM_90: .visible .func (.param .b32 func_retval0) qux()
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; SM_90: st.param.b32 [func_retval0+0], %[[REG1:.+]];
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; SM_90: ret;
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define i32 @qux() {
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entry:
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%call = call i32 @__nvvm_reflect(ptr noundef @.str)
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%cmp = icmp uge i32 %call, 700
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%conv = zext i1 %cmp to i32
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switch i32 %conv, label %sw.default [
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i32 900, label %sw.bb
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i32 700, label %sw.bb1
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i32 520, label %sw.bb2
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]
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sw.bb:
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br label %return
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sw.bb1:
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br label %return
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sw.bb2:
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br label %return
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sw.default:
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br label %return
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return:
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%retval = phi i32 [ 4, %sw.default ], [ 3, %sw.bb2 ], [ 2, %sw.bb1 ], [ 1, %sw.bb ]
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ret i32 %retval
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}
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@ -18,3 +18,4 @@ define i32 @foo(float %a, float %b) {
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; SM35: ret i32 350
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ret i32 %reflect
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}
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