[Bitcode] Add abbreviations for additional instructions (#146825)

Add abbreviations for icmp/fcmp, store and br, which are the most common
instructions that don't have abbreviations yet. This requires increasing
the abbreviation size to 5 bits.

This gives about 3-5% bitcode size reductions for the clang build.
This commit is contained in:
Nikita Popov 2025-07-03 14:28:32 +02:00 committed by GitHub
parent 791bb606b5
commit 0a656d8e57
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2 changed files with 76 additions and 8 deletions

View File

@ -141,6 +141,7 @@ enum {
// FUNCTION_BLOCK abbrev id's.
FUNCTION_INST_LOAD_ABBREV = bitc::FIRST_APPLICATION_ABBREV,
FUNCTION_INST_STORE_ABBREV,
FUNCTION_INST_UNOP_ABBREV,
FUNCTION_INST_UNOP_FLAGS_ABBREV,
FUNCTION_INST_BINOP_ABBREV,
@ -149,8 +150,12 @@ enum {
FUNCTION_INST_CAST_FLAGS_ABBREV,
FUNCTION_INST_RET_VOID_ABBREV,
FUNCTION_INST_RET_VAL_ABBREV,
FUNCTION_INST_BR_UNCOND_ABBREV,
FUNCTION_INST_BR_COND_ABBREV,
FUNCTION_INST_UNREACHABLE_ABBREV,
FUNCTION_INST_GEP_ABBREV,
FUNCTION_INST_CMP_ABBREV,
FUNCTION_INST_CMP_FLAGS_ABBREV,
FUNCTION_DEBUG_RECORD_VALUE_ABBREV,
};
@ -3197,12 +3202,17 @@ void ModuleBitcodeWriter::writeInstruction(const Instruction &I,
case Instruction::FCmp: {
// compare returning Int1Ty or vector of Int1Ty
Code = bitc::FUNC_CODE_INST_CMP2;
pushValueAndType(I.getOperand(0), InstID, Vals);
AbbrevToUse = FUNCTION_INST_CMP_ABBREV;
if (pushValueAndType(I.getOperand(0), InstID, Vals))
AbbrevToUse = 0;
pushValue(I.getOperand(1), InstID, Vals);
Vals.push_back(cast<CmpInst>(I).getPredicate());
uint64_t Flags = getOptimizationFlags(&I);
if (Flags != 0)
if (Flags != 0) {
Vals.push_back(Flags);
if (AbbrevToUse)
AbbrevToUse = FUNCTION_INST_CMP_FLAGS_ABBREV;
}
break;
}
@ -3224,11 +3234,13 @@ void ModuleBitcodeWriter::writeInstruction(const Instruction &I,
case Instruction::Br:
{
Code = bitc::FUNC_CODE_INST_BR;
AbbrevToUse = FUNCTION_INST_BR_UNCOND_ABBREV;
const BranchInst &II = cast<BranchInst>(I);
Vals.push_back(VE.getValueID(II.getSuccessor(0)));
if (II.isConditional()) {
Vals.push_back(VE.getValueID(II.getSuccessor(1)));
pushValue(II.getCondition(), InstID, Vals);
AbbrevToUse = FUNCTION_INST_BR_COND_ABBREV;
}
}
break;
@ -3449,12 +3461,16 @@ void ModuleBitcodeWriter::writeInstruction(const Instruction &I,
}
break;
case Instruction::Store:
if (cast<StoreInst>(I).isAtomic())
if (cast<StoreInst>(I).isAtomic()) {
Code = bitc::FUNC_CODE_INST_STOREATOMIC;
else
} else {
Code = bitc::FUNC_CODE_INST_STORE;
pushValueAndType(I.getOperand(1), InstID, Vals); // ptrty + ptr
pushValueAndType(I.getOperand(0), InstID, Vals); // valty + val
AbbrevToUse = FUNCTION_INST_STORE_ABBREV;
}
if (pushValueAndType(I.getOperand(1), InstID, Vals)) // ptrty + ptr
AbbrevToUse = 0;
if (pushValueAndType(I.getOperand(0), InstID, Vals)) // valty + val
AbbrevToUse = 0;
Vals.push_back(getEncodedAlign(cast<StoreInst>(I).getAlign()));
Vals.push_back(cast<StoreInst>(I).isVolatile());
if (cast<StoreInst>(I).isAtomic()) {
@ -3677,7 +3693,7 @@ void ModuleBitcodeWriter::writeFunction(
// in the VST.
FunctionToBitcodeIndex[&F] = Stream.GetCurrentBitNo();
Stream.EnterSubblock(bitc::FUNCTION_BLOCK_ID, 4);
Stream.EnterSubblock(bitc::FUNCTION_BLOCK_ID, 5);
VE.incorporateFunction(F);
SmallVector<unsigned, 64> Vals;
@ -3952,6 +3968,17 @@ void ModuleBitcodeWriter::writeBlockInfo() {
FUNCTION_INST_LOAD_ABBREV)
llvm_unreachable("Unexpected abbrev ordering!");
}
{
auto Abbv = std::make_shared<BitCodeAbbrev>();
Abbv->Add(BitCodeAbbrevOp(bitc::FUNC_CODE_INST_STORE));
Abbv->Add(ValAbbrevOp); // op1
Abbv->Add(ValAbbrevOp); // op0
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::VBR, 4)); // align
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 1)); // volatile
if (Stream.EmitBlockInfoAbbrev(bitc::FUNCTION_BLOCK_ID, Abbv) !=
FUNCTION_INST_STORE_ABBREV)
llvm_unreachable("Unexpected abbrev ordering!");
}
{ // INST_UNOP abbrev for FUNCTION_BLOCK.
auto Abbv = std::make_shared<BitCodeAbbrev>();
Abbv->Add(BitCodeAbbrevOp(bitc::FUNC_CODE_INST_UNOP));
@ -4029,6 +4056,26 @@ void ModuleBitcodeWriter::writeBlockInfo() {
FUNCTION_INST_RET_VAL_ABBREV)
llvm_unreachable("Unexpected abbrev ordering!");
}
{
auto Abbv = std::make_shared<BitCodeAbbrev>();
Abbv->Add(BitCodeAbbrevOp(bitc::FUNC_CODE_INST_BR));
// TODO: Use different abbrev for absolute value reference (succ0)?
Abbv->Add(ValAbbrevOp); // succ0
if (Stream.EmitBlockInfoAbbrev(bitc::FUNCTION_BLOCK_ID, Abbv) !=
FUNCTION_INST_BR_UNCOND_ABBREV)
llvm_unreachable("Unexpected abbrev ordering!");
}
{
auto Abbv = std::make_shared<BitCodeAbbrev>();
Abbv->Add(BitCodeAbbrevOp(bitc::FUNC_CODE_INST_BR));
// TODO: Use different abbrev for absolute value references (succ0, succ1)?
Abbv->Add(ValAbbrevOp); // succ0
Abbv->Add(ValAbbrevOp); // succ1
Abbv->Add(ValAbbrevOp); // cond
if (Stream.EmitBlockInfoAbbrev(bitc::FUNCTION_BLOCK_ID, Abbv) !=
FUNCTION_INST_BR_COND_ABBREV)
llvm_unreachable("Unexpected abbrev ordering!");
}
{ // INST_UNREACHABLE abbrev for FUNCTION_BLOCK.
auto Abbv = std::make_shared<BitCodeAbbrev>();
Abbv->Add(BitCodeAbbrevOp(bitc::FUNC_CODE_INST_UNREACHABLE));
@ -4047,6 +4094,27 @@ void ModuleBitcodeWriter::writeBlockInfo() {
FUNCTION_INST_GEP_ABBREV)
llvm_unreachable("Unexpected abbrev ordering!");
}
{
auto Abbv = std::make_shared<BitCodeAbbrev>();
Abbv->Add(BitCodeAbbrevOp(bitc::FUNC_CODE_INST_CMP2));
Abbv->Add(ValAbbrevOp); // op0
Abbv->Add(ValAbbrevOp); // op1
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 6)); // pred
if (Stream.EmitBlockInfoAbbrev(bitc::FUNCTION_BLOCK_ID, Abbv) !=
FUNCTION_INST_CMP_ABBREV)
llvm_unreachable("Unexpected abbrev ordering!");
}
{
auto Abbv = std::make_shared<BitCodeAbbrev>();
Abbv->Add(BitCodeAbbrevOp(bitc::FUNC_CODE_INST_CMP2));
Abbv->Add(ValAbbrevOp); // op0
Abbv->Add(ValAbbrevOp); // op1
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 6)); // pred
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 8)); // flags
if (Stream.EmitBlockInfoAbbrev(bitc::FUNCTION_BLOCK_ID, Abbv) !=
FUNCTION_INST_CMP_FLAGS_ABBREV)
llvm_unreachable("Unexpected abbrev ordering!");
}
{
auto Abbv = std::make_shared<BitCodeAbbrev>();
Abbv->Add(BitCodeAbbrevOp(bitc::FUNC_CODE_DEBUG_RECORD_VALUE_SIMPLE));

View File

@ -48,7 +48,7 @@ define double @test_float_binops(i32 %a) nounwind {
; between literals and the formal parameters.
; CHECK: INST_GEP {{.*}}
; CHECK: INST_LOAD {{.*}}op0=1 {{.*}}
; CHECK: INST_CMP2 op0=1 {{.*}}
; CHECK: INST_CMP2 {{.*}}op0=1 {{.*}}
; CHECK: INST_RET {{.*}}op0=1
define i1 @test_load(i32 %a, {i32, i32}* %ptr) nounwind {
entry: