[SCFToGPU] Convert scf.parallel+scf.reduce to gpu.all_reduce (#122782)
Support reductions in SCFToGPU: `scf.parallel` and `scf.reduce` op combination is now converted to a `gpu.all_reduce` op.
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e069518f82
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0e944a3095
@ -408,8 +408,8 @@ static LogicalResult processParallelLoop(
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ArrayAttr mapping =
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parallelOp->getAttrOfType<ArrayAttr>(gpu::getMappingAttrName());
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// TODO: Support reductions.
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if (!mapping || parallelOp.getNumResults() != 0)
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// TODO: Support multiple reductions.
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if (!mapping || parallelOp.getNumResults() > 1)
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return failure();
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Location loc = parallelOp.getLoc();
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@ -556,6 +556,11 @@ static LogicalResult processParallelLoop(
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Block *body = parallelOp.getBody();
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worklist.reserve(worklist.size() + body->getOperations().size());
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// Include scf.reduce terminator if exists and has an operand.
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if (auto terminator = body->getTerminator();
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isa<scf::ReduceOp>(terminator) && terminator->getOperands().size() == 1) {
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worklist.push_back(terminator);
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}
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for (Operation &op : llvm::reverse(body->without_terminator()))
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worklist.push_back(&op);
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return success();
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@ -648,6 +653,33 @@ ParallelToGpuLaunchLowering::matchAndRewrite(ParallelOp parallelOp,
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rewriter.setInsertionPointAfter(parent);
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leftNestingScope = true;
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seenSideeffects = false;
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} else if (auto reduceOp = dyn_cast<scf::ReduceOp>(op)) {
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// Convert scf.reduction op
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auto parentLoop = op->getParentOfType<ParallelOp>();
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if (!parentLoop || op->getOperands().size() != 1)
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return failure();
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auto operand = op->getOperands().front();
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auto newValue = cloningMap.lookupOrNull(operand);
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if (!newValue || !operand.getType().isSignlessIntOrFloat())
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return failure();
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// Ensure reduction region is isolated from above.
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llvm::SetVector<Value> externalValues;
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getUsedValuesDefinedAbove(reduceOp.getRegion(0), externalValues);
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if (externalValues.size())
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return failure();
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// Replace by gpu.all_reduce.
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auto gpuRedOp = rewriter.create<gpu::AllReduceOp>(loc, newValue);
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cloningMap.map(parentLoop->getResult(0), gpuRedOp.getResult());
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// Copy region.
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rewriter.inlineRegionBefore(reduceOp.getRegion(0), gpuRedOp.getRegion(),
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gpuRedOp.getRegion().begin());
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// Replace src.reduce.return with gpu.yield.
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auto scfReturn = gpuRedOp.getRegion().front().getTerminator();
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auto ip = rewriter.saveInsertionPoint();
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rewriter.setInsertionPointToEnd(&gpuRedOp.getRegion().front());
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rewriter.replaceOpWithNewOp<gpu::YieldOp>(
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scfReturn, scfReturn->getOperands().front());
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rewriter.restoreInsertionPoint(ip);
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} else {
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// Otherwise we copy it over.
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Operation *clone = rewriter.clone(*op, cloningMap);
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@ -428,3 +428,216 @@ func.func @step_invariant() {
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// CHECK: %[[rhs:.*]] = memref.load %[[alloc_1]][%[[dim0]], %[[dim1]]] : memref<1x1xf64>
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// CHECK: %[[sum:.*]] = arith.addf %[[lhs]], %[[rhs]] : f64
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// CHECK: memref.store %[[sum]], %[[alloc_0]][%[[dim0]], %[[dim1]]] : memref<1x1xf64>
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// -----
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// 1-d parallel reduction mapped to block.x and thread.x.
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// CHECK-LABEL: @parallel_reduction_1d
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func.func @parallel_reduction_1d() {
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%alloc = memref.alloc() : memref<f32>
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%alloc_0 = memref.alloc() : memref<64xf32>
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%c1 = arith.constant 1 : index
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%c64 = arith.constant 64 : index
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%c0 = arith.constant 0 : index
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%cst = arith.constant 0.000000e+00 : f32
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scf.parallel (%arg1) = (%c0) to (%c1) step (%c1) {
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%0 = scf.parallel (%arg2) = (%c0) to (%c64) step (%c1) init (%cst) -> f32 {
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%1 = memref.load %alloc_0[%arg2] : memref<64xf32>
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scf.reduce(%1 : f32) {
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^bb0(%arg3: f32, %arg4: f32):
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%2 = arith.addf %arg3, %arg4 : f32
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scf.reduce.return %2 : f32
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}
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} {mapping = [#gpu.loop_dim_map<processor = thread_x, map = (d0) -> (d0), bound = (d0) -> (d0)>]}
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memref.store %0, %alloc[] : memref<f32>
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scf.reduce
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} {mapping = [#gpu.loop_dim_map<processor = block_x, map = (d0) -> (d0), bound = (d0) -> (d0)>]}
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memref.dealloc %alloc : memref<f32>
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memref.dealloc %alloc_0 : memref<64xf32>
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return
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}
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// CHECK: %[[alloc_0:.*]] = memref.alloc() : memref<f32>
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// CHECK: %[[alloc_1:.*]] = memref.alloc() : memref<64xf32>
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// CHECK: %[[map_0:.*]] = affine.apply #map({{.*}})[{{.*}}, {{.*}}]
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// CHECK: %[[map_1:.*]] = affine.apply #map({{.*}})[{{.*}}, {{.*}}]
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// CHECK: gpu.launch
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// CHECK-SAME: blocks(%[[arg_0:.*]], %{{[^)]*}}, %{{[^)]*}}) in (%{{[^)]*}} = %[[map_0]], %{{[^)]*}} = %{{[^)]*}}, %{{[^)]*}} = %{{[^)]*}})
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// CHECK-SAME: threads(%[[arg_3:.*]], %{{[^)]*}}, %{{[^)]*}}) in (%{{[^)]*}} = %[[map_1]], %{{[^)]*}} = %{{[^)]*}}, %{{[^)]*}} = %{{[^)]*}})
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// CHECK-NEXT: %[[dim0:.*]] = affine.apply #map1(%[[arg_0]])[{{.*}}, {{.*}}]
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// CHECK-NEXT: %[[dim1:.*]] = affine.apply #map1(%[[arg_3]])[{{.*}}, {{.*}}]
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// CHECK-NEXT: %[[src:.*]] = memref.load %[[alloc_1]][%[[dim1]]] : memref<64xf32>
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// CHECK-NEXT: %[[res:.*]] = gpu.all_reduce %[[src]] {
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// CHECK-NEXT: ^bb0(%[[arg12:.*]]: f32, %[[arg13:.*]]: f32):
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// CHECK-NEXT: %[[sum:.*]] = arith.addf %[[arg12]], %[[arg13]] : f32
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// CHECK-NEXT: gpu.yield %[[sum]] : f32
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// CHECK-NEXT: } : (f32) -> f32
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// CHECK-NEXT: memref.store %[[res]], %[[alloc_0]][] : memref<f32>
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// -----
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// 2-d parallel reduction mapped to block.x and thread.x and thread.y.
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// CHECK-LABEL: @parallel_reduction_2d
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func.func @parallel_reduction_2d() {
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%alloc = memref.alloc() : memref<f32>
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%alloc_0 = memref.alloc() : memref<8x8xf32>
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%c1 = arith.constant 1 : index
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%c8 = arith.constant 8 : index
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%c0 = arith.constant 0 : index
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%cst = arith.constant 0.000000e+00 : f32
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scf.parallel (%arg1) = (%c0) to (%c1) step (%c1) {
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%0 = scf.parallel (%arg2, %arg3) = (%c0, %c0) to (%c8, %c8) step (%c1, %c1) init (%cst) -> f32 {
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%1 = memref.load %alloc_0[%arg2, %arg3] : memref<8x8xf32>
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scf.reduce(%1 : f32) {
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^bb0(%arg4: f32, %arg5: f32):
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%2 = arith.addf %arg4, %arg5 : f32
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scf.reduce.return %2 : f32
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}
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} {mapping = [#gpu.loop_dim_map<processor = thread_x, map = (d0) -> (d0), bound = (d0) -> (d0)>, #gpu.loop_dim_map<processor = thread_y, map = (d0) -> (d0), bound = (d0) -> (d0)>]}
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memref.store %0, %alloc[] : memref<f32>
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scf.reduce
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} {mapping = [#gpu.loop_dim_map<processor = block_x, map = (d0) -> (d0), bound = (d0) -> (d0)>]}
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memref.dealloc %alloc : memref<f32>
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memref.dealloc %alloc_0 : memref<8x8xf32>
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return
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}
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// CHECK: %[[alloc_0:.*]] = memref.alloc() : memref<f32>
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// CHECK: %[[alloc_1:.*]] = memref.alloc() : memref<8x8xf32>
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// CHECK: %[[map_0:.*]] = affine.apply #map({{.*}})[{{.*}}, {{.*}}]
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// CHECK: %[[map_1:.*]] = affine.apply #map({{.*}})[{{.*}}, {{.*}}]
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// CHECK: %[[map_2:.*]] = affine.apply #map({{.*}})[{{.*}}, {{.*}}]
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// CHECK: gpu.launch
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// CHECK-SAME: blocks(%[[arg_0:.*]], %{{[^)]*}}, %{{[^)]*}}) in (%{{[^)]*}} = %[[map_0]], %{{[^)]*}} = %{{[^)]*}}, %{{[^)]*}} = %{{[^)]*}})
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// CHECK-SAME: threads(%[[arg_3:.*]], %[[arg_4:.*]], %{{[^)]*}}) in (%{{[^)]*}} = %[[map_1]], %{{[^)]*}} = %[[map_2]], %{{[^)]*}} = %{{[^)]*}})
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// CHECK-NEXT: %[[dim0:.*]] = affine.apply #map1(%[[arg_0]])[{{.*}}, {{.*}}]
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// CHECK-NEXT: %[[dim1:.*]] = affine.apply #map1(%[[arg_3]])[{{.*}}, {{.*}}]
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// CHECK-NEXT: %[[dim2:.*]] = affine.apply #map1(%[[arg_4]])[{{.*}}, {{.*}}]
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// CHECK-NEXT: %[[src:.*]] = memref.load %[[alloc_1]][%[[dim1]], %[[dim2]]] : memref<8x8xf32>
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// CHECK-NEXT: %[[res:.*]] = gpu.all_reduce %[[src]] {
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// CHECK-NEXT: ^bb0(%[[arg12:.*]]: f32, %[[arg13:.*]]: f32):
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// CHECK-NEXT: %[[sum:.*]] = arith.addf %[[arg12]], %[[arg13]] : f32
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// CHECK-NEXT: gpu.yield %[[sum]] : f32
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// CHECK-NEXT: } : (f32) -> f32
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// CHECK-NEXT: memref.store %[[res]], %[[alloc_0]][] : memref<f32>
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// -----
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// tiled 1-d parallel reduction mapped to block.x and thread.x.
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// CHECK-LABEL: @parallel_reduction_1d_tiled
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func.func @parallel_reduction_1d_tiled() {
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%c128 = arith.constant 128 : index
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%c1 = arith.constant 1 : index
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%c64 = arith.constant 64 : index
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%c0 = arith.constant 0 : index
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%cst = arith.constant 0.000000e+00 : f32
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%alloc_0 = memref.alloc() : memref<8192xf32>
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%alloc_1 = memref.alloc() : memref<64xf32>
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scf.parallel (%arg1) = (%c0) to (%c64) step (%c1) {
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%subview = memref.subview %alloc_1[%arg1] [1] [1] : memref<64xf32> to memref<f32, strided<[], offset: ?>>
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%0 = affine.apply affine_map<(d0) -> (d0 * 128)>(%arg1)
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%subview_1 = memref.subview %alloc_0[%0] [128] [1] : memref<8192xf32> to memref<128xf32, strided<[1], offset: ?>>
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%1 = scf.parallel (%arg2) = (%c0) to (%c128) step (%c1) init (%cst) -> f32 {
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%2 = memref.load %subview_1[%arg2] : memref<128xf32, strided<[1], offset: ?>>
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scf.reduce(%2 : f32) {
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^bb0(%arg3: f32, %arg4: f32):
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%3 = arith.addf %arg3, %arg4 : f32
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scf.reduce.return %3 : f32
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}
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} {mapping = [#gpu.loop_dim_map<processor = thread_x, map = (d0) -> (d0), bound = (d0) -> (d0)>]}
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memref.store %1, %subview[] : memref<f32, strided<[], offset: ?>>
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scf.reduce
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} {mapping = [#gpu.loop_dim_map<processor = block_x, map = (d0) -> (d0), bound = (d0) -> (d0)>]}
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memref.dealloc %alloc_0 : memref<8192xf32>
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memref.dealloc %alloc_1 : memref<64xf32>
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return
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}
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// CHECK: %[[alloc_0:.*]] = memref.alloc() : memref<8192xf32>
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// CHECK: %[[alloc_1:.*]] = memref.alloc() : memref<64xf32>
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// CHECK: %[[map_0:.*]] = affine.apply #map({{.*}})[{{.*}}, {{.*}}]
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// CHECK: %[[map_1:.*]] = affine.apply #map({{.*}})[{{.*}}, {{.*}}]
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// CHECK: gpu.launch
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// CHECK-SAME: blocks(%[[arg_0:.*]], %{{[^)]*}}, %{{[^)]*}}) in (%{{[^)]*}} = %[[map_0]], %{{[^)]*}} = %{{[^)]*}}, %{{[^)]*}} = %{{[^)]*}})
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// CHECK-SAME: threads(%[[arg_3:.*]], %{{[^)]*}}, %{{[^)]*}}) in (%{{[^)]*}} = %[[map_1]], %{{[^)]*}} = %{{[^)]*}}, %{{[^)]*}} = %{{[^)]*}})
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// CHECK-NEXT: %[[dim0:.*]] = affine.apply #map1(%[[arg_0]])[{{.*}}, {{.*}}]
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// CHECK-NEXT: %[[dst:.*]] = memref.subview %[[alloc_1]][%[[dim0]]] [1] [1] : memref<64xf32>
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// CHECK-NEXT: %[[dim1:.*]] = affine.apply #map2(%[[dim0]])
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// CHECK-NEXT: %[[tile:.*]] = memref.subview %[[alloc_0]][%[[dim1]]] [128] [1] : memref<8192xf32>
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// CHECK-NEXT: %[[dim2:.*]] = affine.apply #map1(%[[arg_3]])[{{.*}}, {{.*}}]
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// CHECK-NEXT: %[[src:.*]] = memref.load %[[tile]][%[[dim2]]] : memref<128xf32, strided<[1], offset: ?>>
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// CHECK-NEXT: %[[res:.*]] = gpu.all_reduce %[[src]] {
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// CHECK-NEXT: ^bb0(%[[arg12:.*]]: f32, %[[arg13:.*]]: f32):
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// CHECK-NEXT: %[[sum:.*]] = arith.addf %[[arg12]], %[[arg13]] : f32
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// CHECK-NEXT: gpu.yield %[[sum]] : f32
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// CHECK-NEXT: } : (f32) -> f32
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// CHECK-NEXT: memref.store %[[res]], %[[dst]][] : memref<f32, strided<[], offset: ?>>
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// -----
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// 1-d parallel reduction, unsigned int. Cannot be mapped.
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// CHECK-LABEL: @parallel_reduction_1d_uint
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func.func @parallel_reduction_1d_uint(%cst : ui32) {
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%alloc = memref.alloc() : memref<ui32>
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%alloc_0 = memref.alloc() : memref<64xui32>
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%c1 = arith.constant 1 : index
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%c64 = arith.constant 64 : index
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%c0 = arith.constant 0 : index
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scf.parallel (%arg1) = (%c0) to (%c1) step (%c1) {
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%0 = scf.parallel (%arg2) = (%c0) to (%c64) step (%c1) init (%cst) -> ui32 {
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%1 = memref.load %alloc_0[%arg2] : memref<64xui32>
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scf.reduce(%1 : ui32) {
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^bb0(%arg3: ui32, %arg4: ui32):
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scf.reduce.return %arg3 : ui32
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}
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} {mapping = [#gpu.loop_dim_map<processor = thread_x, map = (d0) -> (d0), bound = (d0) -> (d0)>]}
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memref.store %0, %alloc[] : memref<ui32>
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scf.reduce
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} {mapping = [#gpu.loop_dim_map<processor = block_x, map = (d0) -> (d0), bound = (d0) -> (d0)>]}
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memref.dealloc %alloc : memref<ui32>
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memref.dealloc %alloc_0 : memref<64xui32>
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return
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}
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// CHECK: scf.parallel
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// CHECK-NEXT: scf.parallel
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// CHECK: scf.reduce
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// -----
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// 1-d parallel reduction, not isolated from above. Cannot be mapped.
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// CHECK-LABEL: @parallel_reduction_1d_outside
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func.func @parallel_reduction_1d_outside() {
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%alloc = memref.alloc() : memref<f32>
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%alloc_0 = memref.alloc() : memref<64xf32>
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%c1 = arith.constant 1 : index
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%c64 = arith.constant 64 : index
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%c0 = arith.constant 0 : index
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%cst = arith.constant 0.000000e+00 : f32
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%const = arith.constant 1.000000e+00 : f32
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scf.parallel (%arg1) = (%c0) to (%c1) step (%c1) {
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%0 = scf.parallel (%arg2) = (%c0) to (%c64) step (%c1) init (%cst) -> f32 {
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%1 = memref.load %alloc_0[%arg2] : memref<64xf32>
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scf.reduce(%1 : f32) {
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^bb0(%arg3: f32, %arg4: f32):
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%2 = arith.addf %arg3, %arg4 : f32
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%3 = arith.addf %2, %const : f32
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scf.reduce.return %3 : f32
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}
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} {mapping = [#gpu.loop_dim_map<processor = thread_x, map = (d0) -> (d0), bound = (d0) -> (d0)>]}
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memref.store %0, %alloc[] : memref<f32>
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scf.reduce
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} {mapping = [#gpu.loop_dim_map<processor = block_x, map = (d0) -> (d0), bound = (d0) -> (d0)>]}
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memref.dealloc %alloc : memref<f32>
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memref.dealloc %alloc_0 : memref<64xf32>
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return
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}
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// CHECK: scf.parallel
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// CHECK-NEXT: scf.parallel
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// CHECK: scf.reduce
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