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Revert "[ELF][LLDB] Add an nvsass triple (#159459)" (#159879)

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Summary:
This patch has broken the `libc` build bot. I could work around that but
the changes seem unnecessary.

This reverts commit 9ba844eb3a21d461c3adc7add7691a076c6992fc.
This commit is contained in:
Joseph Huber 2025-09-19 20:13:48 -05:00 committed by GitHub
parent 5b017e3884
commit 0fa3061c4e
No known key found for this signature in database
GPG Key ID: B5690EEEBB952194
9 changed files with 10 additions and 37 deletions
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6
lldb/include/lldb/Utility/ArchSpec.h
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@ -236,8 +236,6 @@ public:
eCore_wasm32,
eCore_nvsass,
kNumCores,
kCore_invalid,
@ -284,10 +282,8 @@ public:
kCore_mips64el_last = eCore_mips64r6el,
kCore_mips_first = eCore_mips32,
kCore_mips_last = eCore_mips64r6el,
kCore_mips_last = eCore_mips64r6el
kCore_nvsass_first = eCore_nvsass,
kCore_nvsass_last = eCore_nvsass,
};
/// Default constructor.

4
lldb/source/Utility/ArchSpec.cpp
View File

@ -248,9 +248,6 @@ static constexpr const CoreDefinition g_core_definitions[] = {
{eByteOrderLittle, 4, 1, 4, llvm::Triple::wasm32, ArchSpec::eCore_wasm32,
"wasm32"},
{eByteOrderLittle, 8, 4, 4, llvm::Triple::nvsass, ArchSpec::eCore_nvsass,
"nvsass"},
};
// Ensure that we have an entry in the g_core_definitions for each core. If you
@ -415,7 +412,6 @@ static const ArchDefinitionEntry g_elf_arch_entries[] = {
{ArchSpec::eCore_riscv64, llvm::ELF::EM_RISCV, ArchSpec::eRISCVSubType_riscv64}, // riscv64
{ArchSpec::eCore_loongarch32, llvm::ELF::EM_LOONGARCH, ArchSpec::eLoongArchSubType_loongarch32}, // loongarch32
{ArchSpec::eCore_loongarch64, llvm::ELF::EM_LOONGARCH, ArchSpec::eLoongArchSubType_loongarch64}, // loongarch64
{ArchSpec::eCore_nvsass, llvm::ELF::EM_CUDA, }, // nvsass
};
// clang-format on

6
llvm/include/llvm/Object/ELFObjectFile.h
View File

@ -69,7 +69,7 @@ class LLVM_ABI ELFObjectFileBase : public ObjectFile {
SubtargetFeatures getLoongArchFeatures() const;
StringRef getAMDGPUCPUName() const;
StringRef getCUDACPUName() const;
StringRef getNVPTXCPUName() const;
protected:
ELFObjectFileBase(unsigned int Type, MemoryBufferRef Source);
@ -1431,7 +1431,9 @@ template <class ELFT> Triple::ArchType ELFObjectFile<ELFT>::getArch() const {
}
case ELF::EM_CUDA: {
return Triple::nvsass;
if (EF.getHeader().e_ident[ELF::EI_CLASS] == ELF::ELFCLASS32)
return Triple::nvptx;
return Triple::nvptx64;
}
case ELF::EM_BPF:

7
llvm/include/llvm/TargetParser/Triple.h
View File

@ -110,7 +110,6 @@ public:
renderscript32, // 32-bit RenderScript
renderscript64, // 64-bit RenderScript
ve, // NEC SX-Aurora Vector Engine
nvsass, // NVIDIA SASS
LastArchType = ve
};
enum SubArchType {
@ -906,8 +905,6 @@ public:
bool isAMDGPU() const { return getArch() == Triple::r600 || isAMDGCN(); }
bool isNVSASS() const { return getArch() == Triple::nvsass; }
/// Tests whether the target is Thumb (little and big endian).
bool isThumb() const {
return getArch() == Triple::thumb || getArch() == Triple::thumbeb;
@ -1276,9 +1273,7 @@ public:
LLVM_ABI bool isCompatibleWith(const Triple &Other) const;
/// Test whether the target triple is for a GPU.
bool isGPU() const {
return isSPIRV() || isNVPTX() || isAMDGPU() || isNVSASS();
}
bool isGPU() const { return isSPIRV() || isNVPTX() || isAMDGPU(); }
/// Merge target triples.
LLVM_ABI std::string merge(const Triple &Other) const;

4
llvm/lib/Object/ELFObjectFile.cpp
View File

@ -438,7 +438,7 @@ std::optional<StringRef> ELFObjectFileBase::tryGetCPUName() const {
case ELF::EM_AMDGPU:
return getAMDGPUCPUName();
case ELF::EM_CUDA:
return getCUDACPUName();
return getNVPTXCPUName();
case ELF::EM_PPC:
case ELF::EM_PPC64:
return StringRef("future");
@ -620,7 +620,7 @@ StringRef ELFObjectFileBase::getAMDGPUCPUName() const {
}
}
StringRef ELFObjectFileBase::getCUDACPUName() const {
StringRef ELFObjectFileBase::getNVPTXCPUName() const {
assert(getEMachine() == ELF::EM_CUDA);
unsigned SM = getEIdentABIVersion() == ELF::ELFABIVERSION_CUDA_V1
? getPlatformFlags() & ELF::EF_CUDA_SM

2
llvm/lib/Object/ObjectFile.cpp
View File

@ -139,7 +139,7 @@ Triple ObjectFile::makeTriple() const {
TheTriple.setObjectFormat(Triple::GOFF);
} else if (TheTriple.isAMDGPU()) {
TheTriple.setVendor(Triple::AMD);
} else if (TheTriple.isNVPTX() || TheTriple.isNVSASS()) {
} else if (TheTriple.isNVPTX()) {
TheTriple.setVendor(Triple::NVIDIA);
}

1
llvm/lib/TargetParser/TargetDataLayout.cpp
View File

@ -618,7 +618,6 @@ std::string Triple::computeDataLayout(StringRef ABIName) const {
case Triple::shave:
case Triple::renderscript32:
case Triple::renderscript64:
case Triple::nvsass:
// These are all virtual ISAs with no LLVM backend, and therefore no fixed
// LLVM data layout.
return "";

15
llvm/lib/TargetParser/Triple.cpp
View File

@ -54,8 +54,6 @@ StringRef Triple::getArchTypeName(ArchType Kind) {
case msp430: return "msp430";
case nvptx64: return "nvptx64";
case nvptx: return "nvptx";
case nvsass:
return "nvsass";
case ppc64: return "powerpc64";
case ppc64le: return "powerpc64le";
case ppc: return "powerpc";
@ -244,9 +242,6 @@ StringRef Triple::getArchTypePrefix(ArchType Kind) {
case wasm32:
case wasm64: return "wasm";
case nvsass:
return "nvsass";
case riscv32:
case riscv64:
case riscv32be:
@ -491,7 +486,6 @@ Triple::ArchType Triple::getArchTypeForLLVMName(StringRef Name) {
.Case("xcore", xcore)
.Case("nvptx", nvptx)
.Case("nvptx64", nvptx64)
.Case("nvsass", nvsass)
.Case("amdil", amdil)
.Case("amdil64", amdil64)
.Case("hsail", hsail)
@ -633,7 +627,6 @@ static Triple::ArchType parseArch(StringRef ArchName) {
.Case("xcore", Triple::xcore)
.Case("nvptx", Triple::nvptx)
.Case("nvptx64", Triple::nvptx64)
.Case("nvsass", Triple::nvsass)
.Case("amdil", Triple::amdil)
.Case("amdil64", Triple::amdil64)
.Case("hsail", Triple::hsail)
@ -992,7 +985,6 @@ static Triple::ObjectFormatType getDefaultFormat(const Triple &T) {
case Triple::msp430:
case Triple::nvptx64:
case Triple::nvptx:
case Triple::nvsass:
case Triple::ppc64le:
case Triple::ppcle:
case Triple::r600:
@ -1753,9 +1745,6 @@ unsigned Triple::getArchPointerBitWidth(llvm::Triple::ArchType Arch) {
case llvm::Triple::mips64:
case llvm::Triple::mips64el:
case llvm::Triple::nvptx64:
// nvsass can represent both 32- and 64-bit pointers, but assume
// 64-bit for the triple
case llvm::Triple::nvsass:
case llvm::Triple::ppc64:
case llvm::Triple::ppc64le:
case llvm::Triple::renderscript64:
@ -1834,7 +1823,6 @@ Triple Triple::get32BitArchVariant() const {
case Triple::mips:
case Triple::mipsel:
case Triple::nvptx:
case Triple::nvsass:
case Triple::ppc:
case Triple::ppcle:
case Triple::r600:
@ -1922,7 +1910,6 @@ Triple Triple::get64BitArchVariant() const {
case Triple::mips64:
case Triple::mips64el:
case Triple::nvptx64:
case Triple::nvsass:
case Triple::ppc64:
case Triple::ppc64le:
case Triple::renderscript64:
@ -1993,7 +1980,6 @@ Triple Triple::getBigEndianArchVariant() const {
case Triple::msp430:
case Triple::nvptx64:
case Triple::nvptx:
case Triple::nvsass:
case Triple::r600:
case Triple::renderscript32:
case Triple::renderscript64:
@ -2109,7 +2095,6 @@ bool Triple::isLittleEndian() const {
case Triple::msp430:
case Triple::nvptx64:
case Triple::nvptx:
case Triple::nvsass:
case Triple::ppcle:
case Triple::ppc64le:
case Triple::r600:

2
llvm/unittests/Object/ELFObjectFileTest.cpp
View File

@ -295,7 +295,7 @@ TEST(ELFObjectFileTest, CheckOSAndTriple) {
{ELF::EM_X86_64, ELF::ELFOSABI_AIX, "x86_64--aix"},
{ELF::EM_X86_64, ELF::ELFOSABI_FREEBSD, "x86_64--freebsd"},
{ELF::EM_X86_64, ELF::ELFOSABI_OPENBSD, "x86_64--openbsd"},
{ELF::EM_CUDA, ELF::ELFOSABI_CUDA, "nvsass-nvidia-cuda"}};
{ELF::EM_CUDA, ELF::ELFOSABI_CUDA, "nvptx64-nvidia-cuda"}};
for (auto [Machine, OS, Triple] : Formats) {
const DataForTest D(ELF::ELFCLASS64, ELF::ELFDATA2LSB, Machine, OS,
ELF::EF_AMDGPU_MACH_AMDGCN_LAST);