[CIR] Upstream isfpclass op (#166037)
Ref commit in incubator: ee17ff67f3e567585db991cdad1159520c516bb4 There is a minor change in the assumption for emitting a direct callee. In incubator, `bool hasAttributeNoBuiltin = false` (`llvm-project/clang/lib/CIR/CodeGen/CIRGenExpr.cpp:1671`), while in upstream, it's true, therefore, the call to finite(...) is not converted to a builtin anymore. Fixes #163892
This commit is contained in:
Jasmine Tang
GitHub
parent
2aa2290af5
commit
1278d47e9f
@ -4112,6 +4112,72 @@ def CIR_RotateOp : CIR_Op<"rotate", [Pure, SameOperandsAndResultType]> {
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let hasFolder = 1;
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}
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//===----------------------------------------------------------------------===//
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// FPClass Test Flags
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//===----------------------------------------------------------------------===//
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def FPClassTestEnum : CIR_I32EnumAttr<"FPClassTest", "floating-point class test flags", [
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// Basic flags
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I32EnumAttrCase<"SignalingNaN", 1, "fcSNan">,
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I32EnumAttrCase<"QuietNaN", 2, "fcQNan">,
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I32EnumAttrCase<"NegativeInfinity", 4, "fcNegInf">,
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I32EnumAttrCase<"NegativeNormal", 8, "fcNegNormal">,
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I32EnumAttrCase<"NegativeSubnormal", 16, "fcNegSubnormal">,
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I32EnumAttrCase<"NegativeZero", 32, "fcNegZero">,
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I32EnumAttrCase<"PositiveZero", 64, "fcPosZero">,
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I32EnumAttrCase<"PositiveSubnormal", 128, "fcPosSubnormal">,
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I32EnumAttrCase<"PositiveNormal", 256, "fcPosNormal">,
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I32EnumAttrCase<"PositiveInfinity", 512, "fcPosInf">,
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// Composite flags
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I32EnumAttrCase<"Nan", 3, "fcNan">, // fcSNan | fcQNan
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I32EnumAttrCase<"Infinity", 516, "fcInf">, // fcPosInf | fcNegInf
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I32EnumAttrCase<"Normal", 264, "fcNormal">, // fcPosNormal | fcNegNormal
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I32EnumAttrCase<"Subnormal", 144, "fcSubnormal">, // fcPosSubnormal | fcNegSubnormal
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I32EnumAttrCase<"Zero", 96, "fcZero">, // fcPosZero | fcNegZero
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I32EnumAttrCase<"PositiveFinite", 448, "fcPosFinite">,// fcPosNormal | fcPosSubnormal | fcPosZero
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I32EnumAttrCase<"NegativeFinite", 56, "fcNegFinite">, // fcNegNormal | fcNegSubnormal | fcNegZero
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I32EnumAttrCase<"Finite", 504, "fcFinite">, // fcPosFinite | fcNegFinite
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I32EnumAttrCase<"Positive", 960, "fcPositive">, // fcPosFinite | fcPosInf
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I32EnumAttrCase<"Negative", 60, "fcNegative">, // fcNegFinite | fcNegInf
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I32EnumAttrCase<"All", 1023, "fcAllFlags">, // fcNan | fcInf | fcFinite
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]> {
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let cppNamespace = "::cir";
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}
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def CIR_IsFPClassOp : CIR_Op<"is_fp_class"> {
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let summary = "Corresponding to the `__builtin_fpclassify` builtin function in clang";
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let description = [{
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The `cir.is_fp_class` operation takes a floating-point value as its first
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argument and a bitfield of flags as its second argument. The operation
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returns a boolean value indicating whether the floating-point value
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satisfies the given flags.
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The flags must be a compile time constant and the values are:
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| Bit # | floating-point class |
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| ----- | -------------------- |
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| 0 | Signaling NaN |
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| 1 | Quiet NaN |
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| 2 | Negative infinity |
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| 3 | Negative normal |
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| 4 | Negative subnormal |
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| 5 | Negative zero |
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| 6 | Positive zero |
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| 7 | Positive subnormal |
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| 8 | Positive normal |
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| 9 | Positive infinity |
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}];
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let arguments = (ins CIR_AnyFloatType:$src,
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FPClassTestEnum:$flags);
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let results = (outs CIR_BoolType:$result);
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let assemblyFormat = [{
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$src `,` $flags `:` functional-type($src, $result) attr-dict
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}];
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}
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//===----------------------------------------------------------------------===//
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// Assume Operations
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//===----------------------------------------------------------------------===//
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@ -266,6 +266,7 @@ struct MissingFeatures {
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static bool emitTypeCheck() { return false; }
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static bool emitTypeMetadataCodeForVCall() { return false; }
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static bool fastMathFlags() { return false; }
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static bool fpConstraints() { return false; }
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static bool generateDebugInfo() { return false; }
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static bool globalViewIndices() { return false; }
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@ -344,6 +344,11 @@ public:
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llvm_unreachable("negation for the given type is NYI");
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}
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cir::IsFPClassOp createIsFPClass(mlir::Location loc, mlir::Value src,
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cir::FPClassTest flags) {
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return cir::IsFPClassOp::create(*this, loc, src, flags);
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}
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// TODO: split this to createFPExt/createFPTrunc when we have dedicated cast
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// operations.
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mlir::Value createFloatingCast(mlir::Value v, mlir::Type destType) {
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@ -520,6 +520,98 @@ RValue CIRGenFunction::emitBuiltinExpr(const GlobalDecl &gd, unsigned builtinID,
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cir::PrefetchOp::create(builder, loc, address, locality, isWrite);
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return RValue::get(nullptr);
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}
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// From https://clang.llvm.org/docs/LanguageExtensions.html#builtin-isfpclass
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// :
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//
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// The `__builtin_isfpclass()` builtin is a generalization of functions
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// isnan, isinf, isfinite and some others defined by the C standard. It tests
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// if the floating-point value, specified by the first argument, falls into
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// any of data classes, specified by the second argument.
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case Builtin::BI__builtin_isnan: {
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assert(!cir::MissingFeatures::cgFPOptionsRAII());
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mlir::Value v = emitScalarExpr(e->getArg(0));
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assert(!cir::MissingFeatures::fpConstraints());
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mlir::Location loc = getLoc(e->getBeginLoc());
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return RValue::get(builder.createBoolToInt(
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builder.createIsFPClass(loc, v, cir::FPClassTest::Nan),
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convertType(e->getType())));
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}
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case Builtin::BI__builtin_issignaling: {
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assert(!cir::MissingFeatures::cgFPOptionsRAII());
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mlir::Value v = emitScalarExpr(e->getArg(0));
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mlir::Location loc = getLoc(e->getBeginLoc());
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return RValue::get(builder.createBoolToInt(
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builder.createIsFPClass(loc, v, cir::FPClassTest::SignalingNaN),
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convertType(e->getType())));
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}
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case Builtin::BI__builtin_isinf: {
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assert(!cir::MissingFeatures::cgFPOptionsRAII());
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mlir::Value v = emitScalarExpr(e->getArg(0));
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assert(!cir::MissingFeatures::fpConstraints());
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mlir::Location loc = getLoc(e->getBeginLoc());
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return RValue::get(builder.createBoolToInt(
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builder.createIsFPClass(loc, v, cir::FPClassTest::Infinity),
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convertType(e->getType())));
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}
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case Builtin::BIfinite:
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case Builtin::BI__finite:
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case Builtin::BIfinitef:
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case Builtin::BI__finitef:
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case Builtin::BIfinitel:
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case Builtin::BI__finitel:
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case Builtin::BI__builtin_isfinite: {
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assert(!cir::MissingFeatures::cgFPOptionsRAII());
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mlir::Value v = emitScalarExpr(e->getArg(0));
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assert(!cir::MissingFeatures::fpConstraints());
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mlir::Location loc = getLoc(e->getBeginLoc());
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return RValue::get(builder.createBoolToInt(
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builder.createIsFPClass(loc, v, cir::FPClassTest::Finite),
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convertType(e->getType())));
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}
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case Builtin::BI__builtin_isnormal: {
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assert(!cir::MissingFeatures::cgFPOptionsRAII());
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mlir::Value v = emitScalarExpr(e->getArg(0));
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mlir::Location loc = getLoc(e->getBeginLoc());
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return RValue::get(builder.createBoolToInt(
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builder.createIsFPClass(loc, v, cir::FPClassTest::Normal),
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convertType(e->getType())));
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}
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case Builtin::BI__builtin_issubnormal: {
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assert(!cir::MissingFeatures::cgFPOptionsRAII());
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mlir::Value v = emitScalarExpr(e->getArg(0));
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mlir::Location loc = getLoc(e->getBeginLoc());
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return RValue::get(builder.createBoolToInt(
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builder.createIsFPClass(loc, v, cir::FPClassTest::Subnormal),
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convertType(e->getType())));
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}
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case Builtin::BI__builtin_iszero: {
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assert(!cir::MissingFeatures::cgFPOptionsRAII());
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mlir::Value v = emitScalarExpr(e->getArg(0));
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mlir::Location loc = getLoc(e->getBeginLoc());
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return RValue::get(builder.createBoolToInt(
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builder.createIsFPClass(loc, v, cir::FPClassTest::Zero),
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convertType(e->getType())));
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}
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case Builtin::BI__builtin_isfpclass: {
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Expr::EvalResult result;
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if (!e->getArg(1)->EvaluateAsInt(result, cgm.getASTContext()))
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break;
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assert(!cir::MissingFeatures::cgFPOptionsRAII());
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mlir::Value v = emitScalarExpr(e->getArg(0));
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uint64_t test = result.Val.getInt().getLimitedValue();
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mlir::Location loc = getLoc(e->getBeginLoc());
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//
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return RValue::get(builder.createBoolToInt(
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builder.createIsFPClass(loc, v, cir::FPClassTest(test)),
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convertType(e->getType())));
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}
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}
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// If this is an alias for a lib function (e.g. __builtin_sin), emit
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@ -676,6 +676,18 @@ mlir::LogicalResult CIRToLLVMASinOpLowering::matchAndRewrite(
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return mlir::success();
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}
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mlir::LogicalResult CIRToLLVMIsFPClassOpLowering::matchAndRewrite(
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cir::IsFPClassOp op, OpAdaptor adaptor,
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mlir::ConversionPatternRewriter &rewriter) const {
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mlir::Value src = adaptor.getSrc();
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cir::FPClassTest flags = adaptor.getFlags();
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mlir::IntegerType retTy = rewriter.getI1Type();
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rewriter.replaceOpWithNewOp<mlir::LLVM::IsFPClass>(
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op, retTy, src, static_cast<uint32_t>(flags));
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return mlir::success();
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}
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mlir::LogicalResult CIRToLLVMAssumeOpLowering::matchAndRewrite(
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cir::AssumeOp op, OpAdaptor adaptor,
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mlir::ConversionPatternRewriter &rewriter) const {
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174
clang/test/CIR/CodeGen/builtin-isfpclass.c
Normal file
174
clang/test/CIR/CodeGen/builtin-isfpclass.c
Normal file
@ -0,0 +1,174 @@
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// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fclangir -emit-cir %s -o %t.cir
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// RUN: FileCheck --input-file=%t.cir %s -check-prefix=CIR
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// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fclangir -emit-llvm %s -o %t.cir
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// RUN: FileCheck --input-file=%t.cir %s -check-prefix=LLVM
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// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -emit-llvm %s -o %t.cir
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// RUN: FileCheck --input-file=%t.cir %s -check-prefix=OGCG
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int finite(double);
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// CHECK: cir.func {{.*}}@test_is_finite
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void test_is_finite(__fp16 *H, float F, double D, long double LD) {
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volatile int res;
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res = __builtin_isinf(*H);
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// CIR: cir.is_fp_class %{{.*}}, fcInf : (!cir.f16) -> !cir.bool
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// LLVM: call i1 @llvm.is.fpclass.f16(half {{.*}}, i32 516)
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// OGCG: call i1 @llvm.is.fpclass.f16(half {{.*}}, i32 516)
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res = __builtin_isinf(F);
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// CIR: cir.is_fp_class %{{.*}}, fcInf : (!cir.float) -> !cir.bool
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// LLVM: call i1 @llvm.is.fpclass.f32(float {{.*}}, i32 516)
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// OGCG: call i1 @llvm.is.fpclass.f32(float {{.*}}, i32 516)
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res = __builtin_isinf(D);
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// CIR: cir.is_fp_class %{{.*}}, fcInf : (!cir.double) -> !cir.bool
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// LLVM: call i1 @llvm.is.fpclass.f64(double {{.*}}, i32 516)
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// OGCG: call i1 @llvm.is.fpclass.f64(double {{.*}}, i32 516)
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res = __builtin_isinf(LD);
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// CIR: cir.is_fp_class %{{.*}}, fcInf : (!cir.long_double<!cir.f80>) -> !cir.bool
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// LLVM: call i1 @llvm.is.fpclass.f80(x86_fp80 {{.*}}, i32 516)
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// OGCG: call i1 @llvm.is.fpclass.f80(x86_fp80 {{.*}}, i32 516)
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res = __builtin_isfinite(*H);
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// CIR: cir.is_fp_class %{{.*}}, fcFinite : (!cir.f16) -> !cir.bool
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// LLVM: call i1 @llvm.is.fpclass.f16(half {{.*}}, i32 504)
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// OGCG: call i1 @llvm.is.fpclass.f16(half {{.*}}, i32 504)
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res = __builtin_isfinite(F);
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// CIR: cir.is_fp_class %{{.*}}, fcFinite : (!cir.float) -> !cir.bool
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// LLVM: call i1 @llvm.is.fpclass.f32(float {{.*}}, i32 504)
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// OGCG: call i1 @llvm.is.fpclass.f32(float {{.*}}, i32 504)
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res = finite(D);
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// CIR: cir.call @finite(%{{.*}}) nothrow side_effect(const) : (!cir.double) -> !s32i
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// LLVM: call i32 @finite(double {{.*}})
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// OGCG: call i1 @llvm.is.fpclass.f64(double %20, i32 504)
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res = __builtin_isnormal(*H);
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// CIR: cir.is_fp_class %{{.*}}, fcNormal : (!cir.f16) -> !cir.bool
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// LLVM: call i1 @llvm.is.fpclass.f16(half {{.*}}, i32 264)
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// OGCG: call i1 @llvm.is.fpclass.f16(half {{.*}}, i32 264)
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res = __builtin_isnormal(F);
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// CIR: cir.is_fp_class %{{.*}}, fcNormal : (!cir.float) -> !cir.bool
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// LLVM: call i1 @llvm.is.fpclass.f32(float {{.*}}, i32 264)
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// OGCG: call i1 @llvm.is.fpclass.f32(float {{.*}}, i32 264)
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res = __builtin_issubnormal(F);
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// CIR: cir.is_fp_class %{{.*}}, fcSubnormal : (!cir.float) -> !cir.bool
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// LLVM: call i1 @llvm.is.fpclass.f32(float {{.*}}, i32 144)
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// OGCG: call i1 @llvm.is.fpclass.f32(float {{.*}}, i32 144)
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res = __builtin_iszero(F);
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// CIR: cir.is_fp_class %{{.*}}, fcZero : (!cir.float) -> !cir.bool
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// LLVM: call i1 @llvm.is.fpclass.f32(float {{.*}}, i32 96)
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// OGCG: call i1 @llvm.is.fpclass.f32(float {{.*}}, i32 96)
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res = __builtin_issignaling(F);
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// CIR: cir.is_fp_class %{{.*}}, fcSNan : (!cir.float) -> !cir.bool
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// LLVM: call i1 @llvm.is.fpclass.f32(float {{.*}}, i32 1)
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// OGCG: call i1 @llvm.is.fpclass.f32(float {{.*}}, i32 1)
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}
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_Bool check_isfpclass_finite(float x) {
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return __builtin_isfpclass(x, 504 /*Finite*/);
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}
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// CIR: cir.func {{.*}}@check_isfpclass_finite
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// CIR: cir.is_fp_class %{{.*}}, fcFinite : (!cir.float)
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// LLVM: @check_isfpclass_finite
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// LLVM: call i1 @llvm.is.fpclass.f32(float {{.*}}, i32 504)
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// OGCG: @check_isfpclass_finite
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// OGCG: call i1 @llvm.is.fpclass.f32(float {{.*}}, i32 504)
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_Bool check_isfpclass_nan_f32(float x) {
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return __builtin_isfpclass(x, 3 /*NaN*/);
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}
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// CIR: cir.func {{.*}}@check_isfpclass_nan_f32
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// CIR: cir.is_fp_class %{{.*}}, fcNan : (!cir.float)
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// LLVM: @check_isfpclass_nan_f32
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// LLVM: call i1 @llvm.is.fpclass.f32(float {{.*}}, i32 3)
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// OGCG: @check_isfpclass_nan_f32
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// OGCG: call i1 @llvm.is.fpclass.f32(float {{.*}}, i32 3)
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_Bool check_isfpclass_snan_f64(double x) {
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return __builtin_isfpclass(x, 1 /*SNaN*/);
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}
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// CIR: cir.func {{.*}}@check_isfpclass_snan_f64
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// CIR: cir.is_fp_class %{{.*}}, fcSNan : (!cir.double)
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// LLVM: @check_isfpclass_snan_f64
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// LLVM: call i1 @llvm.is.fpclass.f64(double {{.*}}, i32 1)
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// OGCG: @check_isfpclass_snan_f64
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// OGCG: call i1 @llvm.is.fpclass.f64(double {{.*}}, i32 1)
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_Bool check_isfpclass_zero_f16(_Float16 x) {
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return __builtin_isfpclass(x, 96 /*Zero*/);
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}
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// CIR: cir.func {{.*}}@check_isfpclass_zero_f16
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// CIR: cir.is_fp_class %{{.*}}, fcZero : (!cir.f16)
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// LLVM: @check_isfpclass_zero_f16
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// LLVM: call i1 @llvm.is.fpclass.f16(half {{.*}}, i32 96)
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// OGCG: @check_isfpclass_zero_f16
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// OGCG: call i1 @llvm.is.fpclass.f16(half {{.*}}, i32 96)
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// Update when we support FP pragma in functions and can convert BoolType in prvalue to i1.
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// _Bool check_isfpclass_finite_strict(float x) {
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// #pragma STDC FENV_ACCESS ON
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// return __builtin_isfpclass(x, 504 /*Finite*/);
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// }
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//
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// _Bool check_isfpclass_nan_f32_strict(float x) {
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// #pragma STDC FENV_ACCESS ON
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// return __builtin_isfpclass(x, 3 /*NaN*/);
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// }
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//
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// _Bool check_isfpclass_snan_f64_strict(double x) {
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// #pragma STDC FENV_ACCESS ON
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// return __builtin_isfpclass(x, 1 /*NaN*/);
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// }
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//
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// _Bool check_isfpclass_zero_f16_strict(_Float16 x) {
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// #pragma STDC FENV_ACCESS ON
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// return __builtin_isfpclass(x, 96 /*Zero*/);
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// }
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//
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// _Bool check_isnan(float x) {
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// #pragma STDC FENV_ACCESS ON
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// return __builtin_isnan(x);
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// }
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//
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// _Bool check_isinf(float x) {
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// #pragma STDC FENV_ACCESS ON
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// return __builtin_isinf(x);
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// }
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//
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// _Bool check_isfinite(float x) {
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// #pragma STDC FENV_ACCESS ON
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||||
// return __builtin_isfinite(x);
|
||||
// }
|
||||
//
|
||||
// _Bool check_isnormal(float x) {
|
||||
// #pragma STDC FENV_ACCESS ON
|
||||
// return __builtin_isnormal(x);
|
||||
// }
|
||||
//
|
||||
// typedef float __attribute__((ext_vector_type(4))) float4;
|
||||
// typedef double __attribute__((ext_vector_type(4))) double4;
|
||||
// typedef int __attribute__((ext_vector_type(4))) int4;
|
||||
// typedef long __attribute__((ext_vector_type(4))) long4;
|
||||
//
|
||||
// int4 check_isfpclass_nan_v4f32(float4 x) {
|
||||
// return __builtin_isfpclass(x, 3 /*NaN*/);
|
||||
// }
|
||||
//
|
||||
// int4 check_isfpclass_nan_strict_v4f32(float4 x) {
|
||||
// #pragma STDC FENV_ACCESS ON
|
||||
// return __builtin_isfpclass(x, 3 /*NaN*/);
|
||||
// }
|
||||
//
|
||||
// long4 check_isfpclass_nan_v4f64(double4 x) {
|
||||
// return __builtin_isfpclass(x, 3 /*NaN*/);
|
||||
// }
|
||||
Loading…
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Reference in New Issue
Block a user