[AMDGPU] Extending wave reduction intrinsics for i64 types - 3
Supporting Arithemtic Operations: `and`, `or`, `xor`
This commit is contained in:
Aaditya
parent
e5007647e5
commit
12c1daf0ce
@ -5257,9 +5257,12 @@ static uint32_t getIdentityValueFor32BitWaveReduction(unsigned Opc) {
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case AMDGPU::S_ADD_I32:
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case AMDGPU::S_SUB_I32:
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case AMDGPU::S_OR_B32:
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case AMDGPU::S_OR_B64:
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case AMDGPU::S_XOR_B32:
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case AMDGPU::S_XOR_B64:
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return std::numeric_limits<uint32_t>::min();
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case AMDGPU::S_AND_B32:
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case AMDGPU::S_AND_B64:
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return std::numeric_limits<uint32_t>::max();
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default:
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llvm_unreachable(
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@ -5307,7 +5310,9 @@ static MachineBasicBlock *lowerWaveReduce(MachineInstr &MI,
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case AMDGPU::S_MAX_U32:
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case AMDGPU::S_MAX_I32:
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case AMDGPU::S_AND_B32:
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case AMDGPU::S_OR_B32: {
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case AMDGPU::S_AND_B64:
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case AMDGPU::S_OR_B32:
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case AMDGPU::S_OR_B64: {
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// Idempotent operations.
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BuildMI(BB, MI, DL, TII->get(AMDGPU::S_MOV_B32), DstReg).addReg(SrcReg);
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RetBB = &BB;
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@ -5323,6 +5328,7 @@ static MachineBasicBlock *lowerWaveReduce(MachineInstr &MI,
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break;
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}
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case AMDGPU::S_XOR_B32:
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case AMDGPU::S_XOR_B64:
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case AMDGPU::S_ADD_I32:
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case AMDGPU::S_ADD_U64_PSEUDO:
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case AMDGPU::S_SUB_I32:
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@ -5346,7 +5352,8 @@ static MachineBasicBlock *lowerWaveReduce(MachineInstr &MI,
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.addReg(ExecMask);
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switch (Opc) {
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case AMDGPU::S_XOR_B32: {
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case AMDGPU::S_XOR_B32:
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case AMDGPU::S_XOR_B64: {
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// Performing an XOR operation on a uniform value
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// depends on the parity of the number of active lanes.
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// For even parity, the result will be 0, for odd
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@ -5358,10 +5365,54 @@ static MachineBasicBlock *lowerWaveReduce(MachineInstr &MI,
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.addReg(NewAccumulator->getOperand(0).getReg())
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.addImm(1)
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.setOperandDead(3); // Dead scc
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if (is32BitOpc) {
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BuildMI(BB, MI, DL, TII->get(AMDGPU::S_MUL_I32), DstReg)
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.addReg(SrcReg)
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.addReg(ParityRegister);
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break;
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} else {
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Register DestSub0 =
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MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);
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Register DestSub1 =
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MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);
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Register Op1H_Op0L_Reg =
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MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);
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Register CarryReg =
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MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);
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const TargetRegisterClass *SrcRC = MRI.getRegClass(SrcReg);
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const TargetRegisterClass *SrcSubRC =
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TRI->getSubRegisterClass(SrcRC, AMDGPU::sub0);
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MachineOperand Op1L = TII->buildExtractSubRegOrImm(
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MI, MRI, MI.getOperand(1), SrcRC, AMDGPU::sub0, SrcSubRC);
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MachineOperand Op1H = TII->buildExtractSubRegOrImm(
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MI, MRI, MI.getOperand(1), SrcRC, AMDGPU::sub1, SrcSubRC);
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BuildMI(BB, MI, DL, TII->get(AMDGPU::S_MUL_I32), DestSub0)
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.add(Op1L)
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.addReg(ParityRegister);
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BuildMI(BB, MI, DL, TII->get(AMDGPU::S_MUL_I32), Op1H_Op0L_Reg)
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.add(Op1H)
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.addReg(ParityRegister);
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BuildMI(BB, MI, DL, TII->get(AMDGPU::S_MUL_HI_U32), CarryReg)
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.add(Op1L)
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.addReg(ParityRegister);
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BuildMI(BB, MI, DL, TII->get(AMDGPU::S_ADD_U32), DestSub1)
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.addReg(CarryReg)
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.addReg(Op1H_Op0L_Reg)
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.setOperandDead(3); // Dead scc
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BuildMI(BB, MI, DL, TII->get(TargetOpcode::REG_SEQUENCE), DstReg)
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.addReg(DestSub0)
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.addImm(AMDGPU::sub0)
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.addReg(DestSub1)
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.addImm(AMDGPU::sub1);
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break;
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}
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}
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case AMDGPU::S_SUB_I32: {
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Register NegatedVal = MRI.createVirtualRegister(DstRegClass);
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@ -5564,6 +5615,15 @@ static MachineBasicBlock *lowerWaveReduce(MachineInstr &MI,
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.addReg(LaneValueHiReg)
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.addImm(AMDGPU::sub1);
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switch (Opc) {
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case ::AMDGPU::S_OR_B64:
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case ::AMDGPU::S_AND_B64:
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case ::AMDGPU::S_XOR_B64: {
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NewAccumulator = BuildMI(*ComputeLoop, I, DL, TII->get(Opc), DstReg)
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.addReg(Accumulator->getOperand(0).getReg())
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.addReg(LaneValue->getOperand(0).getReg())
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.setOperandDead(3); // Dead scc
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break;
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}
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case AMDGPU::V_CMP_GT_I64_e64:
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case AMDGPU::V_CMP_GT_U64_e64:
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case AMDGPU::V_CMP_LT_I64_e64:
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@ -5672,10 +5732,16 @@ SITargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
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return lowerWaveReduce(MI, *BB, *getSubtarget(), AMDGPU::S_SUB_U64_PSEUDO);
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case AMDGPU::WAVE_REDUCE_AND_PSEUDO_B32:
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return lowerWaveReduce(MI, *BB, *getSubtarget(), AMDGPU::S_AND_B32);
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case AMDGPU::WAVE_REDUCE_AND_PSEUDO_B64:
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return lowerWaveReduce(MI, *BB, *getSubtarget(), AMDGPU::S_AND_B64);
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case AMDGPU::WAVE_REDUCE_OR_PSEUDO_B32:
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return lowerWaveReduce(MI, *BB, *getSubtarget(), AMDGPU::S_OR_B32);
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case AMDGPU::WAVE_REDUCE_OR_PSEUDO_B64:
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return lowerWaveReduce(MI, *BB, *getSubtarget(), AMDGPU::S_OR_B64);
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case AMDGPU::WAVE_REDUCE_XOR_PSEUDO_B32:
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return lowerWaveReduce(MI, *BB, *getSubtarget(), AMDGPU::S_XOR_B32);
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case AMDGPU::WAVE_REDUCE_XOR_PSEUDO_B64:
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return lowerWaveReduce(MI, *BB, *getSubtarget(), AMDGPU::S_XOR_B64);
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case AMDGPU::S_UADDO_PSEUDO:
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case AMDGPU::S_USUBO_PSEUDO: {
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const DebugLoc &DL = MI.getDebugLoc();
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@ -347,6 +347,9 @@ defvar Operations = [
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WaveReduceOp<"max", "I64", i64, SGPR_64, VSrc_b64>,
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WaveReduceOp<"add", "U64", i64, SGPR_64, VSrc_b64>,
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WaveReduceOp<"sub", "U64", i64, SGPR_64, VSrc_b64>,
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WaveReduceOp<"and", "B64", i64, SGPR_64, VSrc_b64>,
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WaveReduceOp<"or", "B64", i64, SGPR_64, VSrc_b64>,
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WaveReduceOp<"xor", "B64", i64, SGPR_64, VSrc_b64>,
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];
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foreach Op = Operations in {
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@ -980,3 +980,857 @@ endif:
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store i32 %combine, ptr addrspace(1) %out
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ret void
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}
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define amdgpu_kernel void @uniform_value_i64(ptr addrspace(1) %out, i64 %in) {
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; GFX8DAGISEL-LABEL: uniform_value_i64:
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; GFX8DAGISEL: ; %bb.0: ; %entry
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; GFX8DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
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; GFX8DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
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; GFX8DAGISEL-NEXT: v_mov_b32_e32 v2, s2
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; GFX8DAGISEL-NEXT: v_mov_b32_e32 v0, s0
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; GFX8DAGISEL-NEXT: v_mov_b32_e32 v1, s1
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; GFX8DAGISEL-NEXT: v_mov_b32_e32 v3, s3
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; GFX8DAGISEL-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
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; GFX8DAGISEL-NEXT: s_endpgm
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;
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; GFX8GISEL-LABEL: uniform_value_i64:
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; GFX8GISEL: ; %bb.0: ; %entry
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; GFX8GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
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; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0)
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; GFX8GISEL-NEXT: v_mov_b32_e32 v0, s2
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; GFX8GISEL-NEXT: v_mov_b32_e32 v3, s1
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; GFX8GISEL-NEXT: v_mov_b32_e32 v1, s3
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; GFX8GISEL-NEXT: v_mov_b32_e32 v2, s0
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; GFX8GISEL-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
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; GFX8GISEL-NEXT: s_endpgm
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;
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; GFX9DAGISEL-LABEL: uniform_value_i64:
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; GFX9DAGISEL: ; %bb.0: ; %entry
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; GFX9DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
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; GFX9DAGISEL-NEXT: v_mov_b32_e32 v2, 0
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; GFX9DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
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; GFX9DAGISEL-NEXT: v_mov_b32_e32 v0, s2
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; GFX9DAGISEL-NEXT: v_mov_b32_e32 v1, s3
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; GFX9DAGISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
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; GFX9DAGISEL-NEXT: s_endpgm
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;
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; GFX9GISEL-LABEL: uniform_value_i64:
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; GFX9GISEL: ; %bb.0: ; %entry
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; GFX9GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
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; GFX9GISEL-NEXT: v_mov_b32_e32 v2, 0
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; GFX9GISEL-NEXT: s_waitcnt lgkmcnt(0)
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; GFX9GISEL-NEXT: v_mov_b32_e32 v0, s2
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; GFX9GISEL-NEXT: v_mov_b32_e32 v1, s3
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; GFX9GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
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; GFX9GISEL-NEXT: s_endpgm
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;
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; GFX10DAGISEL-LABEL: uniform_value_i64:
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; GFX10DAGISEL: ; %bb.0: ; %entry
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; GFX10DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
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; GFX10DAGISEL-NEXT: v_mov_b32_e32 v2, 0
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; GFX10DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
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; GFX10DAGISEL-NEXT: v_mov_b32_e32 v0, s2
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; GFX10DAGISEL-NEXT: v_mov_b32_e32 v1, s3
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; GFX10DAGISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
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; GFX10DAGISEL-NEXT: s_endpgm
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;
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; GFX10GISEL-LABEL: uniform_value_i64:
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; GFX10GISEL: ; %bb.0: ; %entry
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; GFX10GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
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; GFX10GISEL-NEXT: v_mov_b32_e32 v2, 0
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; GFX10GISEL-NEXT: s_waitcnt lgkmcnt(0)
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; GFX10GISEL-NEXT: v_mov_b32_e32 v0, s2
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; GFX10GISEL-NEXT: v_mov_b32_e32 v1, s3
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; GFX10GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
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; GFX10GISEL-NEXT: s_endpgm
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;
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; GFX1164DAGISEL-LABEL: uniform_value_i64:
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; GFX1164DAGISEL: ; %bb.0: ; %entry
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; GFX1164DAGISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
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; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v2, 0
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; GFX1164DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
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; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v0, s2
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; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v1, s3
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; GFX1164DAGISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
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; GFX1164DAGISEL-NEXT: s_endpgm
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;
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; GFX1164GISEL-LABEL: uniform_value_i64:
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; GFX1164GISEL: ; %bb.0: ; %entry
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; GFX1164GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
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; GFX1164GISEL-NEXT: v_mov_b32_e32 v2, 0
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; GFX1164GISEL-NEXT: s_waitcnt lgkmcnt(0)
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; GFX1164GISEL-NEXT: v_mov_b32_e32 v0, s2
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; GFX1164GISEL-NEXT: v_mov_b32_e32 v1, s3
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; GFX1164GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
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; GFX1164GISEL-NEXT: s_endpgm
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;
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; GFX1132DAGISEL-LABEL: uniform_value_i64:
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; GFX1132DAGISEL: ; %bb.0: ; %entry
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; GFX1132DAGISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
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; GFX1132DAGISEL-NEXT: v_mov_b32_e32 v2, 0
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; GFX1132DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
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; GFX1132DAGISEL-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
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; GFX1132DAGISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
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; GFX1132DAGISEL-NEXT: s_endpgm
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;
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; GFX1132GISEL-LABEL: uniform_value_i64:
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; GFX1132GISEL: ; %bb.0: ; %entry
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; GFX1132GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
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; GFX1132GISEL-NEXT: v_mov_b32_e32 v2, 0
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; GFX1132GISEL-NEXT: s_waitcnt lgkmcnt(0)
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; GFX1132GISEL-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
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; GFX1132GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
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; GFX1132GISEL-NEXT: s_endpgm
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entry:
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%result = call i64 @llvm.amdgcn.wave.reduce.and.i64(i64 %in, i32 1)
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store i64 %result, ptr addrspace(1) %out
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ret void
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}
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define amdgpu_kernel void @const_value_i64(ptr addrspace(1) %out) {
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; GFX8DAGISEL-LABEL: const_value_i64:
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; GFX8DAGISEL: ; %bb.0: ; %entry
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; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
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; GFX8DAGISEL-NEXT: v_mov_b32_e32 v0, 0x7b
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; GFX8DAGISEL-NEXT: v_mov_b32_e32 v1, 0
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; GFX8DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
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; GFX8DAGISEL-NEXT: v_mov_b32_e32 v3, s1
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; GFX8DAGISEL-NEXT: v_mov_b32_e32 v2, s0
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; GFX8DAGISEL-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
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; GFX8DAGISEL-NEXT: s_endpgm
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;
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; GFX8GISEL-LABEL: const_value_i64:
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; GFX8GISEL: ; %bb.0: ; %entry
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; GFX8GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
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; GFX8GISEL-NEXT: v_mov_b32_e32 v0, 0x7b
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; GFX8GISEL-NEXT: v_mov_b32_e32 v1, 0
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; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0)
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; GFX8GISEL-NEXT: v_mov_b32_e32 v3, s1
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; GFX8GISEL-NEXT: v_mov_b32_e32 v2, s0
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; GFX8GISEL-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
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; GFX8GISEL-NEXT: s_endpgm
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;
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; GFX9DAGISEL-LABEL: const_value_i64:
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; GFX9DAGISEL: ; %bb.0: ; %entry
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; GFX9DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
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; GFX9DAGISEL-NEXT: v_mov_b32_e32 v0, 0x7b
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; GFX9DAGISEL-NEXT: v_mov_b32_e32 v1, 0
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; GFX9DAGISEL-NEXT: v_mov_b32_e32 v2, 0
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; GFX9DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
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; GFX9DAGISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
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; GFX9DAGISEL-NEXT: s_endpgm
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;
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; GFX9GISEL-LABEL: const_value_i64:
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; GFX9GISEL: ; %bb.0: ; %entry
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; GFX9GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
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; GFX9GISEL-NEXT: v_mov_b32_e32 v0, 0x7b
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; GFX9GISEL-NEXT: v_mov_b32_e32 v1, 0
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; GFX9GISEL-NEXT: v_mov_b32_e32 v2, 0
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; GFX9GISEL-NEXT: s_waitcnt lgkmcnt(0)
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; GFX9GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
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; GFX9GISEL-NEXT: s_endpgm
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;
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; GFX10DAGISEL-LABEL: const_value_i64:
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; GFX10DAGISEL: ; %bb.0: ; %entry
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; GFX10DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
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; GFX10DAGISEL-NEXT: v_mov_b32_e32 v0, 0x7b
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; GFX10DAGISEL-NEXT: v_mov_b32_e32 v1, 0
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; GFX10DAGISEL-NEXT: v_mov_b32_e32 v2, 0
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; GFX10DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
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; GFX10DAGISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
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; GFX10DAGISEL-NEXT: s_endpgm
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;
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; GFX10GISEL-LABEL: const_value_i64:
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; GFX10GISEL: ; %bb.0: ; %entry
|
||||
; GFX10GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
|
||||
; GFX10GISEL-NEXT: v_mov_b32_e32 v0, 0x7b
|
||||
; GFX10GISEL-NEXT: v_mov_b32_e32 v1, 0
|
||||
; GFX10GISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX10GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX10GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
|
||||
; GFX10GISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX1164DAGISEL-LABEL: const_value_i64:
|
||||
; GFX1164DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX1164DAGISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
|
||||
; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v0, 0x7b
|
||||
; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v1, 0
|
||||
; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX1164DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1164DAGISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
|
||||
; GFX1164DAGISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX1164GISEL-LABEL: const_value_i64:
|
||||
; GFX1164GISEL: ; %bb.0: ; %entry
|
||||
; GFX1164GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
|
||||
; GFX1164GISEL-NEXT: v_mov_b32_e32 v0, 0x7b
|
||||
; GFX1164GISEL-NEXT: v_mov_b32_e32 v1, 0
|
||||
; GFX1164GISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX1164GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1164GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
|
||||
; GFX1164GISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX1132DAGISEL-LABEL: const_value_i64:
|
||||
; GFX1132DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX1132DAGISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
|
||||
; GFX1132DAGISEL-NEXT: v_mov_b32_e32 v0, 0x7b
|
||||
; GFX1132DAGISEL-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, 0
|
||||
; GFX1132DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1132DAGISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
|
||||
; GFX1132DAGISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX1132GISEL-LABEL: const_value_i64:
|
||||
; GFX1132GISEL: ; %bb.0: ; %entry
|
||||
; GFX1132GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
|
||||
; GFX1132GISEL-NEXT: v_mov_b32_e32 v0, 0x7b
|
||||
; GFX1132GISEL-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, 0
|
||||
; GFX1132GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1132GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
|
||||
; GFX1132GISEL-NEXT: s_endpgm
|
||||
entry:
|
||||
%result = call i64 @llvm.amdgcn.wave.reduce.and.i64(i64 123, i32 1)
|
||||
store i64 %result, ptr addrspace(1) %out
|
||||
ret void
|
||||
}
|
||||
|
||||
define amdgpu_kernel void @poison_value_i64(ptr addrspace(1) %out, i64 %in) {
|
||||
; GFX8DAGISEL-LABEL: poison_value_i64:
|
||||
; GFX8DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
|
||||
; GFX8DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v0, s0
|
||||
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v1, s1
|
||||
; GFX8DAGISEL-NEXT: flat_store_dwordx2 v[0:1], v[0:1]
|
||||
; GFX8DAGISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX8GISEL-LABEL: poison_value_i64:
|
||||
; GFX8GISEL: ; %bb.0: ; %entry
|
||||
; GFX8GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
|
||||
; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX8GISEL-NEXT: v_mov_b32_e32 v0, s0
|
||||
; GFX8GISEL-NEXT: v_mov_b32_e32 v1, s1
|
||||
; GFX8GISEL-NEXT: flat_store_dwordx2 v[0:1], v[0:1]
|
||||
; GFX8GISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX9DAGISEL-LABEL: poison_value_i64:
|
||||
; GFX9DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX9DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
|
||||
; GFX9DAGISEL-NEXT: v_mov_b32_e32 v0, 0
|
||||
; GFX9DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX9DAGISEL-NEXT: global_store_dwordx2 v0, v[0:1], s[0:1]
|
||||
; GFX9DAGISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX9GISEL-LABEL: poison_value_i64:
|
||||
; GFX9GISEL: ; %bb.0: ; %entry
|
||||
; GFX9GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
|
||||
; GFX9GISEL-NEXT: v_mov_b32_e32 v0, 0
|
||||
; GFX9GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX9GISEL-NEXT: global_store_dwordx2 v0, v[0:1], s[0:1]
|
||||
; GFX9GISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX10DAGISEL-LABEL: poison_value_i64:
|
||||
; GFX10DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX10DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
|
||||
; GFX10DAGISEL-NEXT: v_mov_b32_e32 v0, 0
|
||||
; GFX10DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX10DAGISEL-NEXT: global_store_dwordx2 v0, v[0:1], s[0:1]
|
||||
; GFX10DAGISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX10GISEL-LABEL: poison_value_i64:
|
||||
; GFX10GISEL: ; %bb.0: ; %entry
|
||||
; GFX10GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
|
||||
; GFX10GISEL-NEXT: v_mov_b32_e32 v0, 0
|
||||
; GFX10GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX10GISEL-NEXT: global_store_dwordx2 v0, v[0:1], s[0:1]
|
||||
; GFX10GISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX11DAGISEL-LABEL: poison_value_i64:
|
||||
; GFX11DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX11DAGISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
|
||||
; GFX11DAGISEL-NEXT: v_mov_b32_e32 v0, 0
|
||||
; GFX11DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX11DAGISEL-NEXT: global_store_b64 v0, v[0:1], s[0:1]
|
||||
; GFX11DAGISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX11GISEL-LABEL: poison_value_i64:
|
||||
; GFX11GISEL: ; %bb.0: ; %entry
|
||||
; GFX11GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
|
||||
; GFX11GISEL-NEXT: v_mov_b32_e32 v0, 0
|
||||
; GFX11GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX11GISEL-NEXT: global_store_b64 v0, v[0:1], s[0:1]
|
||||
; GFX11GISEL-NEXT: s_endpgm
|
||||
entry:
|
||||
%result = call i64 @llvm.amdgcn.wave.reduce.and.i64(i64 poison, i32 1)
|
||||
store i64 %result, ptr addrspace(1) %out
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @divergent_value_i64(ptr addrspace(1) %out, i64 %id.x) {
|
||||
; GFX8DAGISEL-LABEL: divergent_value_i64:
|
||||
; GFX8DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX8DAGISEL-NEXT: s_mov_b32 s4, -1
|
||||
; GFX8DAGISEL-NEXT: s_mov_b64 s[6:7], exec
|
||||
; GFX8DAGISEL-NEXT: s_mov_b32 s5, s4
|
||||
; GFX8DAGISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1
|
||||
; GFX8DAGISEL-NEXT: s_ff1_i32_b64 s10, s[6:7]
|
||||
; GFX8DAGISEL-NEXT: v_readlane_b32 s8, v2, s10
|
||||
; GFX8DAGISEL-NEXT: v_readlane_b32 s9, v3, s10
|
||||
; GFX8DAGISEL-NEXT: s_bitset0_b64 s[6:7], s10
|
||||
; GFX8DAGISEL-NEXT: s_and_b64 s[4:5], s[4:5], s[8:9]
|
||||
; GFX8DAGISEL-NEXT: s_cmp_lg_u64 s[6:7], 0
|
||||
; GFX8DAGISEL-NEXT: s_cbranch_scc1 .LBB8_1
|
||||
; GFX8DAGISEL-NEXT: ; %bb.2:
|
||||
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v2, s4
|
||||
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v3, s5
|
||||
; GFX8DAGISEL-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
|
||||
; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0)
|
||||
; GFX8DAGISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX8GISEL-LABEL: divergent_value_i64:
|
||||
; GFX8GISEL: ; %bb.0: ; %entry
|
||||
; GFX8GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX8GISEL-NEXT: s_mov_b32 s4, -1
|
||||
; GFX8GISEL-NEXT: s_mov_b64 s[6:7], exec
|
||||
; GFX8GISEL-NEXT: s_mov_b32 s5, s4
|
||||
; GFX8GISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1
|
||||
; GFX8GISEL-NEXT: s_ff1_i32_b64 s10, s[6:7]
|
||||
; GFX8GISEL-NEXT: v_readlane_b32 s8, v2, s10
|
||||
; GFX8GISEL-NEXT: v_readlane_b32 s9, v3, s10
|
||||
; GFX8GISEL-NEXT: s_bitset0_b64 s[6:7], s10
|
||||
; GFX8GISEL-NEXT: s_and_b64 s[4:5], s[4:5], s[8:9]
|
||||
; GFX8GISEL-NEXT: s_cmp_lg_u64 s[6:7], 0
|
||||
; GFX8GISEL-NEXT: s_cbranch_scc1 .LBB8_1
|
||||
; GFX8GISEL-NEXT: ; %bb.2:
|
||||
; GFX8GISEL-NEXT: v_mov_b32_e32 v2, s4
|
||||
; GFX8GISEL-NEXT: v_mov_b32_e32 v3, s5
|
||||
; GFX8GISEL-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
|
||||
; GFX8GISEL-NEXT: s_waitcnt vmcnt(0)
|
||||
; GFX8GISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX9DAGISEL-LABEL: divergent_value_i64:
|
||||
; GFX9DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX9DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX9DAGISEL-NEXT: s_mov_b32 s4, -1
|
||||
; GFX9DAGISEL-NEXT: s_mov_b64 s[6:7], exec
|
||||
; GFX9DAGISEL-NEXT: s_mov_b32 s5, s4
|
||||
; GFX9DAGISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1
|
||||
; GFX9DAGISEL-NEXT: s_ff1_i32_b64 s10, s[6:7]
|
||||
; GFX9DAGISEL-NEXT: v_readlane_b32 s8, v2, s10
|
||||
; GFX9DAGISEL-NEXT: v_readlane_b32 s9, v3, s10
|
||||
; GFX9DAGISEL-NEXT: s_bitset0_b64 s[6:7], s10
|
||||
; GFX9DAGISEL-NEXT: s_and_b64 s[4:5], s[4:5], s[8:9]
|
||||
; GFX9DAGISEL-NEXT: s_cmp_lg_u64 s[6:7], 0
|
||||
; GFX9DAGISEL-NEXT: s_cbranch_scc1 .LBB8_1
|
||||
; GFX9DAGISEL-NEXT: ; %bb.2:
|
||||
; GFX9DAGISEL-NEXT: v_mov_b32_e32 v2, s4
|
||||
; GFX9DAGISEL-NEXT: v_mov_b32_e32 v3, s5
|
||||
; GFX9DAGISEL-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
|
||||
; GFX9DAGISEL-NEXT: s_waitcnt vmcnt(0)
|
||||
; GFX9DAGISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX9GISEL-LABEL: divergent_value_i64:
|
||||
; GFX9GISEL: ; %bb.0: ; %entry
|
||||
; GFX9GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX9GISEL-NEXT: s_mov_b32 s4, -1
|
||||
; GFX9GISEL-NEXT: s_mov_b64 s[6:7], exec
|
||||
; GFX9GISEL-NEXT: s_mov_b32 s5, s4
|
||||
; GFX9GISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1
|
||||
; GFX9GISEL-NEXT: s_ff1_i32_b64 s10, s[6:7]
|
||||
; GFX9GISEL-NEXT: v_readlane_b32 s8, v2, s10
|
||||
; GFX9GISEL-NEXT: v_readlane_b32 s9, v3, s10
|
||||
; GFX9GISEL-NEXT: s_bitset0_b64 s[6:7], s10
|
||||
; GFX9GISEL-NEXT: s_and_b64 s[4:5], s[4:5], s[8:9]
|
||||
; GFX9GISEL-NEXT: s_cmp_lg_u64 s[6:7], 0
|
||||
; GFX9GISEL-NEXT: s_cbranch_scc1 .LBB8_1
|
||||
; GFX9GISEL-NEXT: ; %bb.2:
|
||||
; GFX9GISEL-NEXT: v_mov_b32_e32 v2, s4
|
||||
; GFX9GISEL-NEXT: v_mov_b32_e32 v3, s5
|
||||
; GFX9GISEL-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
|
||||
; GFX9GISEL-NEXT: s_waitcnt vmcnt(0)
|
||||
; GFX9GISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX1064DAGISEL-LABEL: divergent_value_i64:
|
||||
; GFX1064DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX1064DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX1064DAGISEL-NEXT: s_mov_b32 s4, -1
|
||||
; GFX1064DAGISEL-NEXT: s_mov_b64 s[6:7], exec
|
||||
; GFX1064DAGISEL-NEXT: s_mov_b32 s5, s4
|
||||
; GFX1064DAGISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1
|
||||
; GFX1064DAGISEL-NEXT: s_ff1_i32_b64 s10, s[6:7]
|
||||
; GFX1064DAGISEL-NEXT: v_readlane_b32 s8, v2, s10
|
||||
; GFX1064DAGISEL-NEXT: v_readlane_b32 s9, v3, s10
|
||||
; GFX1064DAGISEL-NEXT: s_bitset0_b64 s[6:7], s10
|
||||
; GFX1064DAGISEL-NEXT: s_and_b64 s[4:5], s[4:5], s[8:9]
|
||||
; GFX1064DAGISEL-NEXT: s_cmp_lg_u64 s[6:7], 0
|
||||
; GFX1064DAGISEL-NEXT: s_cbranch_scc1 .LBB8_1
|
||||
; GFX1064DAGISEL-NEXT: ; %bb.2:
|
||||
; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v2, s4
|
||||
; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v3, s5
|
||||
; GFX1064DAGISEL-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
|
||||
; GFX1064DAGISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX1064GISEL-LABEL: divergent_value_i64:
|
||||
; GFX1064GISEL: ; %bb.0: ; %entry
|
||||
; GFX1064GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX1064GISEL-NEXT: s_mov_b32 s4, -1
|
||||
; GFX1064GISEL-NEXT: s_mov_b64 s[6:7], exec
|
||||
; GFX1064GISEL-NEXT: s_mov_b32 s5, s4
|
||||
; GFX1064GISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1
|
||||
; GFX1064GISEL-NEXT: s_ff1_i32_b64 s10, s[6:7]
|
||||
; GFX1064GISEL-NEXT: v_readlane_b32 s8, v2, s10
|
||||
; GFX1064GISEL-NEXT: v_readlane_b32 s9, v3, s10
|
||||
; GFX1064GISEL-NEXT: s_bitset0_b64 s[6:7], s10
|
||||
; GFX1064GISEL-NEXT: s_and_b64 s[4:5], s[4:5], s[8:9]
|
||||
; GFX1064GISEL-NEXT: s_cmp_lg_u64 s[6:7], 0
|
||||
; GFX1064GISEL-NEXT: s_cbranch_scc1 .LBB8_1
|
||||
; GFX1064GISEL-NEXT: ; %bb.2:
|
||||
; GFX1064GISEL-NEXT: v_mov_b32_e32 v2, s4
|
||||
; GFX1064GISEL-NEXT: v_mov_b32_e32 v3, s5
|
||||
; GFX1064GISEL-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
|
||||
; GFX1064GISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX1032DAGISEL-LABEL: divergent_value_i64:
|
||||
; GFX1032DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX1032DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX1032DAGISEL-NEXT: s_mov_b32 s4, -1
|
||||
; GFX1032DAGISEL-NEXT: s_mov_b32 s6, exec_lo
|
||||
; GFX1032DAGISEL-NEXT: s_mov_b32 s5, s4
|
||||
; GFX1032DAGISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1
|
||||
; GFX1032DAGISEL-NEXT: s_ff1_i32_b32 s7, s6
|
||||
; GFX1032DAGISEL-NEXT: v_readlane_b32 s8, v2, s7
|
||||
; GFX1032DAGISEL-NEXT: v_readlane_b32 s9, v3, s7
|
||||
; GFX1032DAGISEL-NEXT: s_bitset0_b32 s6, s7
|
||||
; GFX1032DAGISEL-NEXT: s_and_b64 s[4:5], s[4:5], s[8:9]
|
||||
; GFX1032DAGISEL-NEXT: s_cmp_lg_u32 s6, 0
|
||||
; GFX1032DAGISEL-NEXT: s_cbranch_scc1 .LBB8_1
|
||||
; GFX1032DAGISEL-NEXT: ; %bb.2:
|
||||
; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v2, s4
|
||||
; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v3, s5
|
||||
; GFX1032DAGISEL-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
|
||||
; GFX1032DAGISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX1032GISEL-LABEL: divergent_value_i64:
|
||||
; GFX1032GISEL: ; %bb.0: ; %entry
|
||||
; GFX1032GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX1032GISEL-NEXT: s_mov_b32 s4, -1
|
||||
; GFX1032GISEL-NEXT: s_mov_b32 s6, exec_lo
|
||||
; GFX1032GISEL-NEXT: s_mov_b32 s5, s4
|
||||
; GFX1032GISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1
|
||||
; GFX1032GISEL-NEXT: s_ff1_i32_b32 s7, s6
|
||||
; GFX1032GISEL-NEXT: v_readlane_b32 s8, v2, s7
|
||||
; GFX1032GISEL-NEXT: v_readlane_b32 s9, v3, s7
|
||||
; GFX1032GISEL-NEXT: s_bitset0_b32 s6, s7
|
||||
; GFX1032GISEL-NEXT: s_and_b64 s[4:5], s[4:5], s[8:9]
|
||||
; GFX1032GISEL-NEXT: s_cmp_lg_u32 s6, 0
|
||||
; GFX1032GISEL-NEXT: s_cbranch_scc1 .LBB8_1
|
||||
; GFX1032GISEL-NEXT: ; %bb.2:
|
||||
; GFX1032GISEL-NEXT: v_mov_b32_e32 v2, s4
|
||||
; GFX1032GISEL-NEXT: v_mov_b32_e32 v3, s5
|
||||
; GFX1032GISEL-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
|
||||
; GFX1032GISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX1164DAGISEL-LABEL: divergent_value_i64:
|
||||
; GFX1164DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX1164DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX1164DAGISEL-NEXT: s_mov_b32 s0, -1
|
||||
; GFX1164DAGISEL-NEXT: s_mov_b64 s[2:3], exec
|
||||
; GFX1164DAGISEL-NEXT: s_mov_b32 s1, s0
|
||||
; GFX1164DAGISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1
|
||||
; GFX1164DAGISEL-NEXT: s_ctz_i32_b64 s6, s[2:3]
|
||||
; GFX1164DAGISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
|
||||
; GFX1164DAGISEL-NEXT: v_readlane_b32 s4, v2, s6
|
||||
; GFX1164DAGISEL-NEXT: v_readlane_b32 s5, v3, s6
|
||||
; GFX1164DAGISEL-NEXT: s_bitset0_b64 s[2:3], s6
|
||||
; GFX1164DAGISEL-NEXT: s_and_b64 s[0:1], s[0:1], s[4:5]
|
||||
; GFX1164DAGISEL-NEXT: s_cmp_lg_u64 s[2:3], 0
|
||||
; GFX1164DAGISEL-NEXT: s_cbranch_scc1 .LBB8_1
|
||||
; GFX1164DAGISEL-NEXT: ; %bb.2:
|
||||
; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v3, s1
|
||||
; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v2, s0
|
||||
; GFX1164DAGISEL-NEXT: global_store_b64 v[0:1], v[2:3], off
|
||||
; GFX1164DAGISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX1164GISEL-LABEL: divergent_value_i64:
|
||||
; GFX1164GISEL: ; %bb.0: ; %entry
|
||||
; GFX1164GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX1164GISEL-NEXT: s_mov_b32 s0, -1
|
||||
; GFX1164GISEL-NEXT: s_mov_b64 s[2:3], exec
|
||||
; GFX1164GISEL-NEXT: s_mov_b32 s1, s0
|
||||
; GFX1164GISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1
|
||||
; GFX1164GISEL-NEXT: s_ctz_i32_b64 s6, s[2:3]
|
||||
; GFX1164GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
|
||||
; GFX1164GISEL-NEXT: v_readlane_b32 s4, v2, s6
|
||||
; GFX1164GISEL-NEXT: v_readlane_b32 s5, v3, s6
|
||||
; GFX1164GISEL-NEXT: s_bitset0_b64 s[2:3], s6
|
||||
; GFX1164GISEL-NEXT: s_and_b64 s[0:1], s[0:1], s[4:5]
|
||||
; GFX1164GISEL-NEXT: s_cmp_lg_u64 s[2:3], 0
|
||||
; GFX1164GISEL-NEXT: s_cbranch_scc1 .LBB8_1
|
||||
; GFX1164GISEL-NEXT: ; %bb.2:
|
||||
; GFX1164GISEL-NEXT: v_mov_b32_e32 v3, s1
|
||||
; GFX1164GISEL-NEXT: v_mov_b32_e32 v2, s0
|
||||
; GFX1164GISEL-NEXT: global_store_b64 v[0:1], v[2:3], off
|
||||
; GFX1164GISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX1132DAGISEL-LABEL: divergent_value_i64:
|
||||
; GFX1132DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX1132DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX1132DAGISEL-NEXT: s_mov_b32 s0, -1
|
||||
; GFX1132DAGISEL-NEXT: s_mov_b32 s2, exec_lo
|
||||
; GFX1132DAGISEL-NEXT: s_mov_b32 s1, s0
|
||||
; GFX1132DAGISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1
|
||||
; GFX1132DAGISEL-NEXT: s_ctz_i32_b32 s3, s2
|
||||
; GFX1132DAGISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
|
||||
; GFX1132DAGISEL-NEXT: v_readlane_b32 s4, v2, s3
|
||||
; GFX1132DAGISEL-NEXT: v_readlane_b32 s5, v3, s3
|
||||
; GFX1132DAGISEL-NEXT: s_bitset0_b32 s2, s3
|
||||
; GFX1132DAGISEL-NEXT: s_and_b64 s[0:1], s[0:1], s[4:5]
|
||||
; GFX1132DAGISEL-NEXT: s_cmp_lg_u32 s2, 0
|
||||
; GFX1132DAGISEL-NEXT: s_cbranch_scc1 .LBB8_1
|
||||
; GFX1132DAGISEL-NEXT: ; %bb.2:
|
||||
; GFX1132DAGISEL-NEXT: v_dual_mov_b32 v3, s1 :: v_dual_mov_b32 v2, s0
|
||||
; GFX1132DAGISEL-NEXT: global_store_b64 v[0:1], v[2:3], off
|
||||
; GFX1132DAGISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX1132GISEL-LABEL: divergent_value_i64:
|
||||
; GFX1132GISEL: ; %bb.0: ; %entry
|
||||
; GFX1132GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX1132GISEL-NEXT: s_mov_b32 s0, -1
|
||||
; GFX1132GISEL-NEXT: s_mov_b32 s2, exec_lo
|
||||
; GFX1132GISEL-NEXT: s_mov_b32 s1, s0
|
||||
; GFX1132GISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1
|
||||
; GFX1132GISEL-NEXT: s_ctz_i32_b32 s3, s2
|
||||
; GFX1132GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
|
||||
; GFX1132GISEL-NEXT: v_readlane_b32 s4, v2, s3
|
||||
; GFX1132GISEL-NEXT: v_readlane_b32 s5, v3, s3
|
||||
; GFX1132GISEL-NEXT: s_bitset0_b32 s2, s3
|
||||
; GFX1132GISEL-NEXT: s_and_b64 s[0:1], s[0:1], s[4:5]
|
||||
; GFX1132GISEL-NEXT: s_cmp_lg_u32 s2, 0
|
||||
; GFX1132GISEL-NEXT: s_cbranch_scc1 .LBB8_1
|
||||
; GFX1132GISEL-NEXT: ; %bb.2:
|
||||
; GFX1132GISEL-NEXT: v_dual_mov_b32 v3, s1 :: v_dual_mov_b32 v2, s0
|
||||
; GFX1132GISEL-NEXT: global_store_b64 v[0:1], v[2:3], off
|
||||
; GFX1132GISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
entry:
|
||||
%result = call i64 @llvm.amdgcn.wave.reduce.and.i64(i64 %id.x, i32 1)
|
||||
store i64 %result, ptr addrspace(1) %out
|
||||
ret void
|
||||
}
|
||||
|
||||
define amdgpu_kernel void @divergent_cfg_i64(ptr addrspace(1) %out, i64 %in, i64 %in2) {
|
||||
; GFX8DAGISEL-LABEL: divergent_cfg_i64:
|
||||
; GFX8DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX8DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
|
||||
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34
|
||||
; GFX8DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
|
||||
; GFX8DAGISEL-NEXT: s_and_saveexec_b64 s[6:7], vcc
|
||||
; GFX8DAGISEL-NEXT: s_xor_b64 s[6:7], exec, s[6:7]
|
||||
; GFX8DAGISEL-NEXT: s_or_saveexec_b64 s[6:7], s[6:7]
|
||||
; GFX8DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v0, s2
|
||||
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v1, s3
|
||||
; GFX8DAGISEL-NEXT: s_xor_b64 exec, exec, s[6:7]
|
||||
; GFX8DAGISEL-NEXT: ; %bb.1: ; %if
|
||||
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v0, s4
|
||||
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v1, s5
|
||||
; GFX8DAGISEL-NEXT: ; %bb.2: ; %endif
|
||||
; GFX8DAGISEL-NEXT: s_or_b64 exec, exec, s[6:7]
|
||||
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v2, s0
|
||||
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v3, s1
|
||||
; GFX8DAGISEL-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
|
||||
; GFX8DAGISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX8GISEL-LABEL: divergent_cfg_i64:
|
||||
; GFX8GISEL: ; %bb.0: ; %entry
|
||||
; GFX8GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
|
||||
; GFX8GISEL-NEXT: v_cmp_le_u32_e32 vcc, 16, v0
|
||||
; GFX8GISEL-NEXT: ; implicit-def: $sgpr6_sgpr7
|
||||
; GFX8GISEL-NEXT: s_and_saveexec_b64 s[8:9], vcc
|
||||
; GFX8GISEL-NEXT: s_xor_b64 s[8:9], exec, s[8:9]
|
||||
; GFX8GISEL-NEXT: s_cbranch_execz .LBB9_2
|
||||
; GFX8GISEL-NEXT: ; %bb.1: ; %else
|
||||
; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX8GISEL-NEXT: s_mov_b64 s[6:7], s[2:3]
|
||||
; GFX8GISEL-NEXT: .LBB9_2: ; %Flow
|
||||
; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX8GISEL-NEXT: s_andn2_saveexec_b64 s[2:3], s[8:9]
|
||||
; GFX8GISEL-NEXT: s_cbranch_execz .LBB9_4
|
||||
; GFX8GISEL-NEXT: ; %bb.3: ; %if
|
||||
; GFX8GISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34
|
||||
; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX8GISEL-NEXT: s_mov_b64 s[6:7], s[4:5]
|
||||
; GFX8GISEL-NEXT: .LBB9_4: ; %endif
|
||||
; GFX8GISEL-NEXT: s_or_b64 exec, exec, s[2:3]
|
||||
; GFX8GISEL-NEXT: v_mov_b32_e32 v0, s6
|
||||
; GFX8GISEL-NEXT: v_mov_b32_e32 v3, s1
|
||||
; GFX8GISEL-NEXT: v_mov_b32_e32 v1, s7
|
||||
; GFX8GISEL-NEXT: v_mov_b32_e32 v2, s0
|
||||
; GFX8GISEL-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
|
||||
; GFX8GISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX9DAGISEL-LABEL: divergent_cfg_i64:
|
||||
; GFX9DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX9DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
|
||||
; GFX9DAGISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
|
||||
; GFX9DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
|
||||
; GFX9DAGISEL-NEXT: s_and_saveexec_b64 s[4:5], vcc
|
||||
; GFX9DAGISEL-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
|
||||
; GFX9DAGISEL-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
|
||||
; GFX9DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX9DAGISEL-NEXT: v_mov_b32_e32 v0, s2
|
||||
; GFX9DAGISEL-NEXT: v_mov_b32_e32 v1, s3
|
||||
; GFX9DAGISEL-NEXT: s_xor_b64 exec, exec, s[4:5]
|
||||
; GFX9DAGISEL-NEXT: ; %bb.1: ; %if
|
||||
; GFX9DAGISEL-NEXT: v_mov_b32_e32 v0, s6
|
||||
; GFX9DAGISEL-NEXT: v_mov_b32_e32 v1, s7
|
||||
; GFX9DAGISEL-NEXT: ; %bb.2: ; %endif
|
||||
; GFX9DAGISEL-NEXT: s_or_b64 exec, exec, s[4:5]
|
||||
; GFX9DAGISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX9DAGISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
|
||||
; GFX9DAGISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX9GISEL-LABEL: divergent_cfg_i64:
|
||||
; GFX9GISEL: ; %bb.0: ; %entry
|
||||
; GFX9GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
|
||||
; GFX9GISEL-NEXT: v_cmp_le_u32_e32 vcc, 16, v0
|
||||
; GFX9GISEL-NEXT: ; implicit-def: $sgpr6_sgpr7
|
||||
; GFX9GISEL-NEXT: s_and_saveexec_b64 s[8:9], vcc
|
||||
; GFX9GISEL-NEXT: s_xor_b64 s[8:9], exec, s[8:9]
|
||||
; GFX9GISEL-NEXT: s_cbranch_execz .LBB9_2
|
||||
; GFX9GISEL-NEXT: ; %bb.1: ; %else
|
||||
; GFX9GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX9GISEL-NEXT: s_mov_b64 s[6:7], s[2:3]
|
||||
; GFX9GISEL-NEXT: .LBB9_2: ; %Flow
|
||||
; GFX9GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX9GISEL-NEXT: s_andn2_saveexec_b64 s[2:3], s[8:9]
|
||||
; GFX9GISEL-NEXT: s_cbranch_execz .LBB9_4
|
||||
; GFX9GISEL-NEXT: ; %bb.3: ; %if
|
||||
; GFX9GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
|
||||
; GFX9GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX9GISEL-NEXT: s_mov_b64 s[6:7], s[6:7]
|
||||
; GFX9GISEL-NEXT: .LBB9_4: ; %endif
|
||||
; GFX9GISEL-NEXT: s_or_b64 exec, exec, s[2:3]
|
||||
; GFX9GISEL-NEXT: v_mov_b32_e32 v0, s6
|
||||
; GFX9GISEL-NEXT: v_mov_b32_e32 v1, s7
|
||||
; GFX9GISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX9GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
|
||||
; GFX9GISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX1064DAGISEL-LABEL: divergent_cfg_i64:
|
||||
; GFX1064DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX1064DAGISEL-NEXT: s_clause 0x1
|
||||
; GFX1064DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
|
||||
; GFX1064DAGISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
|
||||
; GFX1064DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
|
||||
; GFX1064DAGISEL-NEXT: s_and_saveexec_b64 s[4:5], vcc
|
||||
; GFX1064DAGISEL-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
|
||||
; GFX1064DAGISEL-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
|
||||
; GFX1064DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v0, s2
|
||||
; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v1, s3
|
||||
; GFX1064DAGISEL-NEXT: s_xor_b64 exec, exec, s[4:5]
|
||||
; GFX1064DAGISEL-NEXT: ; %bb.1: ; %if
|
||||
; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v0, s6
|
||||
; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v1, s7
|
||||
; GFX1064DAGISEL-NEXT: ; %bb.2: ; %endif
|
||||
; GFX1064DAGISEL-NEXT: s_or_b64 exec, exec, s[4:5]
|
||||
; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX1064DAGISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
|
||||
; GFX1064DAGISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX1064GISEL-LABEL: divergent_cfg_i64:
|
||||
; GFX1064GISEL: ; %bb.0: ; %entry
|
||||
; GFX1064GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
|
||||
; GFX1064GISEL-NEXT: v_cmp_le_u32_e32 vcc, 16, v0
|
||||
; GFX1064GISEL-NEXT: ; implicit-def: $sgpr6_sgpr7
|
||||
; GFX1064GISEL-NEXT: s_and_saveexec_b64 s[8:9], vcc
|
||||
; GFX1064GISEL-NEXT: s_xor_b64 s[8:9], exec, s[8:9]
|
||||
; GFX1064GISEL-NEXT: s_cbranch_execz .LBB9_2
|
||||
; GFX1064GISEL-NEXT: ; %bb.1: ; %else
|
||||
; GFX1064GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1064GISEL-NEXT: s_mov_b64 s[6:7], s[2:3]
|
||||
; GFX1064GISEL-NEXT: .LBB9_2: ; %Flow
|
||||
; GFX1064GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1064GISEL-NEXT: s_andn2_saveexec_b64 s[2:3], s[8:9]
|
||||
; GFX1064GISEL-NEXT: s_cbranch_execz .LBB9_4
|
||||
; GFX1064GISEL-NEXT: ; %bb.3: ; %if
|
||||
; GFX1064GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
|
||||
; GFX1064GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1064GISEL-NEXT: s_mov_b64 s[6:7], s[6:7]
|
||||
; GFX1064GISEL-NEXT: .LBB9_4: ; %endif
|
||||
; GFX1064GISEL-NEXT: s_or_b64 exec, exec, s[2:3]
|
||||
; GFX1064GISEL-NEXT: v_mov_b32_e32 v0, s6
|
||||
; GFX1064GISEL-NEXT: v_mov_b32_e32 v1, s7
|
||||
; GFX1064GISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX1064GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
|
||||
; GFX1064GISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX1032DAGISEL-LABEL: divergent_cfg_i64:
|
||||
; GFX1032DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX1032DAGISEL-NEXT: s_clause 0x1
|
||||
; GFX1032DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
|
||||
; GFX1032DAGISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
|
||||
; GFX1032DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc_lo, 15, v0
|
||||
; GFX1032DAGISEL-NEXT: s_and_saveexec_b32 s4, vcc_lo
|
||||
; GFX1032DAGISEL-NEXT: s_xor_b32 s4, exec_lo, s4
|
||||
; GFX1032DAGISEL-NEXT: s_or_saveexec_b32 s4, s4
|
||||
; GFX1032DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v0, s2
|
||||
; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v1, s3
|
||||
; GFX1032DAGISEL-NEXT: s_xor_b32 exec_lo, exec_lo, s4
|
||||
; GFX1032DAGISEL-NEXT: ; %bb.1: ; %if
|
||||
; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v0, s6
|
||||
; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v1, s7
|
||||
; GFX1032DAGISEL-NEXT: ; %bb.2: ; %endif
|
||||
; GFX1032DAGISEL-NEXT: s_or_b32 exec_lo, exec_lo, s4
|
||||
; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX1032DAGISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
|
||||
; GFX1032DAGISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX1032GISEL-LABEL: divergent_cfg_i64:
|
||||
; GFX1032GISEL: ; %bb.0: ; %entry
|
||||
; GFX1032GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
|
||||
; GFX1032GISEL-NEXT: v_cmp_le_u32_e32 vcc_lo, 16, v0
|
||||
; GFX1032GISEL-NEXT: ; implicit-def: $sgpr6_sgpr7
|
||||
; GFX1032GISEL-NEXT: s_and_saveexec_b32 s8, vcc_lo
|
||||
; GFX1032GISEL-NEXT: s_xor_b32 s8, exec_lo, s8
|
||||
; GFX1032GISEL-NEXT: s_cbranch_execz .LBB9_2
|
||||
; GFX1032GISEL-NEXT: ; %bb.1: ; %else
|
||||
; GFX1032GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1032GISEL-NEXT: s_mov_b64 s[6:7], s[2:3]
|
||||
; GFX1032GISEL-NEXT: .LBB9_2: ; %Flow
|
||||
; GFX1032GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1032GISEL-NEXT: s_andn2_saveexec_b32 s2, s8
|
||||
; GFX1032GISEL-NEXT: s_cbranch_execz .LBB9_4
|
||||
; GFX1032GISEL-NEXT: ; %bb.3: ; %if
|
||||
; GFX1032GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
|
||||
; GFX1032GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1032GISEL-NEXT: s_mov_b64 s[6:7], s[6:7]
|
||||
; GFX1032GISEL-NEXT: .LBB9_4: ; %endif
|
||||
; GFX1032GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s2
|
||||
; GFX1032GISEL-NEXT: v_mov_b32_e32 v0, s6
|
||||
; GFX1032GISEL-NEXT: v_mov_b32_e32 v1, s7
|
||||
; GFX1032GISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX1032GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
|
||||
; GFX1032GISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX1164DAGISEL-LABEL: divergent_cfg_i64:
|
||||
; GFX1164DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX1164DAGISEL-NEXT: s_clause 0x1
|
||||
; GFX1164DAGISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
|
||||
; GFX1164DAGISEL-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
|
||||
; GFX1164DAGISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
|
||||
; GFX1164DAGISEL-NEXT: s_mov_b64 s[6:7], exec
|
||||
; GFX1164DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
|
||||
; GFX1164DAGISEL-NEXT: v_cmpx_lt_u32_e32 15, v0
|
||||
; GFX1164DAGISEL-NEXT: s_xor_b64 s[6:7], exec, s[6:7]
|
||||
; GFX1164DAGISEL-NEXT: s_or_saveexec_b64 s[6:7], s[6:7]
|
||||
; GFX1164DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v0, s2
|
||||
; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v1, s3
|
||||
; GFX1164DAGISEL-NEXT: s_xor_b64 exec, exec, s[6:7]
|
||||
; GFX1164DAGISEL-NEXT: ; %bb.1: ; %if
|
||||
; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v0, s4
|
||||
; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v1, s5
|
||||
; GFX1164DAGISEL-NEXT: ; %bb.2: ; %endif
|
||||
; GFX1164DAGISEL-NEXT: s_or_b64 exec, exec, s[6:7]
|
||||
; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX1164DAGISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
|
||||
; GFX1164DAGISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX1164GISEL-LABEL: divergent_cfg_i64:
|
||||
; GFX1164GISEL: ; %bb.0: ; %entry
|
||||
; GFX1164GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
|
||||
; GFX1164GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
|
||||
; GFX1164GISEL-NEXT: s_mov_b64 s[8:9], exec
|
||||
; GFX1164GISEL-NEXT: ; implicit-def: $sgpr6_sgpr7
|
||||
; GFX1164GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX1164GISEL-NEXT: v_cmpx_le_u32_e32 16, v0
|
||||
; GFX1164GISEL-NEXT: s_xor_b64 s[8:9], exec, s[8:9]
|
||||
; GFX1164GISEL-NEXT: s_cbranch_execz .LBB9_2
|
||||
; GFX1164GISEL-NEXT: ; %bb.1: ; %else
|
||||
; GFX1164GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1164GISEL-NEXT: s_mov_b64 s[6:7], s[2:3]
|
||||
; GFX1164GISEL-NEXT: .LBB9_2: ; %Flow
|
||||
; GFX1164GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1164GISEL-NEXT: s_and_not1_saveexec_b64 s[2:3], s[8:9]
|
||||
; GFX1164GISEL-NEXT: s_cbranch_execz .LBB9_4
|
||||
; GFX1164GISEL-NEXT: ; %bb.3: ; %if
|
||||
; GFX1164GISEL-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
|
||||
; GFX1164GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1164GISEL-NEXT: s_mov_b64 s[6:7], s[4:5]
|
||||
; GFX1164GISEL-NEXT: .LBB9_4: ; %endif
|
||||
; GFX1164GISEL-NEXT: s_or_b64 exec, exec, s[2:3]
|
||||
; GFX1164GISEL-NEXT: v_mov_b32_e32 v0, s6
|
||||
; GFX1164GISEL-NEXT: v_mov_b32_e32 v1, s7
|
||||
; GFX1164GISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX1164GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
|
||||
; GFX1164GISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX1132DAGISEL-LABEL: divergent_cfg_i64:
|
||||
; GFX1132DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX1132DAGISEL-NEXT: s_clause 0x1
|
||||
; GFX1132DAGISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
|
||||
; GFX1132DAGISEL-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
|
||||
; GFX1132DAGISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
|
||||
; GFX1132DAGISEL-NEXT: s_mov_b32 s6, exec_lo
|
||||
; GFX1132DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
|
||||
; GFX1132DAGISEL-NEXT: v_cmpx_lt_u32_e32 15, v0
|
||||
; GFX1132DAGISEL-NEXT: s_xor_b32 s6, exec_lo, s6
|
||||
; GFX1132DAGISEL-NEXT: s_or_saveexec_b32 s6, s6
|
||||
; GFX1132DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1132DAGISEL-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
|
||||
; GFX1132DAGISEL-NEXT: s_xor_b32 exec_lo, exec_lo, s6
|
||||
; GFX1132DAGISEL-NEXT: ; %bb.1: ; %if
|
||||
; GFX1132DAGISEL-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
|
||||
; GFX1132DAGISEL-NEXT: ; %bb.2: ; %endif
|
||||
; GFX1132DAGISEL-NEXT: s_or_b32 exec_lo, exec_lo, s6
|
||||
; GFX1132DAGISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX1132DAGISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
|
||||
; GFX1132DAGISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX1132GISEL-LABEL: divergent_cfg_i64:
|
||||
; GFX1132GISEL: ; %bb.0: ; %entry
|
||||
; GFX1132GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
|
||||
; GFX1132GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
|
||||
; GFX1132GISEL-NEXT: s_mov_b32 s8, exec_lo
|
||||
; GFX1132GISEL-NEXT: ; implicit-def: $sgpr6_sgpr7
|
||||
; GFX1132GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX1132GISEL-NEXT: v_cmpx_le_u32_e32 16, v0
|
||||
; GFX1132GISEL-NEXT: s_xor_b32 s8, exec_lo, s8
|
||||
; GFX1132GISEL-NEXT: s_cbranch_execz .LBB9_2
|
||||
; GFX1132GISEL-NEXT: ; %bb.1: ; %else
|
||||
; GFX1132GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1132GISEL-NEXT: s_mov_b64 s[6:7], s[2:3]
|
||||
; GFX1132GISEL-NEXT: .LBB9_2: ; %Flow
|
||||
; GFX1132GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1132GISEL-NEXT: s_and_not1_saveexec_b32 s2, s8
|
||||
; GFX1132GISEL-NEXT: s_cbranch_execz .LBB9_4
|
||||
; GFX1132GISEL-NEXT: ; %bb.3: ; %if
|
||||
; GFX1132GISEL-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
|
||||
; GFX1132GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1132GISEL-NEXT: s_mov_b64 s[6:7], s[4:5]
|
||||
; GFX1132GISEL-NEXT: .LBB9_4: ; %endif
|
||||
; GFX1132GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s2
|
||||
; GFX1132GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
|
||||
; GFX1132GISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX1132GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
|
||||
; GFX1132GISEL-NEXT: s_endpgm
|
||||
entry:
|
||||
%tid = call i32 @llvm.amdgcn.workitem.id.x()
|
||||
%d_cmp = icmp ult i32 %tid, 16
|
||||
br i1 %d_cmp, label %if, label %else
|
||||
|
||||
if:
|
||||
%reducedValTid = call i64 @llvm.amdgcn.wave.reduce.and.i64(i64 %in2, i32 1)
|
||||
br label %endif
|
||||
|
||||
else:
|
||||
%reducedValIn = call i64 @llvm.amdgcn.wave.reduce.and.i64(i64 %in, i32 1)
|
||||
br label %endif
|
||||
|
||||
endif:
|
||||
%combine = phi i64 [%reducedValTid, %if], [%reducedValIn, %else]
|
||||
store i64 %combine, ptr addrspace(1) %out
|
||||
ret void
|
||||
}
|
||||
|
||||
@ -980,3 +980,858 @@ endif:
|
||||
store i32 %combine, ptr addrspace(1) %out
|
||||
ret void
|
||||
}
|
||||
|
||||
define amdgpu_kernel void @uniform_value_i64(ptr addrspace(1) %out, i64 %in) {
|
||||
; GFX8DAGISEL-LABEL: uniform_value_i64:
|
||||
; GFX8DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX8DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
|
||||
; GFX8DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v2, s2
|
||||
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v0, s0
|
||||
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v1, s1
|
||||
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v3, s3
|
||||
; GFX8DAGISEL-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
|
||||
; GFX8DAGISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX8GISEL-LABEL: uniform_value_i64:
|
||||
; GFX8GISEL: ; %bb.0: ; %entry
|
||||
; GFX8GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
|
||||
; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX8GISEL-NEXT: v_mov_b32_e32 v0, s2
|
||||
; GFX8GISEL-NEXT: v_mov_b32_e32 v3, s1
|
||||
; GFX8GISEL-NEXT: v_mov_b32_e32 v1, s3
|
||||
; GFX8GISEL-NEXT: v_mov_b32_e32 v2, s0
|
||||
; GFX8GISEL-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
|
||||
; GFX8GISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX9DAGISEL-LABEL: uniform_value_i64:
|
||||
; GFX9DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX9DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
|
||||
; GFX9DAGISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX9DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX9DAGISEL-NEXT: v_mov_b32_e32 v0, s2
|
||||
; GFX9DAGISEL-NEXT: v_mov_b32_e32 v1, s3
|
||||
; GFX9DAGISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
|
||||
; GFX9DAGISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX9GISEL-LABEL: uniform_value_i64:
|
||||
; GFX9GISEL: ; %bb.0: ; %entry
|
||||
; GFX9GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
|
||||
; GFX9GISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX9GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX9GISEL-NEXT: v_mov_b32_e32 v0, s2
|
||||
; GFX9GISEL-NEXT: v_mov_b32_e32 v1, s3
|
||||
; GFX9GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
|
||||
; GFX9GISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX10DAGISEL-LABEL: uniform_value_i64:
|
||||
; GFX10DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX10DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
|
||||
; GFX10DAGISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX10DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX10DAGISEL-NEXT: v_mov_b32_e32 v0, s2
|
||||
; GFX10DAGISEL-NEXT: v_mov_b32_e32 v1, s3
|
||||
; GFX10DAGISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
|
||||
; GFX10DAGISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX10GISEL-LABEL: uniform_value_i64:
|
||||
; GFX10GISEL: ; %bb.0: ; %entry
|
||||
; GFX10GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
|
||||
; GFX10GISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX10GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX10GISEL-NEXT: v_mov_b32_e32 v0, s2
|
||||
; GFX10GISEL-NEXT: v_mov_b32_e32 v1, s3
|
||||
; GFX10GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
|
||||
; GFX10GISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX1164DAGISEL-LABEL: uniform_value_i64:
|
||||
; GFX1164DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX1164DAGISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
|
||||
; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX1164DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v0, s2
|
||||
; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v1, s3
|
||||
; GFX1164DAGISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
|
||||
; GFX1164DAGISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX1164GISEL-LABEL: uniform_value_i64:
|
||||
; GFX1164GISEL: ; %bb.0: ; %entry
|
||||
; GFX1164GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
|
||||
; GFX1164GISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX1164GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1164GISEL-NEXT: v_mov_b32_e32 v0, s2
|
||||
; GFX1164GISEL-NEXT: v_mov_b32_e32 v1, s3
|
||||
; GFX1164GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
|
||||
; GFX1164GISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX1132DAGISEL-LABEL: uniform_value_i64:
|
||||
; GFX1132DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX1132DAGISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
|
||||
; GFX1132DAGISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX1132DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1132DAGISEL-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
|
||||
; GFX1132DAGISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
|
||||
; GFX1132DAGISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX1132GISEL-LABEL: uniform_value_i64:
|
||||
; GFX1132GISEL: ; %bb.0: ; %entry
|
||||
; GFX1132GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
|
||||
; GFX1132GISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX1132GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1132GISEL-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
|
||||
; GFX1132GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
|
||||
; GFX1132GISEL-NEXT: s_endpgm
|
||||
entry:
|
||||
%result = call i64 @llvm.amdgcn.wave.reduce.or.i64(i64 %in, i32 1)
|
||||
store i64 %result, ptr addrspace(1) %out
|
||||
ret void
|
||||
}
|
||||
|
||||
define amdgpu_kernel void @const_value_i64(ptr addrspace(1) %out) {
|
||||
; GFX8DAGISEL-LABEL: const_value_i64:
|
||||
; GFX8DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
|
||||
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v0, 0x7b
|
||||
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v1, 0
|
||||
; GFX8DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v3, s1
|
||||
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v2, s0
|
||||
; GFX8DAGISEL-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
|
||||
; GFX8DAGISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX8GISEL-LABEL: const_value_i64:
|
||||
; GFX8GISEL: ; %bb.0: ; %entry
|
||||
; GFX8GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
|
||||
; GFX8GISEL-NEXT: v_mov_b32_e32 v0, 0x7b
|
||||
; GFX8GISEL-NEXT: v_mov_b32_e32 v1, 0
|
||||
; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX8GISEL-NEXT: v_mov_b32_e32 v3, s1
|
||||
; GFX8GISEL-NEXT: v_mov_b32_e32 v2, s0
|
||||
; GFX8GISEL-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
|
||||
; GFX8GISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX9DAGISEL-LABEL: const_value_i64:
|
||||
; GFX9DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX9DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
|
||||
; GFX9DAGISEL-NEXT: v_mov_b32_e32 v0, 0x7b
|
||||
; GFX9DAGISEL-NEXT: v_mov_b32_e32 v1, 0
|
||||
; GFX9DAGISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX9DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX9DAGISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
|
||||
; GFX9DAGISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX9GISEL-LABEL: const_value_i64:
|
||||
; GFX9GISEL: ; %bb.0: ; %entry
|
||||
; GFX9GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
|
||||
; GFX9GISEL-NEXT: v_mov_b32_e32 v0, 0x7b
|
||||
; GFX9GISEL-NEXT: v_mov_b32_e32 v1, 0
|
||||
; GFX9GISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX9GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX9GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
|
||||
; GFX9GISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX10DAGISEL-LABEL: const_value_i64:
|
||||
; GFX10DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX10DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
|
||||
; GFX10DAGISEL-NEXT: v_mov_b32_e32 v0, 0x7b
|
||||
; GFX10DAGISEL-NEXT: v_mov_b32_e32 v1, 0
|
||||
; GFX10DAGISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX10DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX10DAGISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
|
||||
; GFX10DAGISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX10GISEL-LABEL: const_value_i64:
|
||||
; GFX10GISEL: ; %bb.0: ; %entry
|
||||
; GFX10GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
|
||||
; GFX10GISEL-NEXT: v_mov_b32_e32 v0, 0x7b
|
||||
; GFX10GISEL-NEXT: v_mov_b32_e32 v1, 0
|
||||
; GFX10GISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX10GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX10GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
|
||||
; GFX10GISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX1164DAGISEL-LABEL: const_value_i64:
|
||||
; GFX1164DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX1164DAGISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
|
||||
; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v0, 0x7b
|
||||
; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v1, 0
|
||||
; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX1164DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1164DAGISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
|
||||
; GFX1164DAGISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX1164GISEL-LABEL: const_value_i64:
|
||||
; GFX1164GISEL: ; %bb.0: ; %entry
|
||||
; GFX1164GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
|
||||
; GFX1164GISEL-NEXT: v_mov_b32_e32 v0, 0x7b
|
||||
; GFX1164GISEL-NEXT: v_mov_b32_e32 v1, 0
|
||||
; GFX1164GISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX1164GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1164GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
|
||||
; GFX1164GISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX1132DAGISEL-LABEL: const_value_i64:
|
||||
; GFX1132DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX1132DAGISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
|
||||
; GFX1132DAGISEL-NEXT: v_mov_b32_e32 v0, 0x7b
|
||||
; GFX1132DAGISEL-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, 0
|
||||
; GFX1132DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1132DAGISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
|
||||
; GFX1132DAGISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX1132GISEL-LABEL: const_value_i64:
|
||||
; GFX1132GISEL: ; %bb.0: ; %entry
|
||||
; GFX1132GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
|
||||
; GFX1132GISEL-NEXT: v_mov_b32_e32 v0, 0x7b
|
||||
; GFX1132GISEL-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, 0
|
||||
; GFX1132GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1132GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
|
||||
; GFX1132GISEL-NEXT: s_endpgm
|
||||
entry:
|
||||
%result = call i64 @llvm.amdgcn.wave.reduce.or.i64(i64 123, i32 1)
|
||||
store i64 %result, ptr addrspace(1) %out
|
||||
ret void
|
||||
}
|
||||
|
||||
define amdgpu_kernel void @poison_value_i64(ptr addrspace(1) %out, i64 %in) {
|
||||
; GFX8DAGISEL-LABEL: poison_value_i64:
|
||||
; GFX8DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
|
||||
; GFX8DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v0, s0
|
||||
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v1, s1
|
||||
; GFX8DAGISEL-NEXT: flat_store_dwordx2 v[0:1], v[0:1]
|
||||
; GFX8DAGISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX8GISEL-LABEL: poison_value_i64:
|
||||
; GFX8GISEL: ; %bb.0: ; %entry
|
||||
; GFX8GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
|
||||
; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX8GISEL-NEXT: v_mov_b32_e32 v0, s0
|
||||
; GFX8GISEL-NEXT: v_mov_b32_e32 v1, s1
|
||||
; GFX8GISEL-NEXT: flat_store_dwordx2 v[0:1], v[0:1]
|
||||
; GFX8GISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX9DAGISEL-LABEL: poison_value_i64:
|
||||
; GFX9DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX9DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
|
||||
; GFX9DAGISEL-NEXT: v_mov_b32_e32 v0, 0
|
||||
; GFX9DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX9DAGISEL-NEXT: global_store_dwordx2 v0, v[0:1], s[0:1]
|
||||
; GFX9DAGISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX9GISEL-LABEL: poison_value_i64:
|
||||
; GFX9GISEL: ; %bb.0: ; %entry
|
||||
; GFX9GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
|
||||
; GFX9GISEL-NEXT: v_mov_b32_e32 v0, 0
|
||||
; GFX9GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX9GISEL-NEXT: global_store_dwordx2 v0, v[0:1], s[0:1]
|
||||
; GFX9GISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX10DAGISEL-LABEL: poison_value_i64:
|
||||
; GFX10DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX10DAGISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
|
||||
; GFX10DAGISEL-NEXT: v_mov_b32_e32 v0, 0
|
||||
; GFX10DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX10DAGISEL-NEXT: global_store_dwordx2 v0, v[0:1], s[0:1]
|
||||
; GFX10DAGISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX10GISEL-LABEL: poison_value_i64:
|
||||
; GFX10GISEL: ; %bb.0: ; %entry
|
||||
; GFX10GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
|
||||
; GFX10GISEL-NEXT: v_mov_b32_e32 v0, 0
|
||||
; GFX10GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX10GISEL-NEXT: global_store_dwordx2 v0, v[0:1], s[0:1]
|
||||
; GFX10GISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX11DAGISEL-LABEL: poison_value_i64:
|
||||
; GFX11DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX11DAGISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
|
||||
; GFX11DAGISEL-NEXT: v_mov_b32_e32 v0, 0
|
||||
; GFX11DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX11DAGISEL-NEXT: global_store_b64 v0, v[0:1], s[0:1]
|
||||
; GFX11DAGISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX11GISEL-LABEL: poison_value_i64:
|
||||
; GFX11GISEL: ; %bb.0: ; %entry
|
||||
; GFX11GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
|
||||
; GFX11GISEL-NEXT: v_mov_b32_e32 v0, 0
|
||||
; GFX11GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX11GISEL-NEXT: global_store_b64 v0, v[0:1], s[0:1]
|
||||
; GFX11GISEL-NEXT: s_endpgm
|
||||
entry:
|
||||
%result = call i64 @llvm.amdgcn.wave.reduce.or.i64(i64 poison, i32 1)
|
||||
store i64 %result, ptr addrspace(1) %out
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @divergent_value_i64(ptr addrspace(1) %out, i64 %id.x) {
|
||||
; GFX8DAGISEL-LABEL: divergent_value_i64:
|
||||
; GFX8DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX8DAGISEL-NEXT: s_mov_b32 s4, 0
|
||||
; GFX8DAGISEL-NEXT: s_mov_b64 s[6:7], exec
|
||||
; GFX8DAGISEL-NEXT: s_mov_b32 s5, s4
|
||||
; GFX8DAGISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1
|
||||
; GFX8DAGISEL-NEXT: s_ff1_i32_b64 s10, s[6:7]
|
||||
; GFX8DAGISEL-NEXT: v_readlane_b32 s8, v2, s10
|
||||
; GFX8DAGISEL-NEXT: v_readlane_b32 s9, v3, s10
|
||||
; GFX8DAGISEL-NEXT: s_bitset0_b64 s[6:7], s10
|
||||
; GFX8DAGISEL-NEXT: s_or_b64 s[4:5], s[4:5], s[8:9]
|
||||
; GFX8DAGISEL-NEXT: s_cmp_lg_u64 s[6:7], 0
|
||||
; GFX8DAGISEL-NEXT: s_cbranch_scc1 .LBB8_1
|
||||
; GFX8DAGISEL-NEXT: ; %bb.2:
|
||||
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v2, s4
|
||||
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v3, s5
|
||||
; GFX8DAGISEL-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
|
||||
; GFX8DAGISEL-NEXT: s_waitcnt vmcnt(0)
|
||||
; GFX8DAGISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX8GISEL-LABEL: divergent_value_i64:
|
||||
; GFX8GISEL: ; %bb.0: ; %entry
|
||||
; GFX8GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX8GISEL-NEXT: s_mov_b32 s4, 0
|
||||
; GFX8GISEL-NEXT: s_mov_b64 s[6:7], exec
|
||||
; GFX8GISEL-NEXT: s_mov_b32 s5, s4
|
||||
; GFX8GISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1
|
||||
; GFX8GISEL-NEXT: s_ff1_i32_b64 s10, s[6:7]
|
||||
; GFX8GISEL-NEXT: v_readlane_b32 s8, v2, s10
|
||||
; GFX8GISEL-NEXT: v_readlane_b32 s9, v3, s10
|
||||
; GFX8GISEL-NEXT: s_bitset0_b64 s[6:7], s10
|
||||
; GFX8GISEL-NEXT: s_or_b64 s[4:5], s[4:5], s[8:9]
|
||||
; GFX8GISEL-NEXT: s_cmp_lg_u64 s[6:7], 0
|
||||
; GFX8GISEL-NEXT: s_cbranch_scc1 .LBB8_1
|
||||
; GFX8GISEL-NEXT: ; %bb.2:
|
||||
; GFX8GISEL-NEXT: v_mov_b32_e32 v2, s4
|
||||
; GFX8GISEL-NEXT: v_mov_b32_e32 v3, s5
|
||||
; GFX8GISEL-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
|
||||
; GFX8GISEL-NEXT: s_waitcnt vmcnt(0)
|
||||
; GFX8GISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX9DAGISEL-LABEL: divergent_value_i64:
|
||||
; GFX9DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX9DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX9DAGISEL-NEXT: s_mov_b32 s4, 0
|
||||
; GFX9DAGISEL-NEXT: s_mov_b64 s[6:7], exec
|
||||
; GFX9DAGISEL-NEXT: s_mov_b32 s5, s4
|
||||
; GFX9DAGISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1
|
||||
; GFX9DAGISEL-NEXT: s_ff1_i32_b64 s10, s[6:7]
|
||||
; GFX9DAGISEL-NEXT: v_readlane_b32 s8, v2, s10
|
||||
; GFX9DAGISEL-NEXT: v_readlane_b32 s9, v3, s10
|
||||
; GFX9DAGISEL-NEXT: s_bitset0_b64 s[6:7], s10
|
||||
; GFX9DAGISEL-NEXT: s_or_b64 s[4:5], s[4:5], s[8:9]
|
||||
; GFX9DAGISEL-NEXT: s_cmp_lg_u64 s[6:7], 0
|
||||
; GFX9DAGISEL-NEXT: s_cbranch_scc1 .LBB8_1
|
||||
; GFX9DAGISEL-NEXT: ; %bb.2:
|
||||
; GFX9DAGISEL-NEXT: v_mov_b32_e32 v2, s4
|
||||
; GFX9DAGISEL-NEXT: v_mov_b32_e32 v3, s5
|
||||
; GFX9DAGISEL-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
|
||||
; GFX9DAGISEL-NEXT: s_waitcnt vmcnt(0)
|
||||
; GFX9DAGISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX9GISEL-LABEL: divergent_value_i64:
|
||||
; GFX9GISEL: ; %bb.0: ; %entry
|
||||
; GFX9GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX9GISEL-NEXT: s_mov_b32 s4, 0
|
||||
; GFX9GISEL-NEXT: s_mov_b64 s[6:7], exec
|
||||
; GFX9GISEL-NEXT: s_mov_b32 s5, s4
|
||||
; GFX9GISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1
|
||||
; GFX9GISEL-NEXT: s_ff1_i32_b64 s10, s[6:7]
|
||||
; GFX9GISEL-NEXT: v_readlane_b32 s8, v2, s10
|
||||
; GFX9GISEL-NEXT: v_readlane_b32 s9, v3, s10
|
||||
; GFX9GISEL-NEXT: s_bitset0_b64 s[6:7], s10
|
||||
; GFX9GISEL-NEXT: s_or_b64 s[4:5], s[4:5], s[8:9]
|
||||
; GFX9GISEL-NEXT: s_cmp_lg_u64 s[6:7], 0
|
||||
; GFX9GISEL-NEXT: s_cbranch_scc1 .LBB8_1
|
||||
; GFX9GISEL-NEXT: ; %bb.2:
|
||||
; GFX9GISEL-NEXT: v_mov_b32_e32 v2, s4
|
||||
; GFX9GISEL-NEXT: v_mov_b32_e32 v3, s5
|
||||
; GFX9GISEL-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
|
||||
; GFX9GISEL-NEXT: s_waitcnt vmcnt(0)
|
||||
; GFX9GISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX1064DAGISEL-LABEL: divergent_value_i64:
|
||||
; GFX1064DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX1064DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX1064DAGISEL-NEXT: s_mov_b32 s4, 0
|
||||
; GFX1064DAGISEL-NEXT: s_mov_b64 s[6:7], exec
|
||||
; GFX1064DAGISEL-NEXT: s_mov_b32 s5, s4
|
||||
; GFX1064DAGISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1
|
||||
; GFX1064DAGISEL-NEXT: s_ff1_i32_b64 s10, s[6:7]
|
||||
; GFX1064DAGISEL-NEXT: v_readlane_b32 s8, v2, s10
|
||||
; GFX1064DAGISEL-NEXT: v_readlane_b32 s9, v3, s10
|
||||
; GFX1064DAGISEL-NEXT: s_bitset0_b64 s[6:7], s10
|
||||
; GFX1064DAGISEL-NEXT: s_or_b64 s[4:5], s[4:5], s[8:9]
|
||||
; GFX1064DAGISEL-NEXT: s_cmp_lg_u64 s[6:7], 0
|
||||
; GFX1064DAGISEL-NEXT: s_cbranch_scc1 .LBB8_1
|
||||
; GFX1064DAGISEL-NEXT: ; %bb.2:
|
||||
; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v2, s4
|
||||
; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v3, s5
|
||||
; GFX1064DAGISEL-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
|
||||
; GFX1064DAGISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX1064GISEL-LABEL: divergent_value_i64:
|
||||
; GFX1064GISEL: ; %bb.0: ; %entry
|
||||
; GFX1064GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX1064GISEL-NEXT: s_mov_b32 s4, 0
|
||||
; GFX1064GISEL-NEXT: s_mov_b64 s[6:7], exec
|
||||
; GFX1064GISEL-NEXT: s_mov_b32 s5, s4
|
||||
; GFX1064GISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1
|
||||
; GFX1064GISEL-NEXT: s_ff1_i32_b64 s10, s[6:7]
|
||||
; GFX1064GISEL-NEXT: v_readlane_b32 s8, v2, s10
|
||||
; GFX1064GISEL-NEXT: v_readlane_b32 s9, v3, s10
|
||||
; GFX1064GISEL-NEXT: s_bitset0_b64 s[6:7], s10
|
||||
; GFX1064GISEL-NEXT: s_or_b64 s[4:5], s[4:5], s[8:9]
|
||||
; GFX1064GISEL-NEXT: s_cmp_lg_u64 s[6:7], 0
|
||||
; GFX1064GISEL-NEXT: s_cbranch_scc1 .LBB8_1
|
||||
; GFX1064GISEL-NEXT: ; %bb.2:
|
||||
; GFX1064GISEL-NEXT: v_mov_b32_e32 v2, s4
|
||||
; GFX1064GISEL-NEXT: v_mov_b32_e32 v3, s5
|
||||
; GFX1064GISEL-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
|
||||
; GFX1064GISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX1032DAGISEL-LABEL: divergent_value_i64:
|
||||
; GFX1032DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX1032DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX1032DAGISEL-NEXT: s_mov_b32 s4, 0
|
||||
; GFX1032DAGISEL-NEXT: s_mov_b32 s6, exec_lo
|
||||
; GFX1032DAGISEL-NEXT: s_mov_b32 s5, s4
|
||||
; GFX1032DAGISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1
|
||||
; GFX1032DAGISEL-NEXT: s_ff1_i32_b32 s7, s6
|
||||
; GFX1032DAGISEL-NEXT: v_readlane_b32 s8, v2, s7
|
||||
; GFX1032DAGISEL-NEXT: v_readlane_b32 s9, v3, s7
|
||||
; GFX1032DAGISEL-NEXT: s_bitset0_b32 s6, s7
|
||||
; GFX1032DAGISEL-NEXT: s_or_b64 s[4:5], s[4:5], s[8:9]
|
||||
; GFX1032DAGISEL-NEXT: s_cmp_lg_u32 s6, 0
|
||||
; GFX1032DAGISEL-NEXT: s_cbranch_scc1 .LBB8_1
|
||||
; GFX1032DAGISEL-NEXT: ; %bb.2:
|
||||
; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v2, s4
|
||||
; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v3, s5
|
||||
; GFX1032DAGISEL-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
|
||||
; GFX1032DAGISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX1032GISEL-LABEL: divergent_value_i64:
|
||||
; GFX1032GISEL: ; %bb.0: ; %entry
|
||||
; GFX1032GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX1032GISEL-NEXT: s_mov_b32 s4, 0
|
||||
; GFX1032GISEL-NEXT: s_mov_b32 s6, exec_lo
|
||||
; GFX1032GISEL-NEXT: s_mov_b32 s5, s4
|
||||
; GFX1032GISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1
|
||||
; GFX1032GISEL-NEXT: s_ff1_i32_b32 s7, s6
|
||||
; GFX1032GISEL-NEXT: v_readlane_b32 s8, v2, s7
|
||||
; GFX1032GISEL-NEXT: v_readlane_b32 s9, v3, s7
|
||||
; GFX1032GISEL-NEXT: s_bitset0_b32 s6, s7
|
||||
; GFX1032GISEL-NEXT: s_or_b64 s[4:5], s[4:5], s[8:9]
|
||||
; GFX1032GISEL-NEXT: s_cmp_lg_u32 s6, 0
|
||||
; GFX1032GISEL-NEXT: s_cbranch_scc1 .LBB8_1
|
||||
; GFX1032GISEL-NEXT: ; %bb.2:
|
||||
; GFX1032GISEL-NEXT: v_mov_b32_e32 v2, s4
|
||||
; GFX1032GISEL-NEXT: v_mov_b32_e32 v3, s5
|
||||
; GFX1032GISEL-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
|
||||
; GFX1032GISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX1164DAGISEL-LABEL: divergent_value_i64:
|
||||
; GFX1164DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX1164DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX1164DAGISEL-NEXT: s_mov_b32 s0, 0
|
||||
; GFX1164DAGISEL-NEXT: s_mov_b64 s[2:3], exec
|
||||
; GFX1164DAGISEL-NEXT: s_mov_b32 s1, s0
|
||||
; GFX1164DAGISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1
|
||||
; GFX1164DAGISEL-NEXT: s_ctz_i32_b64 s6, s[2:3]
|
||||
; GFX1164DAGISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
|
||||
; GFX1164DAGISEL-NEXT: v_readlane_b32 s4, v2, s6
|
||||
; GFX1164DAGISEL-NEXT: v_readlane_b32 s5, v3, s6
|
||||
; GFX1164DAGISEL-NEXT: s_bitset0_b64 s[2:3], s6
|
||||
; GFX1164DAGISEL-NEXT: s_or_b64 s[0:1], s[0:1], s[4:5]
|
||||
; GFX1164DAGISEL-NEXT: s_cmp_lg_u64 s[2:3], 0
|
||||
; GFX1164DAGISEL-NEXT: s_cbranch_scc1 .LBB8_1
|
||||
; GFX1164DAGISEL-NEXT: ; %bb.2:
|
||||
; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v3, s1
|
||||
; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v2, s0
|
||||
; GFX1164DAGISEL-NEXT: global_store_b64 v[0:1], v[2:3], off
|
||||
; GFX1164DAGISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX1164GISEL-LABEL: divergent_value_i64:
|
||||
; GFX1164GISEL: ; %bb.0: ; %entry
|
||||
; GFX1164GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX1164GISEL-NEXT: s_mov_b32 s0, 0
|
||||
; GFX1164GISEL-NEXT: s_mov_b64 s[2:3], exec
|
||||
; GFX1164GISEL-NEXT: s_mov_b32 s1, s0
|
||||
; GFX1164GISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1
|
||||
; GFX1164GISEL-NEXT: s_ctz_i32_b64 s6, s[2:3]
|
||||
; GFX1164GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
|
||||
; GFX1164GISEL-NEXT: v_readlane_b32 s4, v2, s6
|
||||
; GFX1164GISEL-NEXT: v_readlane_b32 s5, v3, s6
|
||||
; GFX1164GISEL-NEXT: s_bitset0_b64 s[2:3], s6
|
||||
; GFX1164GISEL-NEXT: s_or_b64 s[0:1], s[0:1], s[4:5]
|
||||
; GFX1164GISEL-NEXT: s_cmp_lg_u64 s[2:3], 0
|
||||
; GFX1164GISEL-NEXT: s_cbranch_scc1 .LBB8_1
|
||||
; GFX1164GISEL-NEXT: ; %bb.2:
|
||||
; GFX1164GISEL-NEXT: v_mov_b32_e32 v3, s1
|
||||
; GFX1164GISEL-NEXT: v_mov_b32_e32 v2, s0
|
||||
; GFX1164GISEL-NEXT: global_store_b64 v[0:1], v[2:3], off
|
||||
; GFX1164GISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX1132DAGISEL-LABEL: divergent_value_i64:
|
||||
; GFX1132DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX1132DAGISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX1132DAGISEL-NEXT: s_mov_b32 s0, 0
|
||||
; GFX1132DAGISEL-NEXT: s_mov_b32 s2, exec_lo
|
||||
; GFX1132DAGISEL-NEXT: s_mov_b32 s1, s0
|
||||
; GFX1132DAGISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1
|
||||
; GFX1132DAGISEL-NEXT: s_ctz_i32_b32 s3, s2
|
||||
; GFX1132DAGISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
|
||||
; GFX1132DAGISEL-NEXT: v_readlane_b32 s4, v2, s3
|
||||
; GFX1132DAGISEL-NEXT: v_readlane_b32 s5, v3, s3
|
||||
; GFX1132DAGISEL-NEXT: s_bitset0_b32 s2, s3
|
||||
; GFX1132DAGISEL-NEXT: s_or_b64 s[0:1], s[0:1], s[4:5]
|
||||
; GFX1132DAGISEL-NEXT: s_cmp_lg_u32 s2, 0
|
||||
; GFX1132DAGISEL-NEXT: s_cbranch_scc1 .LBB8_1
|
||||
; GFX1132DAGISEL-NEXT: ; %bb.2:
|
||||
; GFX1132DAGISEL-NEXT: v_dual_mov_b32 v3, s1 :: v_dual_mov_b32 v2, s0
|
||||
; GFX1132DAGISEL-NEXT: global_store_b64 v[0:1], v[2:3], off
|
||||
; GFX1132DAGISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
;
|
||||
; GFX1132GISEL-LABEL: divergent_value_i64:
|
||||
; GFX1132GISEL: ; %bb.0: ; %entry
|
||||
; GFX1132GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
|
||||
; GFX1132GISEL-NEXT: s_mov_b32 s0, 0
|
||||
; GFX1132GISEL-NEXT: s_mov_b32 s2, exec_lo
|
||||
; GFX1132GISEL-NEXT: s_mov_b32 s1, s0
|
||||
; GFX1132GISEL-NEXT: .LBB8_1: ; =>This Inner Loop Header: Depth=1
|
||||
; GFX1132GISEL-NEXT: s_ctz_i32_b32 s3, s2
|
||||
; GFX1132GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
|
||||
; GFX1132GISEL-NEXT: v_readlane_b32 s4, v2, s3
|
||||
; GFX1132GISEL-NEXT: v_readlane_b32 s5, v3, s3
|
||||
; GFX1132GISEL-NEXT: s_bitset0_b32 s2, s3
|
||||
; GFX1132GISEL-NEXT: s_or_b64 s[0:1], s[0:1], s[4:5]
|
||||
; GFX1132GISEL-NEXT: s_cmp_lg_u32 s2, 0
|
||||
; GFX1132GISEL-NEXT: s_cbranch_scc1 .LBB8_1
|
||||
; GFX1132GISEL-NEXT: ; %bb.2:
|
||||
; GFX1132GISEL-NEXT: v_dual_mov_b32 v3, s1 :: v_dual_mov_b32 v2, s0
|
||||
; GFX1132GISEL-NEXT: global_store_b64 v[0:1], v[2:3], off
|
||||
; GFX1132GISEL-NEXT: s_setpc_b64 s[30:31]
|
||||
entry:
|
||||
; %id.x = call i32 @llvm.amdgcn.workitem.id.x()
|
||||
%result = call i64 @llvm.amdgcn.wave.reduce.or.i64(i64 %id.x, i32 1)
|
||||
store i64 %result, ptr addrspace(1) %out
|
||||
ret void
|
||||
}
|
||||
|
||||
define amdgpu_kernel void @divergent_cfg_i64(ptr addrspace(1) %out, i64 %in, i64 %in2) {
|
||||
; GFX8DAGISEL-LABEL: divergent_cfg_i64:
|
||||
; GFX8DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX8DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
|
||||
; GFX8DAGISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34
|
||||
; GFX8DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
|
||||
; GFX8DAGISEL-NEXT: s_and_saveexec_b64 s[6:7], vcc
|
||||
; GFX8DAGISEL-NEXT: s_xor_b64 s[6:7], exec, s[6:7]
|
||||
; GFX8DAGISEL-NEXT: s_or_saveexec_b64 s[6:7], s[6:7]
|
||||
; GFX8DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v0, s2
|
||||
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v1, s3
|
||||
; GFX8DAGISEL-NEXT: s_xor_b64 exec, exec, s[6:7]
|
||||
; GFX8DAGISEL-NEXT: ; %bb.1: ; %if
|
||||
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v0, s4
|
||||
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v1, s5
|
||||
; GFX8DAGISEL-NEXT: ; %bb.2: ; %endif
|
||||
; GFX8DAGISEL-NEXT: s_or_b64 exec, exec, s[6:7]
|
||||
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v2, s0
|
||||
; GFX8DAGISEL-NEXT: v_mov_b32_e32 v3, s1
|
||||
; GFX8DAGISEL-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
|
||||
; GFX8DAGISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX8GISEL-LABEL: divergent_cfg_i64:
|
||||
; GFX8GISEL: ; %bb.0: ; %entry
|
||||
; GFX8GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
|
||||
; GFX8GISEL-NEXT: v_cmp_le_u32_e32 vcc, 16, v0
|
||||
; GFX8GISEL-NEXT: ; implicit-def: $sgpr6_sgpr7
|
||||
; GFX8GISEL-NEXT: s_and_saveexec_b64 s[8:9], vcc
|
||||
; GFX8GISEL-NEXT: s_xor_b64 s[8:9], exec, s[8:9]
|
||||
; GFX8GISEL-NEXT: s_cbranch_execz .LBB9_2
|
||||
; GFX8GISEL-NEXT: ; %bb.1: ; %else
|
||||
; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX8GISEL-NEXT: s_mov_b64 s[6:7], s[2:3]
|
||||
; GFX8GISEL-NEXT: .LBB9_2: ; %Flow
|
||||
; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX8GISEL-NEXT: s_andn2_saveexec_b64 s[2:3], s[8:9]
|
||||
; GFX8GISEL-NEXT: s_cbranch_execz .LBB9_4
|
||||
; GFX8GISEL-NEXT: ; %bb.3: ; %if
|
||||
; GFX8GISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34
|
||||
; GFX8GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX8GISEL-NEXT: s_mov_b64 s[6:7], s[4:5]
|
||||
; GFX8GISEL-NEXT: .LBB9_4: ; %endif
|
||||
; GFX8GISEL-NEXT: s_or_b64 exec, exec, s[2:3]
|
||||
; GFX8GISEL-NEXT: v_mov_b32_e32 v0, s6
|
||||
; GFX8GISEL-NEXT: v_mov_b32_e32 v3, s1
|
||||
; GFX8GISEL-NEXT: v_mov_b32_e32 v1, s7
|
||||
; GFX8GISEL-NEXT: v_mov_b32_e32 v2, s0
|
||||
; GFX8GISEL-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
|
||||
; GFX8GISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX9DAGISEL-LABEL: divergent_cfg_i64:
|
||||
; GFX9DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX9DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
|
||||
; GFX9DAGISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
|
||||
; GFX9DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
|
||||
; GFX9DAGISEL-NEXT: s_and_saveexec_b64 s[4:5], vcc
|
||||
; GFX9DAGISEL-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
|
||||
; GFX9DAGISEL-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
|
||||
; GFX9DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX9DAGISEL-NEXT: v_mov_b32_e32 v0, s2
|
||||
; GFX9DAGISEL-NEXT: v_mov_b32_e32 v1, s3
|
||||
; GFX9DAGISEL-NEXT: s_xor_b64 exec, exec, s[4:5]
|
||||
; GFX9DAGISEL-NEXT: ; %bb.1: ; %if
|
||||
; GFX9DAGISEL-NEXT: v_mov_b32_e32 v0, s6
|
||||
; GFX9DAGISEL-NEXT: v_mov_b32_e32 v1, s7
|
||||
; GFX9DAGISEL-NEXT: ; %bb.2: ; %endif
|
||||
; GFX9DAGISEL-NEXT: s_or_b64 exec, exec, s[4:5]
|
||||
; GFX9DAGISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX9DAGISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
|
||||
; GFX9DAGISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX9GISEL-LABEL: divergent_cfg_i64:
|
||||
; GFX9GISEL: ; %bb.0: ; %entry
|
||||
; GFX9GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
|
||||
; GFX9GISEL-NEXT: v_cmp_le_u32_e32 vcc, 16, v0
|
||||
; GFX9GISEL-NEXT: ; implicit-def: $sgpr6_sgpr7
|
||||
; GFX9GISEL-NEXT: s_and_saveexec_b64 s[8:9], vcc
|
||||
; GFX9GISEL-NEXT: s_xor_b64 s[8:9], exec, s[8:9]
|
||||
; GFX9GISEL-NEXT: s_cbranch_execz .LBB9_2
|
||||
; GFX9GISEL-NEXT: ; %bb.1: ; %else
|
||||
; GFX9GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX9GISEL-NEXT: s_mov_b64 s[6:7], s[2:3]
|
||||
; GFX9GISEL-NEXT: .LBB9_2: ; %Flow
|
||||
; GFX9GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX9GISEL-NEXT: s_andn2_saveexec_b64 s[2:3], s[8:9]
|
||||
; GFX9GISEL-NEXT: s_cbranch_execz .LBB9_4
|
||||
; GFX9GISEL-NEXT: ; %bb.3: ; %if
|
||||
; GFX9GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
|
||||
; GFX9GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX9GISEL-NEXT: s_mov_b64 s[6:7], s[6:7]
|
||||
; GFX9GISEL-NEXT: .LBB9_4: ; %endif
|
||||
; GFX9GISEL-NEXT: s_or_b64 exec, exec, s[2:3]
|
||||
; GFX9GISEL-NEXT: v_mov_b32_e32 v0, s6
|
||||
; GFX9GISEL-NEXT: v_mov_b32_e32 v1, s7
|
||||
; GFX9GISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX9GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
|
||||
; GFX9GISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX1064DAGISEL-LABEL: divergent_cfg_i64:
|
||||
; GFX1064DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX1064DAGISEL-NEXT: s_clause 0x1
|
||||
; GFX1064DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
|
||||
; GFX1064DAGISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
|
||||
; GFX1064DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc, 15, v0
|
||||
; GFX1064DAGISEL-NEXT: s_and_saveexec_b64 s[4:5], vcc
|
||||
; GFX1064DAGISEL-NEXT: s_xor_b64 s[4:5], exec, s[4:5]
|
||||
; GFX1064DAGISEL-NEXT: s_or_saveexec_b64 s[4:5], s[4:5]
|
||||
; GFX1064DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v0, s2
|
||||
; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v1, s3
|
||||
; GFX1064DAGISEL-NEXT: s_xor_b64 exec, exec, s[4:5]
|
||||
; GFX1064DAGISEL-NEXT: ; %bb.1: ; %if
|
||||
; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v0, s6
|
||||
; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v1, s7
|
||||
; GFX1064DAGISEL-NEXT: ; %bb.2: ; %endif
|
||||
; GFX1064DAGISEL-NEXT: s_or_b64 exec, exec, s[4:5]
|
||||
; GFX1064DAGISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX1064DAGISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
|
||||
; GFX1064DAGISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX1064GISEL-LABEL: divergent_cfg_i64:
|
||||
; GFX1064GISEL: ; %bb.0: ; %entry
|
||||
; GFX1064GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
|
||||
; GFX1064GISEL-NEXT: v_cmp_le_u32_e32 vcc, 16, v0
|
||||
; GFX1064GISEL-NEXT: ; implicit-def: $sgpr6_sgpr7
|
||||
; GFX1064GISEL-NEXT: s_and_saveexec_b64 s[8:9], vcc
|
||||
; GFX1064GISEL-NEXT: s_xor_b64 s[8:9], exec, s[8:9]
|
||||
; GFX1064GISEL-NEXT: s_cbranch_execz .LBB9_2
|
||||
; GFX1064GISEL-NEXT: ; %bb.1: ; %else
|
||||
; GFX1064GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1064GISEL-NEXT: s_mov_b64 s[6:7], s[2:3]
|
||||
; GFX1064GISEL-NEXT: .LBB9_2: ; %Flow
|
||||
; GFX1064GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1064GISEL-NEXT: s_andn2_saveexec_b64 s[2:3], s[8:9]
|
||||
; GFX1064GISEL-NEXT: s_cbranch_execz .LBB9_4
|
||||
; GFX1064GISEL-NEXT: ; %bb.3: ; %if
|
||||
; GFX1064GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
|
||||
; GFX1064GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1064GISEL-NEXT: s_mov_b64 s[6:7], s[6:7]
|
||||
; GFX1064GISEL-NEXT: .LBB9_4: ; %endif
|
||||
; GFX1064GISEL-NEXT: s_or_b64 exec, exec, s[2:3]
|
||||
; GFX1064GISEL-NEXT: v_mov_b32_e32 v0, s6
|
||||
; GFX1064GISEL-NEXT: v_mov_b32_e32 v1, s7
|
||||
; GFX1064GISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX1064GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
|
||||
; GFX1064GISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX1032DAGISEL-LABEL: divergent_cfg_i64:
|
||||
; GFX1032DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX1032DAGISEL-NEXT: s_clause 0x1
|
||||
; GFX1032DAGISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
|
||||
; GFX1032DAGISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
|
||||
; GFX1032DAGISEL-NEXT: v_cmp_lt_u32_e32 vcc_lo, 15, v0
|
||||
; GFX1032DAGISEL-NEXT: s_and_saveexec_b32 s4, vcc_lo
|
||||
; GFX1032DAGISEL-NEXT: s_xor_b32 s4, exec_lo, s4
|
||||
; GFX1032DAGISEL-NEXT: s_or_saveexec_b32 s4, s4
|
||||
; GFX1032DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v0, s2
|
||||
; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v1, s3
|
||||
; GFX1032DAGISEL-NEXT: s_xor_b32 exec_lo, exec_lo, s4
|
||||
; GFX1032DAGISEL-NEXT: ; %bb.1: ; %if
|
||||
; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v0, s6
|
||||
; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v1, s7
|
||||
; GFX1032DAGISEL-NEXT: ; %bb.2: ; %endif
|
||||
; GFX1032DAGISEL-NEXT: s_or_b32 exec_lo, exec_lo, s4
|
||||
; GFX1032DAGISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX1032DAGISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
|
||||
; GFX1032DAGISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX1032GISEL-LABEL: divergent_cfg_i64:
|
||||
; GFX1032GISEL: ; %bb.0: ; %entry
|
||||
; GFX1032GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
|
||||
; GFX1032GISEL-NEXT: v_cmp_le_u32_e32 vcc_lo, 16, v0
|
||||
; GFX1032GISEL-NEXT: ; implicit-def: $sgpr6_sgpr7
|
||||
; GFX1032GISEL-NEXT: s_and_saveexec_b32 s8, vcc_lo
|
||||
; GFX1032GISEL-NEXT: s_xor_b32 s8, exec_lo, s8
|
||||
; GFX1032GISEL-NEXT: s_cbranch_execz .LBB9_2
|
||||
; GFX1032GISEL-NEXT: ; %bb.1: ; %else
|
||||
; GFX1032GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1032GISEL-NEXT: s_mov_b64 s[6:7], s[2:3]
|
||||
; GFX1032GISEL-NEXT: .LBB9_2: ; %Flow
|
||||
; GFX1032GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1032GISEL-NEXT: s_andn2_saveexec_b32 s2, s8
|
||||
; GFX1032GISEL-NEXT: s_cbranch_execz .LBB9_4
|
||||
; GFX1032GISEL-NEXT: ; %bb.3: ; %if
|
||||
; GFX1032GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
|
||||
; GFX1032GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1032GISEL-NEXT: s_mov_b64 s[6:7], s[6:7]
|
||||
; GFX1032GISEL-NEXT: .LBB9_4: ; %endif
|
||||
; GFX1032GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s2
|
||||
; GFX1032GISEL-NEXT: v_mov_b32_e32 v0, s6
|
||||
; GFX1032GISEL-NEXT: v_mov_b32_e32 v1, s7
|
||||
; GFX1032GISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX1032GISEL-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
|
||||
; GFX1032GISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX1164DAGISEL-LABEL: divergent_cfg_i64:
|
||||
; GFX1164DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX1164DAGISEL-NEXT: s_clause 0x1
|
||||
; GFX1164DAGISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
|
||||
; GFX1164DAGISEL-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
|
||||
; GFX1164DAGISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
|
||||
; GFX1164DAGISEL-NEXT: s_mov_b64 s[6:7], exec
|
||||
; GFX1164DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
|
||||
; GFX1164DAGISEL-NEXT: v_cmpx_lt_u32_e32 15, v0
|
||||
; GFX1164DAGISEL-NEXT: s_xor_b64 s[6:7], exec, s[6:7]
|
||||
; GFX1164DAGISEL-NEXT: s_or_saveexec_b64 s[6:7], s[6:7]
|
||||
; GFX1164DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v0, s2
|
||||
; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v1, s3
|
||||
; GFX1164DAGISEL-NEXT: s_xor_b64 exec, exec, s[6:7]
|
||||
; GFX1164DAGISEL-NEXT: ; %bb.1: ; %if
|
||||
; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v0, s4
|
||||
; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v1, s5
|
||||
; GFX1164DAGISEL-NEXT: ; %bb.2: ; %endif
|
||||
; GFX1164DAGISEL-NEXT: s_or_b64 exec, exec, s[6:7]
|
||||
; GFX1164DAGISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX1164DAGISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
|
||||
; GFX1164DAGISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX1164GISEL-LABEL: divergent_cfg_i64:
|
||||
; GFX1164GISEL: ; %bb.0: ; %entry
|
||||
; GFX1164GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
|
||||
; GFX1164GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
|
||||
; GFX1164GISEL-NEXT: s_mov_b64 s[8:9], exec
|
||||
; GFX1164GISEL-NEXT: ; implicit-def: $sgpr6_sgpr7
|
||||
; GFX1164GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX1164GISEL-NEXT: v_cmpx_le_u32_e32 16, v0
|
||||
; GFX1164GISEL-NEXT: s_xor_b64 s[8:9], exec, s[8:9]
|
||||
; GFX1164GISEL-NEXT: s_cbranch_execz .LBB9_2
|
||||
; GFX1164GISEL-NEXT: ; %bb.1: ; %else
|
||||
; GFX1164GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1164GISEL-NEXT: s_mov_b64 s[6:7], s[2:3]
|
||||
; GFX1164GISEL-NEXT: .LBB9_2: ; %Flow
|
||||
; GFX1164GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1164GISEL-NEXT: s_and_not1_saveexec_b64 s[2:3], s[8:9]
|
||||
; GFX1164GISEL-NEXT: s_cbranch_execz .LBB9_4
|
||||
; GFX1164GISEL-NEXT: ; %bb.3: ; %if
|
||||
; GFX1164GISEL-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
|
||||
; GFX1164GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1164GISEL-NEXT: s_mov_b64 s[6:7], s[4:5]
|
||||
; GFX1164GISEL-NEXT: .LBB9_4: ; %endif
|
||||
; GFX1164GISEL-NEXT: s_or_b64 exec, exec, s[2:3]
|
||||
; GFX1164GISEL-NEXT: v_mov_b32_e32 v0, s6
|
||||
; GFX1164GISEL-NEXT: v_mov_b32_e32 v1, s7
|
||||
; GFX1164GISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX1164GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
|
||||
; GFX1164GISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX1132DAGISEL-LABEL: divergent_cfg_i64:
|
||||
; GFX1132DAGISEL: ; %bb.0: ; %entry
|
||||
; GFX1132DAGISEL-NEXT: s_clause 0x1
|
||||
; GFX1132DAGISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
|
||||
; GFX1132DAGISEL-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
|
||||
; GFX1132DAGISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
|
||||
; GFX1132DAGISEL-NEXT: s_mov_b32 s6, exec_lo
|
||||
; GFX1132DAGISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
|
||||
; GFX1132DAGISEL-NEXT: v_cmpx_lt_u32_e32 15, v0
|
||||
; GFX1132DAGISEL-NEXT: s_xor_b32 s6, exec_lo, s6
|
||||
; GFX1132DAGISEL-NEXT: s_or_saveexec_b32 s6, s6
|
||||
; GFX1132DAGISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1132DAGISEL-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
|
||||
; GFX1132DAGISEL-NEXT: s_xor_b32 exec_lo, exec_lo, s6
|
||||
; GFX1132DAGISEL-NEXT: ; %bb.1: ; %if
|
||||
; GFX1132DAGISEL-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
|
||||
; GFX1132DAGISEL-NEXT: ; %bb.2: ; %endif
|
||||
; GFX1132DAGISEL-NEXT: s_or_b32 exec_lo, exec_lo, s6
|
||||
; GFX1132DAGISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX1132DAGISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
|
||||
; GFX1132DAGISEL-NEXT: s_endpgm
|
||||
;
|
||||
; GFX1132GISEL-LABEL: divergent_cfg_i64:
|
||||
; GFX1132GISEL: ; %bb.0: ; %entry
|
||||
; GFX1132GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
|
||||
; GFX1132GISEL-NEXT: v_and_b32_e32 v0, 0x3ff, v0
|
||||
; GFX1132GISEL-NEXT: s_mov_b32 s8, exec_lo
|
||||
; GFX1132GISEL-NEXT: ; implicit-def: $sgpr6_sgpr7
|
||||
; GFX1132GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
|
||||
; GFX1132GISEL-NEXT: v_cmpx_le_u32_e32 16, v0
|
||||
; GFX1132GISEL-NEXT: s_xor_b32 s8, exec_lo, s8
|
||||
; GFX1132GISEL-NEXT: s_cbranch_execz .LBB9_2
|
||||
; GFX1132GISEL-NEXT: ; %bb.1: ; %else
|
||||
; GFX1132GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1132GISEL-NEXT: s_mov_b64 s[6:7], s[2:3]
|
||||
; GFX1132GISEL-NEXT: .LBB9_2: ; %Flow
|
||||
; GFX1132GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1132GISEL-NEXT: s_and_not1_saveexec_b32 s2, s8
|
||||
; GFX1132GISEL-NEXT: s_cbranch_execz .LBB9_4
|
||||
; GFX1132GISEL-NEXT: ; %bb.3: ; %if
|
||||
; GFX1132GISEL-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
|
||||
; GFX1132GISEL-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX1132GISEL-NEXT: s_mov_b64 s[6:7], s[4:5]
|
||||
; GFX1132GISEL-NEXT: .LBB9_4: ; %endif
|
||||
; GFX1132GISEL-NEXT: s_or_b32 exec_lo, exec_lo, s2
|
||||
; GFX1132GISEL-NEXT: v_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7
|
||||
; GFX1132GISEL-NEXT: v_mov_b32_e32 v2, 0
|
||||
; GFX1132GISEL-NEXT: global_store_b64 v2, v[0:1], s[0:1]
|
||||
; GFX1132GISEL-NEXT: s_endpgm
|
||||
entry:
|
||||
%tid = call i32 @llvm.amdgcn.workitem.id.x()
|
||||
%d_cmp = icmp ult i32 %tid, 16
|
||||
br i1 %d_cmp, label %if, label %else
|
||||
|
||||
if:
|
||||
%reducedValTid = call i64 @llvm.amdgcn.wave.reduce.or.i64(i64 %in2, i32 1)
|
||||
br label %endif
|
||||
|
||||
else:
|
||||
%reducedValIn = call i64 @llvm.amdgcn.wave.reduce.or.i64(i64 %in, i32 1)
|
||||
br label %endif
|
||||
|
||||
endif:
|
||||
%combine = phi i64 [%reducedValTid, %if], [%reducedValIn, %else]
|
||||
store i64 %combine, ptr addrspace(1) %out
|
||||
ret void
|
||||
}
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
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Reference in New Issue
Block a user