From 137a4dd84d647cdb7f0e48112cd87f87eee445e5 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper@intel.com>
Date: Wed, 21 Mar 2018 03:41:33 +0000
Subject: [PATCH] [X86] Fix the SchedRW for XOP vpcom register form
 instructions to not be marked as loads.

llvm-svn: 328071
---
 llvm/lib/Target/X86/X86InstrXOP.td    |  4 ++--
 llvm/test/CodeGen/X86/xop-schedule.ll | 16 ++++++++--------
 2 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/llvm/lib/Target/X86/X86InstrXOP.td b/llvm/lib/Target/X86/X86InstrXOP.td
index 528d3eb48bd8..fc0cd5beab25 100644
--- a/llvm/lib/Target/X86/X86InstrXOP.td
+++ b/llvm/lib/Target/X86/X86InstrXOP.td
@@ -230,7 +230,7 @@ multiclass xopvpcom<bits<8> opc, string Suffix, SDNode OpNode, ValueType vt128>
              [(set VR128:$dst,
                 (vt128 (OpNode (vt128 VR128:$src1), (vt128 VR128:$src2),
                                imm:$cc)))]>,
-             XOP_4V, Sched<[WriteVecALULd, ReadAfterLd]>;
+             XOP_4V, Sched<[WriteVecALU]>;
     def mi : IXOPi8<opc, MRMSrcMem, (outs VR128:$dst),
              (ins VR128:$src1, i128mem:$src2, XOPCC:$cc),
              !strconcat("vpcom${cc}", Suffix,
@@ -245,7 +245,7 @@ multiclass xopvpcom<bits<8> opc, string Suffix, SDNode OpNode, ValueType vt128>
                    (ins VR128:$src1, VR128:$src2, u8imm:$src3),
                    !strconcat("vpcom", Suffix,
                    "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
-                   []>, XOP_4V, Sched<[WriteVecALULd, ReadAfterLd]>;
+                   []>, XOP_4V, Sched<[WriteVecALU]>;
       let mayLoad = 1 in
       def mi_alt : IXOPi8<opc, MRMSrcMem, (outs VR128:$dst),
                    (ins VR128:$src1, i128mem:$src2, u8imm:$src3),
diff --git a/llvm/test/CodeGen/X86/xop-schedule.ll b/llvm/test/CodeGen/X86/xop-schedule.ll
index cd2239b24051..16f87b2668dc 100644
--- a/llvm/test/CodeGen/X86/xop-schedule.ll
+++ b/llvm/test/CodeGen/X86/xop-schedule.ll
@@ -147,10 +147,10 @@ define void @test_vpcom(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> *%a2) {
 ; GENERIC-LABEL: test_vpcom:
 ; GENERIC:       # %bb.0:
 ; GENERIC-NEXT:    #APP
-; GENERIC-NEXT:    vpcomb $3, %xmm1, %xmm0, %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT:    vpcomd $3, %xmm1, %xmm0, %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT:    vpcomq $3, %xmm1, %xmm0, %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT:    vpcomw $3, %xmm1, %xmm0, %xmm0 # sched: [7:1.00]
+; GENERIC-NEXT:    vpcomb $3, %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
+; GENERIC-NEXT:    vpcomd $3, %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
+; GENERIC-NEXT:    vpcomq $3, %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
+; GENERIC-NEXT:    vpcomw $3, %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
 ; GENERIC-NEXT:    vpcomb $3, (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
 ; GENERIC-NEXT:    vpcomd $3, (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
 ; GENERIC-NEXT:    vpcomq $3, (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
@@ -179,10 +179,10 @@ define void @test_vpcomu(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> *%a2) {
 ; GENERIC-LABEL: test_vpcomu:
 ; GENERIC:       # %bb.0:
 ; GENERIC-NEXT:    #APP
-; GENERIC-NEXT:    vpcomub $3, %xmm1, %xmm0, %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT:    vpcomud $3, %xmm1, %xmm0, %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT:    vpcomuq $3, %xmm1, %xmm0, %xmm0 # sched: [7:1.00]
-; GENERIC-NEXT:    vpcomuw $3, %xmm1, %xmm0, %xmm0 # sched: [7:1.00]
+; GENERIC-NEXT:    vpcomub $3, %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
+; GENERIC-NEXT:    vpcomud $3, %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
+; GENERIC-NEXT:    vpcomuq $3, %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
+; GENERIC-NEXT:    vpcomuw $3, %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
 ; GENERIC-NEXT:    vpcomub $3, (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
 ; GENERIC-NEXT:    vpcomud $3, (%rdi), %xmm0, %xmm0 # sched: [7:1.00]
 ; GENERIC-NEXT:    vpcomuq $3, (%rdi), %xmm0, %xmm0 # sched: [7:1.00]