[AMDGPU] Latency calculation must be independent of meta insts (#177052)
Debug and other meta instructions in bundles must not affect latency calculation. Ensure that code compiled with and without debug instructions is identical. --------- Signed-off-by: John Lu <John.Lu@amd.com>
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@ -644,6 +644,8 @@ void GCNSubtarget::adjustSchedDependency(
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MachineBasicBlock::const_instr_iterator E(DefI->getParent()->instr_end());
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unsigned Lat = 0;
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for (++I; I != E && I->isBundledWithPred(); ++I) {
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if (I->isMetaInstruction())
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continue;
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if (I->modifiesRegister(Reg, TRI))
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Lat = InstrInfo.getInstrLatency(getInstrItineraryData(), *I);
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else if (Lat)
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@ -657,6 +659,8 @@ void GCNSubtarget::adjustSchedDependency(
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MachineBasicBlock::const_instr_iterator E(UseI->getParent()->instr_end());
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unsigned Lat = InstrInfo.getInstrLatency(getInstrItineraryData(), *DefI);
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for (++I; I != E && I->isBundledWithPred() && Lat; ++I) {
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if (I->isMetaInstruction())
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continue;
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if (I->readsRegister(Reg, TRI))
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break;
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--Lat;
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@ -0,0 +1,44 @@
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; RUN: opt %s -strip-debug -o %t.no_debug.ll -S
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; RUN: llc -mcpu=gfx1250 < %s -filetype=obj -o %t.with_debug.o
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; RUN: llc -mcpu=gfx1250 < %t.no_debug.ll -filetype=obj -o %t.no_debug.o
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; RUN: llvm-strip %t.with_debug.o %t.no_debug.o
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; RUN: cmp %t.with_debug.o %t.no_debug.o
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; Ensure that compiling with and without debug generates identical code.
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; Test that adjustSchedDependency does not count debug instructions in bundles.
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target triple = "amdgcn-amd-amdhsa"
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define amdgpu_kernel void @_test_adjustSchedDependency(ptr addrspace(1) %AA.coerce, i64 %shiftA, i32 %lda, ptr addrspace(3) %stPtr) !dbg !4 {
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entry:
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#dbg_value(i32 0, !10, !DIExpression(), !13)
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#dbg_value(ptr addrspace(1) %AA.coerce, !14, !DIExpression(), !13)
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%add.ptr1.i = getelementptr float, ptr addrspace(1) %AA.coerce, i64 %shiftA
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%mul15.13 = mul i32 %lda, 13
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%idxprom.13 = sext i32 %mul15.13 to i64
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%arrayidx.13 = getelementptr float, ptr addrspace(1) %add.ptr1.i, i64 %idxprom.13
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%floatval = load float, ptr addrspace(1) %arrayidx.13, align 4
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%floatpair = insertelement <2 x float> zeroinitializer, float %floatval, i64 0
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store <2 x float> %floatpair, ptr addrspace(3) %stPtr, align 4
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ret void
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}
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!llvm.dbg.cu = !{!0}
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!llvm.module.flags = !{!3}
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!0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_14, file: !1, producer: "AMD clang version 22.0.0git (ssh://github-emu/AMD-Lightning-Internal/llvm-project 25425 c51a87b7a53a3e8f308402aaffa3ecbc2953305a)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !2, imports: !2, splitDebugInlining: false, nameTableKind: None)
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!1 = !DIFile(filename: "test.cpp", directory: "/tmp", checksumkind: CSK_MD5, checksum: "cc205700bf3536fe4ff21a07daf7e01d")
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!2 = !{}
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!3 = !{i32 2, !"Debug Info Version", i32 3}
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!4 = distinct !DISubprogram(name: "test_adjustSchedDependency", linkageName: "_test_adjustSchedDependency", scope: !6, file: !5, line: 142, type: !8, scopeLine: 150, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, templateParams: !2, retainedNodes: !2)
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!5 = !DIFile(filename: "kernels.hpp", directory: "/tmp")
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!6 = !DINamespace(name: "v33200", scope: !7, exportSymbols: true)
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!7 = !DINamespace(name: "solve", scope: null)
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!8 = distinct !DISubroutineType(types: !9)
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!9 = !{null}
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!10 = !DILocalVariable(name: "m", arg: 1, scope: !4, file: !5, line: 142, type: !11)
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!11 = !DIDerivedType(tag: DW_TAG_const_type, baseType: !12)
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!12 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
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!13 = !DILocation(line: 0, scope: !4)
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!14 = !DILocalVariable(name: "AA", arg: 2, scope: !4, file: !5, line: 143, type: !15)
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!15 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !16, size: 64)
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!16 = !DIBasicType(name: "float", size: 32, encoding: DW_ATE_float)
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@ -15960,24 +15960,24 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_i32_inreg(i32) #0 {
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; GFX10-NEXT: v_writelane_b32 v40, s22, 18
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; GFX10-NEXT: s_waitcnt lgkmcnt(0)
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; GFX10-NEXT: v_mov_b32_e32 v0, s52
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; GFX10-NEXT: v_mov_b32_e32 v1, s47
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; GFX10-NEXT: v_writelane_b32 v40, s23, 19
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; GFX10-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:24
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; GFX10-NEXT: v_mov_b32_e32 v0, s46
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; GFX10-NEXT: v_mov_b32_e32 v1, s47
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; GFX10-NEXT: v_mov_b32_e32 v2, s48
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; GFX10-NEXT: v_mov_b32_e32 v3, s49
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; GFX10-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:24
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; GFX10-NEXT: v_writelane_b32 v40, s24, 20
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; GFX10-NEXT: v_mov_b32_e32 v0, s46
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; GFX10-NEXT: s_mov_b32 s20, s36
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; GFX10-NEXT: s_mov_b32 s21, s37
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; GFX10-NEXT: s_mov_b32 s22, s38
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; GFX10-NEXT: s_mov_b32 s23, s39
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; GFX10-NEXT: v_writelane_b32 v40, s25, 21
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; GFX10-NEXT: s_mov_b32 s23, s39
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; GFX10-NEXT: s_mov_b32 s24, s40
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; GFX10-NEXT: s_mov_b32 s25, s41
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; GFX10-NEXT: v_mov_b32_e32 v4, s50
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; GFX10-NEXT: v_mov_b32_e32 v5, s51
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; GFX10-NEXT: v_writelane_b32 v40, s26, 22
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; GFX10-NEXT: s_mov_b32 s26, s42
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; GFX10-NEXT: v_mov_b32_e32 v5, s51
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; GFX10-NEXT: buffer_store_dword v0, off, s[0:3], s32
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; GFX10-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:4
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; GFX10-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:8
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@ -16180,27 +16180,27 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_i32_inreg(i32) #0 {
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; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s22, 18
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; GFX10-SCRATCH-NEXT: s_waitcnt lgkmcnt(0)
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; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v6, s2
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; GFX10-SCRATCH-NEXT: s_add_i32 s2, s32, 24
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; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v4, s50
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; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s23, 19
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; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v4, s50
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; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v5, s51
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; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, s46
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; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, s47
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; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v2, s48
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; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s24, 20
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; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v2, s48
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; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v3, s49
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; GFX10-SCRATCH-NEXT: s_add_i32 s2, s32, 24
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; GFX10-SCRATCH-NEXT: s_mov_b32 s20, s36
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; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s25, 21
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; GFX10-SCRATCH-NEXT: s_mov_b32 s21, s37
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; GFX10-SCRATCH-NEXT: s_mov_b32 s22, s38
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; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s25, 21
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; GFX10-SCRATCH-NEXT: s_mov_b32 s23, s39
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; GFX10-SCRATCH-NEXT: s_mov_b32 s24, s40
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; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s26, 22
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; GFX10-SCRATCH-NEXT: s_mov_b32 s25, s41
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; GFX10-SCRATCH-NEXT: s_mov_b32 s26, s42
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; GFX10-SCRATCH-NEXT: scratch_store_dword off, v6, s2
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; GFX10-SCRATCH-NEXT: scratch_store_dwordx2 off, v[4:5], s3
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; GFX10-SCRATCH-NEXT: scratch_store_dwordx4 off, v[0:3], s32
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; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s26, 22
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; GFX10-SCRATCH-NEXT: s_mov_b32 s26, s42
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; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s27, 23
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; GFX10-SCRATCH-NEXT: s_mov_b32 s27, s43
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; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s28, 24
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