[X86] isFreeToSplitVector - use a SDValue instead of SDNode argument. NFC. (#129906)
Every caller was having to call getNode() - so move that insider the helper.
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@ -4311,9 +4311,9 @@ static SDValue isUpperSubvectorUndef(SDValue V, const SDLoc &DL,
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// Helper to check if we can access all the constituent subvectors without any
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// extract ops.
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static bool isFreeToSplitVector(SDNode *N, SelectionDAG &DAG) {
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static bool isFreeToSplitVector(SDValue V, SelectionDAG &DAG) {
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SmallVector<SDValue> Ops;
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return collectConcatOps(N, Ops, DAG);
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return collectConcatOps(V.getNode(), Ops, DAG);
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}
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static std::pair<SDValue, SDValue> splitVector(SDValue Op, SelectionDAG &DAG,
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@ -18324,10 +18324,10 @@ SDValue X86TargetLowering::LowerVSELECT(SDValue Op, SelectionDAG &DAG) const {
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// TODO: Add Load splitting to isFreeToSplitVector ?
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if (EltSize < 32 && VT.is256BitVector() && !Subtarget.hasAVX2() &&
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!Subtarget.hasXOP()) {
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bool FreeCond = isFreeToSplitVector(Cond.getNode(), DAG);
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bool FreeLHS = isFreeToSplitVector(LHS.getNode(), DAG) ||
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bool FreeCond = isFreeToSplitVector(Cond, DAG);
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bool FreeLHS = isFreeToSplitVector(LHS, DAG) ||
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(ISD::isNormalLoad(LHS.getNode()) && LHS.hasOneUse());
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bool FreeRHS = isFreeToSplitVector(RHS.getNode(), DAG) ||
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bool FreeRHS = isFreeToSplitVector(RHS, DAG) ||
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(ISD::isNormalLoad(RHS.getNode()) && RHS.hasOneUse());
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if (FreeCond && (FreeLHS || FreeRHS))
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return splitVectorOp(Op, DAG, dl);
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@ -20958,7 +20958,7 @@ static SDValue matchTruncateWithPACK(unsigned &PackOpcode, EVT DstVT,
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// Prefer to lower v4i64 -> v4i32 as a shuffle unless we can cheaply
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// split this for packing.
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if (SrcVT == MVT::v4i64 && DstVT == MVT::v4i32 &&
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!isFreeToSplitVector(In.getNode(), DAG) &&
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!isFreeToSplitVector(In, DAG) &&
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(!Subtarget.hasAVX() || DAG.ComputeNumSignBits(In) != 64))
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return SDValue();
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@ -21228,7 +21228,7 @@ SDValue X86TargetLowering::LowerTRUNCATE(SDValue Op, SelectionDAG &DAG) const {
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// Attempt to truncate with PACKUS/PACKSS even on AVX512 if we'd have to
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// concat from subvectors to use VPTRUNC etc.
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if (!Subtarget.hasAVX512() || isFreeToSplitVector(In.getNode(), DAG))
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if (!Subtarget.hasAVX512() || isFreeToSplitVector(In, DAG))
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if (SDValue SignPack = LowerTruncateVecPackWithSignBits(
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VT, In, DL, Subtarget, DAG, Op->getFlags()))
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return SignPack;
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@ -25311,7 +25311,7 @@ static SDValue LowerStore(SDValue Op, const X86Subtarget &Subtarget,
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if (StoreVT.is256BitVector() ||
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((StoreVT == MVT::v32i16 || StoreVT == MVT::v64i8) &&
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!Subtarget.hasBWI())) {
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if (StoredVal.hasOneUse() && isFreeToSplitVector(StoredVal.getNode(), DAG))
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if (StoredVal.hasOneUse() && isFreeToSplitVector(StoredVal, DAG))
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return splitVectorStore(St, DAG);
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return SDValue();
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}
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@ -46930,8 +46930,7 @@ static SDValue narrowVectorSelect(SDNode *N, SelectionDAG &DAG, const SDLoc &DL,
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SDValue TVal = N->getOperand(1);
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SDValue FVal = N->getOperand(2);
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if (!TVal.hasOneUse() || !FVal.hasOneUse() ||
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!isFreeToSplitVector(TVal.getNode(), DAG) ||
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!isFreeToSplitVector(FVal.getNode(), DAG))
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!isFreeToSplitVector(TVal, DAG) || !isFreeToSplitVector(FVal, DAG))
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return SDValue();
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auto makeBlend = [Opcode](SelectionDAG &DAG, const SDLoc &DL,
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@ -58710,7 +58709,7 @@ static SDValue narrowExtractedVectorSelect(SDNode *Ext, const SDLoc &DL,
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SelectionDAG &DAG) {
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SDValue Sel = Ext->getOperand(0);
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if (Sel.getOpcode() != ISD::VSELECT ||
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!isFreeToSplitVector(Sel.getOperand(0).getNode(), DAG))
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!isFreeToSplitVector(Sel.getOperand(0), DAG))
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return SDValue();
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// Note: We assume simple value types because this should only be called with
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