[X86][NFC] Add sitofp and fptosi tests for x87 mode (#136860)
Add SDAG and GlobalISel runs as precommit testcases for sitofp and fptosi in x87 mode.
This commit is contained in:
Pawan Nirpal
GitHub
parent
63a2b0bd3d
commit
1ff931ea5b
423
llvm/test/CodeGen/X86/isel-fp-to-sint-x87.ll
Normal file
423
llvm/test/CodeGen/X86/isel-fp-to-sint-x87.ll
Normal file
@ -0,0 +1,423 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; NOTE: Fast Isel is not added because it does not support x87 stores.
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse,-sse2 -global-isel=0 | FileCheck %s --check-prefixes X64,SDAG-X64
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse,-sse2 -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes X64,GISEL-X64
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; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse,-sse2 -global-isel=0 | FileCheck %s --check-prefixes X86,SDAG-X86
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; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse,-sse2 -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes X86,GISEL-X86
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define i8 @test_float_to_int8(float %input) nounwind {
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; X64-LABEL: test_float_to_int8:
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; X64: # %bb.0: # %entry
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; X64-NEXT: flds {{[0-9]+}}(%rsp)
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; X64-NEXT: fnstcw -{{[0-9]+}}(%rsp)
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; X64-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
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; X64-NEXT: orl $3072, %eax # imm = 0xC00
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; X64-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
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; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
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; X64-NEXT: fistps -{{[0-9]+}}(%rsp)
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; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
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; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
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; X64-NEXT: retq
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;
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; X86-LABEL: test_float_to_int8:
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; X86: # %bb.0: # %entry
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; X86-NEXT: subl $8, %esp
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; X86-NEXT: flds {{[0-9]+}}(%esp)
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; X86-NEXT: fnstcw {{[0-9]+}}(%esp)
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: orl $3072, %eax # imm = 0xC00
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; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
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; X86-NEXT: fldcw {{[0-9]+}}(%esp)
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; X86-NEXT: fistps {{[0-9]+}}(%esp)
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; X86-NEXT: fldcw {{[0-9]+}}(%esp)
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; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: addl $8, %esp
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; X86-NEXT: retl
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entry:
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%conv = fptosi float %input to i8
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ret i8 %conv
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}
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define i8 @test_longdouble_to_int8(x86_fp80 %input) nounwind {
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; X64-LABEL: test_longdouble_to_int8:
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; X64: # %bb.0: # %entry
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; X64-NEXT: fldt {{[0-9]+}}(%rsp)
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; X64-NEXT: fnstcw -{{[0-9]+}}(%rsp)
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; X64-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
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; X64-NEXT: orl $3072, %eax # imm = 0xC00
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; X64-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
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; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
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; X64-NEXT: fistps -{{[0-9]+}}(%rsp)
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; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
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; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
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; X64-NEXT: retq
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;
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; X86-LABEL: test_longdouble_to_int8:
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; X86: # %bb.0: # %entry
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; X86-NEXT: subl $8, %esp
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; X86-NEXT: fldt {{[0-9]+}}(%esp)
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; X86-NEXT: fnstcw {{[0-9]+}}(%esp)
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: orl $3072, %eax # imm = 0xC00
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; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
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; X86-NEXT: fldcw {{[0-9]+}}(%esp)
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; X86-NEXT: fistps {{[0-9]+}}(%esp)
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; X86-NEXT: fldcw {{[0-9]+}}(%esp)
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; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: addl $8, %esp
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; X86-NEXT: retl
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entry:
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%conv = fptosi x86_fp80 %input to i8
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ret i8 %conv
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}
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define i16 @test_float_to_int16(float %input) nounwind {
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; X64-LABEL: test_float_to_int16:
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; X64: # %bb.0: # %entry
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; X64-NEXT: flds {{[0-9]+}}(%rsp)
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; X64-NEXT: fnstcw -{{[0-9]+}}(%rsp)
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; X64-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
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; X64-NEXT: orl $3072, %eax # imm = 0xC00
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; X64-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
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; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
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; X64-NEXT: fistps -{{[0-9]+}}(%rsp)
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; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
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; X64-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
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; X64-NEXT: retq
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;
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; X86-LABEL: test_float_to_int16:
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; X86: # %bb.0: # %entry
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; X86-NEXT: subl $8, %esp
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; X86-NEXT: flds {{[0-9]+}}(%esp)
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; X86-NEXT: fnstcw {{[0-9]+}}(%esp)
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: orl $3072, %eax # imm = 0xC00
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; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
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; X86-NEXT: fldcw {{[0-9]+}}(%esp)
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; X86-NEXT: fistps {{[0-9]+}}(%esp)
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; X86-NEXT: fldcw {{[0-9]+}}(%esp)
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: addl $8, %esp
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; X86-NEXT: retl
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entry:
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%conv = fptosi float %input to i16
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ret i16 %conv
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}
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define i16 @test_longdouble_to_int16(x86_fp80 %input) nounwind {
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; X64-LABEL: test_longdouble_to_int16:
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; X64: # %bb.0: # %entry
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; X64-NEXT: fldt {{[0-9]+}}(%rsp)
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; X64-NEXT: fnstcw -{{[0-9]+}}(%rsp)
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; X64-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
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; X64-NEXT: orl $3072, %eax # imm = 0xC00
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; X64-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
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; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
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; X64-NEXT: fistps -{{[0-9]+}}(%rsp)
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; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
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; X64-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
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; X64-NEXT: retq
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;
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; X86-LABEL: test_longdouble_to_int16:
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; X86: # %bb.0: # %entry
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; X86-NEXT: subl $8, %esp
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; X86-NEXT: fldt {{[0-9]+}}(%esp)
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; X86-NEXT: fnstcw {{[0-9]+}}(%esp)
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: orl $3072, %eax # imm = 0xC00
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; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
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; X86-NEXT: fldcw {{[0-9]+}}(%esp)
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; X86-NEXT: fistps {{[0-9]+}}(%esp)
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; X86-NEXT: fldcw {{[0-9]+}}(%esp)
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: addl $8, %esp
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; X86-NEXT: retl
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entry:
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%conv = fptosi x86_fp80 %input to i16
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ret i16 %conv
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}
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define i32 @test_float_to_int32(float %input) nounwind {
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; X64-LABEL: test_float_to_int32:
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; X64: # %bb.0: # %entry
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; X64-NEXT: flds {{[0-9]+}}(%rsp)
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; X64-NEXT: fnstcw -{{[0-9]+}}(%rsp)
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; X64-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
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; X64-NEXT: orl $3072, %eax # imm = 0xC00
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; X64-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
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; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
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; X64-NEXT: fistpl -{{[0-9]+}}(%rsp)
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; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
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; X64-NEXT: movl -{{[0-9]+}}(%rsp), %eax
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; X64-NEXT: retq
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;
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; X86-LABEL: test_float_to_int32:
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; X86: # %bb.0: # %entry
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; X86-NEXT: subl $8, %esp
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; X86-NEXT: flds {{[0-9]+}}(%esp)
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; X86-NEXT: fnstcw (%esp)
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; X86-NEXT: movzwl (%esp), %eax
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; X86-NEXT: orl $3072, %eax # imm = 0xC00
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; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
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; X86-NEXT: fldcw {{[0-9]+}}(%esp)
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; X86-NEXT: fistpl {{[0-9]+}}(%esp)
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; X86-NEXT: fldcw (%esp)
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: addl $8, %esp
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; X86-NEXT: retl
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entry:
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%conv = fptosi float %input to i32
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ret i32 %conv
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}
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define i32 @test_longdouble_to_int32(x86_fp80 %input) nounwind {
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; X64-LABEL: test_longdouble_to_int32:
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; X64: # %bb.0: # %entry
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; X64-NEXT: fldt {{[0-9]+}}(%rsp)
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; X64-NEXT: fnstcw -{{[0-9]+}}(%rsp)
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; X64-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
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; X64-NEXT: orl $3072, %eax # imm = 0xC00
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; X64-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
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; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
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; X64-NEXT: fistpl -{{[0-9]+}}(%rsp)
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; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
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; X64-NEXT: movl -{{[0-9]+}}(%rsp), %eax
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; X64-NEXT: retq
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;
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; X86-LABEL: test_longdouble_to_int32:
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; X86: # %bb.0: # %entry
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; X86-NEXT: subl $8, %esp
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; X86-NEXT: fldt {{[0-9]+}}(%esp)
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; X86-NEXT: fnstcw (%esp)
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; X86-NEXT: movzwl (%esp), %eax
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; X86-NEXT: orl $3072, %eax # imm = 0xC00
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; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
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; X86-NEXT: fldcw {{[0-9]+}}(%esp)
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; X86-NEXT: fistpl {{[0-9]+}}(%esp)
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; X86-NEXT: fldcw (%esp)
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: addl $8, %esp
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; X86-NEXT: retl
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entry:
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%conv = fptosi x86_fp80 %input to i32
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ret i32 %conv
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}
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define i64 @test_float_to_int64(float %input) nounwind {
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; X64-LABEL: test_float_to_int64:
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; X64: # %bb.0: # %entry
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; X64-NEXT: flds {{[0-9]+}}(%rsp)
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; X64-NEXT: fnstcw -{{[0-9]+}}(%rsp)
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; X64-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
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; X64-NEXT: orl $3072, %eax # imm = 0xC00
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; X64-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
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; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
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; X64-NEXT: fistpll -{{[0-9]+}}(%rsp)
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; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
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; X64-NEXT: movq -{{[0-9]+}}(%rsp), %rax
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; X64-NEXT: retq
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;
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; X86-LABEL: test_float_to_int64:
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; X86: # %bb.0: # %entry
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; X86-NEXT: pushl %ebp
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; X86-NEXT: movl %esp, %ebp
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; X86-NEXT: andl $-8, %esp
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; X86-NEXT: subl $16, %esp
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; X86-NEXT: flds 8(%ebp)
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; X86-NEXT: fnstcw {{[0-9]+}}(%esp)
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: orl $3072, %eax # imm = 0xC00
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; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
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; X86-NEXT: fldcw {{[0-9]+}}(%esp)
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; X86-NEXT: fistpll {{[0-9]+}}(%esp)
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; X86-NEXT: fldcw {{[0-9]+}}(%esp)
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movl %ebp, %esp
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; X86-NEXT: popl %ebp
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; X86-NEXT: retl
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entry:
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%conv = fptosi float %input to i64
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ret i64 %conv
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}
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define i64 @test_longdouble_to_int64(x86_fp80 %input) nounwind {
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; X64-LABEL: test_longdouble_to_int64:
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; X64: # %bb.0: # %entry
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; X64-NEXT: fldt {{[0-9]+}}(%rsp)
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; X64-NEXT: fnstcw -{{[0-9]+}}(%rsp)
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; X64-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
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; X64-NEXT: orl $3072, %eax # imm = 0xC00
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; X64-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
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; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
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; X64-NEXT: fistpll -{{[0-9]+}}(%rsp)
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; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
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; X64-NEXT: movq -{{[0-9]+}}(%rsp), %rax
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; X64-NEXT: retq
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;
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; X86-LABEL: test_longdouble_to_int64:
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; X86: # %bb.0: # %entry
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; X86-NEXT: pushl %ebp
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; X86-NEXT: movl %esp, %ebp
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; X86-NEXT: andl $-8, %esp
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; X86-NEXT: subl $16, %esp
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; X86-NEXT: fldt 8(%ebp)
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; X86-NEXT: fnstcw {{[0-9]+}}(%esp)
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: orl $3072, %eax # imm = 0xC00
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; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
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; X86-NEXT: fldcw {{[0-9]+}}(%esp)
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; X86-NEXT: fistpll {{[0-9]+}}(%esp)
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; X86-NEXT: fldcw {{[0-9]+}}(%esp)
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movl %ebp, %esp
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; X86-NEXT: popl %ebp
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; X86-NEXT: retl
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entry:
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%conv = fptosi x86_fp80 %input to i64
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ret i64 %conv
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}
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define i8 @test_double_to_int8(double %input) nounwind {
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; X64-LABEL: test_double_to_int8:
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; X64: # %bb.0: # %entry
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; X64-NEXT: fldl {{[0-9]+}}(%rsp)
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; X64-NEXT: fnstcw -{{[0-9]+}}(%rsp)
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; X64-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
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; X64-NEXT: orl $3072, %eax # imm = 0xC00
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; X64-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
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; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
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; X64-NEXT: fistps -{{[0-9]+}}(%rsp)
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; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
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; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
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; X64-NEXT: retq
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;
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; X86-LABEL: test_double_to_int8:
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; X86: # %bb.0: # %entry
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; X86-NEXT: subl $8, %esp
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; X86-NEXT: fldl {{[0-9]+}}(%esp)
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; X86-NEXT: fnstcw {{[0-9]+}}(%esp)
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: orl $3072, %eax # imm = 0xC00
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; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
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; X86-NEXT: fldcw {{[0-9]+}}(%esp)
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; X86-NEXT: fistps {{[0-9]+}}(%esp)
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; X86-NEXT: fldcw {{[0-9]+}}(%esp)
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; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: addl $8, %esp
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; X86-NEXT: retl
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entry:
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%conv = fptosi double %input to i8
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ret i8 %conv
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}
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define i16 @test_double_to_int16(double %input) nounwind {
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; X64-LABEL: test_double_to_int16:
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; X64: # %bb.0: # %entry
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; X64-NEXT: fldl {{[0-9]+}}(%rsp)
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; X64-NEXT: fnstcw -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
|
||||
; X64-NEXT: orl $3072, %eax # imm = 0xC00
|
||||
; X64-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: fistps -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
|
||||
; X64-NEXT: retq
|
||||
;
|
||||
; X86-LABEL: test_double_to_int16:
|
||||
; X86: # %bb.0: # %entry
|
||||
; X86-NEXT: subl $8, %esp
|
||||
; X86-NEXT: fldl {{[0-9]+}}(%esp)
|
||||
; X86-NEXT: fnstcw {{[0-9]+}}(%esp)
|
||||
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
|
||||
; X86-NEXT: orl $3072, %eax # imm = 0xC00
|
||||
; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
|
||||
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
|
||||
; X86-NEXT: fistps {{[0-9]+}}(%esp)
|
||||
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
|
||||
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
|
||||
; X86-NEXT: addl $8, %esp
|
||||
; X86-NEXT: retl
|
||||
entry:
|
||||
%conv = fptosi double %input to i16
|
||||
ret i16 %conv
|
||||
}
|
||||
|
||||
define i32 @test_double_to_int32(double %input) nounwind {
|
||||
; X64-LABEL: test_double_to_int32:
|
||||
; X64: # %bb.0: # %entry
|
||||
; X64-NEXT: fldl {{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: fnstcw -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
|
||||
; X64-NEXT: orl $3072, %eax # imm = 0xC00
|
||||
; X64-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: fistpl -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: movl -{{[0-9]+}}(%rsp), %eax
|
||||
; X64-NEXT: retq
|
||||
;
|
||||
; X86-LABEL: test_double_to_int32:
|
||||
; X86: # %bb.0: # %entry
|
||||
; X86-NEXT: subl $8, %esp
|
||||
; X86-NEXT: fldl {{[0-9]+}}(%esp)
|
||||
; X86-NEXT: fnstcw (%esp)
|
||||
; X86-NEXT: movzwl (%esp), %eax
|
||||
; X86-NEXT: orl $3072, %eax # imm = 0xC00
|
||||
; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
|
||||
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
|
||||
; X86-NEXT: fistpl {{[0-9]+}}(%esp)
|
||||
; X86-NEXT: fldcw (%esp)
|
||||
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; X86-NEXT: addl $8, %esp
|
||||
; X86-NEXT: retl
|
||||
entry:
|
||||
%conv = fptosi double %input to i32
|
||||
ret i32 %conv
|
||||
}
|
||||
|
||||
define i64 @test_double_to_int64(double %input) nounwind {
|
||||
; X64-LABEL: test_double_to_int64:
|
||||
; X64: # %bb.0: # %entry
|
||||
; X64-NEXT: fldl {{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: fnstcw -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: movzwl -{{[0-9]+}}(%rsp), %eax
|
||||
; X64-NEXT: orl $3072, %eax # imm = 0xC00
|
||||
; X64-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: fistpll -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: fldcw -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: movq -{{[0-9]+}}(%rsp), %rax
|
||||
; X64-NEXT: retq
|
||||
;
|
||||
; X86-LABEL: test_double_to_int64:
|
||||
; X86: # %bb.0: # %entry
|
||||
; X86-NEXT: pushl %ebp
|
||||
; X86-NEXT: movl %esp, %ebp
|
||||
; X86-NEXT: andl $-8, %esp
|
||||
; X86-NEXT: subl $16, %esp
|
||||
; X86-NEXT: fldl 8(%ebp)
|
||||
; X86-NEXT: fnstcw {{[0-9]+}}(%esp)
|
||||
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
|
||||
; X86-NEXT: orl $3072, %eax # imm = 0xC00
|
||||
; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
|
||||
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
|
||||
; X86-NEXT: fistpll {{[0-9]+}}(%esp)
|
||||
; X86-NEXT: fldcw {{[0-9]+}}(%esp)
|
||||
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
|
||||
; X86-NEXT: movl %ebp, %esp
|
||||
; X86-NEXT: popl %ebp
|
||||
; X86-NEXT: retl
|
||||
entry:
|
||||
%conv = fptosi double %input to i64
|
||||
ret i64 %conv
|
||||
}
|
||||
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
|
||||
; GISEL-X86: {{.*}}
|
||||
; GISEL-X64: {{.*}}
|
||||
; SDAG-X86: {{.*}}
|
||||
; SDAG-X64: {{.*}}
|
||||
272
llvm/test/CodeGen/X86/isel-sint-to-fp-x87.ll
Normal file
272
llvm/test/CodeGen/X86/isel-sint-to-fp-x87.ll
Normal file
@ -0,0 +1,272 @@
|
||||
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
|
||||
; NOTE: Fast Isel is not added because it does not support x87 stores.
|
||||
|
||||
; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse,-sse2 -global-isel=0 | FileCheck %s --check-prefixes X64,SDAG-X64
|
||||
; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse,-sse2 -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes X64,GISEL-X64
|
||||
; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse,-sse2 -global-isel=0 | FileCheck %s --check-prefixes X86,SDAG-X86
|
||||
; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse,-sse2 -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes X86,GISEL-X86
|
||||
|
||||
define void @test_int8_to_float(i8 %x, ptr %p) nounwind {
|
||||
; X64-LABEL: test_int8_to_float:
|
||||
; X64: # %bb.0: # %entry
|
||||
; X64-NEXT: movsbl %dil, %eax
|
||||
; X64-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: filds -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: fstps (%rsi)
|
||||
; X64-NEXT: retq
|
||||
;
|
||||
; X86-LABEL: test_int8_to_float:
|
||||
; X86: # %bb.0: # %entry
|
||||
; X86-NEXT: pushl %eax
|
||||
; X86-NEXT: movsbl {{[0-9]+}}(%esp), %eax
|
||||
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
||||
; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
|
||||
; X86-NEXT: filds {{[0-9]+}}(%esp)
|
||||
; X86-NEXT: fstps (%ecx)
|
||||
; X86-NEXT: popl %eax
|
||||
; X86-NEXT: retl
|
||||
entry:
|
||||
%conv = sitofp i8 %x to float
|
||||
store float %conv, ptr %p, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @test_int16_to_float(i16 %x, ptr %p) nounwind {
|
||||
; X64-LABEL: test_int16_to_float:
|
||||
; X64: # %bb.0: # %entry
|
||||
; X64-NEXT: movw %di, -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: filds -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: fstps (%rsi)
|
||||
; X64-NEXT: retq
|
||||
;
|
||||
; X86-LABEL: test_int16_to_float:
|
||||
; X86: # %bb.0: # %entry
|
||||
; X86-NEXT: pushl %eax
|
||||
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
|
||||
; X86-NEXT: movw %cx, {{[0-9]+}}(%esp)
|
||||
; X86-NEXT: filds {{[0-9]+}}(%esp)
|
||||
; X86-NEXT: fstps (%eax)
|
||||
; X86-NEXT: popl %eax
|
||||
; X86-NEXT: retl
|
||||
entry:
|
||||
%conv = sitofp i16 %x to float
|
||||
store float %conv, ptr %p, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @test_int32_to_float(i32 %x, ptr %p) nounwind {
|
||||
; X64-LABEL: test_int32_to_float:
|
||||
; X64: # %bb.0: # %entry
|
||||
; X64-NEXT: movl %edi, -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: fildl -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: fstps (%rsi)
|
||||
; X64-NEXT: retq
|
||||
;
|
||||
; X86-LABEL: test_int32_to_float:
|
||||
; X86: # %bb.0: # %entry
|
||||
; X86-NEXT: pushl %eax
|
||||
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
||||
; X86-NEXT: movl %ecx, (%esp)
|
||||
; X86-NEXT: fildl (%esp)
|
||||
; X86-NEXT: fstps (%eax)
|
||||
; X86-NEXT: popl %eax
|
||||
; X86-NEXT: retl
|
||||
entry:
|
||||
%conv = sitofp i32 %x to float
|
||||
store float %conv, ptr %p, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @test_int64_to_float(i64 %x, ptr %p) nounwind {
|
||||
; X64-LABEL: test_int64_to_float:
|
||||
; X64: # %bb.0: # %entry
|
||||
; X64-NEXT: movq %rdi, -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: fildll -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: fstps (%rsi)
|
||||
; X64-NEXT: retq
|
||||
;
|
||||
; X86-LABEL: test_int64_to_float:
|
||||
; X86: # %bb.0: # %entry
|
||||
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; X86-NEXT: fildll {{[0-9]+}}(%esp)
|
||||
; X86-NEXT: fstps (%eax)
|
||||
; X86-NEXT: retl
|
||||
entry:
|
||||
%conv = sitofp i64 %x to float
|
||||
store float %conv, ptr %p, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
define x86_fp80 @test_int8to_longdouble(i8 %a) nounwind {
|
||||
; X64-LABEL: test_int8to_longdouble:
|
||||
; X64: # %bb.0:
|
||||
; X64-NEXT: movsbl %dil, %eax
|
||||
; X64-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: filds -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: retq
|
||||
;
|
||||
; X86-LABEL: test_int8to_longdouble:
|
||||
; X86: # %bb.0:
|
||||
; X86-NEXT: pushl %eax
|
||||
; X86-NEXT: movsbl {{[0-9]+}}(%esp), %eax
|
||||
; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
|
||||
; X86-NEXT: filds {{[0-9]+}}(%esp)
|
||||
; X86-NEXT: popl %eax
|
||||
; X86-NEXT: retl
|
||||
%conv = sitofp i8 %a to x86_fp80
|
||||
ret x86_fp80 %conv
|
||||
}
|
||||
|
||||
define x86_fp80 @test_int16_to_longdouble(i16 %a) nounwind {
|
||||
; X64-LABEL: test_int16_to_longdouble:
|
||||
; X64: # %bb.0:
|
||||
; X64-NEXT: movw %di, -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: filds -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: retq
|
||||
;
|
||||
; X86-LABEL: test_int16_to_longdouble:
|
||||
; X86: # %bb.0:
|
||||
; X86-NEXT: pushl %eax
|
||||
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
|
||||
; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
|
||||
; X86-NEXT: filds {{[0-9]+}}(%esp)
|
||||
; X86-NEXT: popl %eax
|
||||
; X86-NEXT: retl
|
||||
%conv = sitofp i16 %a to x86_fp80
|
||||
ret x86_fp80 %conv
|
||||
}
|
||||
|
||||
define x86_fp80 @test_int32_to_longdouble(i32 %a) nounwind {
|
||||
; X64-LABEL: test_int32_to_longdouble:
|
||||
; X64: # %bb.0:
|
||||
; X64-NEXT: movl %edi, -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: fildl -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: retq
|
||||
;
|
||||
; X86-LABEL: test_int32_to_longdouble:
|
||||
; X86: # %bb.0:
|
||||
; X86-NEXT: pushl %eax
|
||||
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; X86-NEXT: movl %eax, (%esp)
|
||||
; X86-NEXT: fildl (%esp)
|
||||
; X86-NEXT: popl %eax
|
||||
; X86-NEXT: retl
|
||||
%conv = sitofp i32 %a to x86_fp80
|
||||
ret x86_fp80 %conv
|
||||
}
|
||||
|
||||
define x86_fp80 @test_int64_to_longdouble(i64 %a, ptr %p) nounwind {
|
||||
; X64-LABEL: test_int64_to_longdouble:
|
||||
; X64: # %bb.0:
|
||||
; X64-NEXT: movq %rdi, -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: fildll -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: retq
|
||||
;
|
||||
; X86-LABEL: test_int64_to_longdouble:
|
||||
; X86: # %bb.0:
|
||||
; X86-NEXT: fildll {{[0-9]+}}(%esp)
|
||||
; X86-NEXT: retl
|
||||
%conv = sitofp i64 %a to x86_fp80
|
||||
ret x86_fp80 %conv
|
||||
}
|
||||
|
||||
|
||||
define void @test_int8to_double(i8 %x, ptr %p) nounwind {
|
||||
; X64-LABEL: test_int8to_double:
|
||||
; X64: # %bb.0: # %entry
|
||||
; X64-NEXT: movsbl %dil, %eax
|
||||
; X64-NEXT: movw %ax, -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: filds -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: fstpl (%rsi)
|
||||
; X64-NEXT: retq
|
||||
;
|
||||
; X86-LABEL: test_int8to_double:
|
||||
; X86: # %bb.0: # %entry
|
||||
; X86-NEXT: pushl %eax
|
||||
; X86-NEXT: movsbl {{[0-9]+}}(%esp), %eax
|
||||
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
||||
; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
|
||||
; X86-NEXT: filds {{[0-9]+}}(%esp)
|
||||
; X86-NEXT: fstpl (%ecx)
|
||||
; X86-NEXT: popl %eax
|
||||
; X86-NEXT: retl
|
||||
entry:
|
||||
%conv = sitofp i8 %x to double
|
||||
store double %conv, ptr %p, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @test_int16_to_double(i16 %x, ptr %p) nounwind {
|
||||
; X64-LABEL: test_int16_to_double:
|
||||
; X64: # %bb.0: # %entry
|
||||
; X64-NEXT: movw %di, -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: filds -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: fstpl (%rsi)
|
||||
; X64-NEXT: retq
|
||||
;
|
||||
; X86-LABEL: test_int16_to_double:
|
||||
; X86: # %bb.0: # %entry
|
||||
; X86-NEXT: pushl %eax
|
||||
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
|
||||
; X86-NEXT: movw %cx, {{[0-9]+}}(%esp)
|
||||
; X86-NEXT: filds {{[0-9]+}}(%esp)
|
||||
; X86-NEXT: fstpl (%eax)
|
||||
; X86-NEXT: popl %eax
|
||||
; X86-NEXT: retl
|
||||
entry:
|
||||
%conv = sitofp i16 %x to double
|
||||
store double %conv, ptr %p, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @test_int32_to_double(i32 %x, ptr %p) nounwind {
|
||||
; X64-LABEL: test_int32_to_double:
|
||||
; X64: # %bb.0: # %entry
|
||||
; X64-NEXT: movl %edi, -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: fildl -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: fstpl (%rsi)
|
||||
; X64-NEXT: retq
|
||||
;
|
||||
; X86-LABEL: test_int32_to_double:
|
||||
; X86: # %bb.0: # %entry
|
||||
; X86-NEXT: pushl %eax
|
||||
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
||||
; X86-NEXT: movl %ecx, (%esp)
|
||||
; X86-NEXT: fildl (%esp)
|
||||
; X86-NEXT: fstpl (%eax)
|
||||
; X86-NEXT: popl %eax
|
||||
; X86-NEXT: retl
|
||||
entry:
|
||||
%conv = sitofp i32 %x to double
|
||||
store double %conv, ptr %p, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @test_int64_to_double(i64 %x, ptr %p) nounwind {
|
||||
; X64-LABEL: test_int64_to_double:
|
||||
; X64: # %bb.0: # %entry
|
||||
; X64-NEXT: movq %rdi, -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: fildll -{{[0-9]+}}(%rsp)
|
||||
; X64-NEXT: fstpl (%rsi)
|
||||
; X64-NEXT: retq
|
||||
;
|
||||
; X86-LABEL: test_int64_to_double:
|
||||
; X86: # %bb.0: # %entry
|
||||
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; X86-NEXT: fildll {{[0-9]+}}(%esp)
|
||||
; X86-NEXT: fstpl (%eax)
|
||||
; X86-NEXT: retl
|
||||
entry:
|
||||
%conv = sitofp i64 %x to double
|
||||
store double %conv, ptr %p, align 4
|
||||
ret void
|
||||
}
|
||||
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
|
||||
; GISEL-X86: {{.*}}
|
||||
; GISEL-X64: {{.*}}
|
||||
; SDAG-X86: {{.*}}
|
||||
; SDAG-X64: {{.*}}
|
||||
Loading…
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Reference in New Issue
Block a user