[AArch64] Add support for C1 CPUs (#171124)
This patch adds initial support for the Arm v9.3 C1 processors: * C1-Nano * C1-Pro * C1-Premium * C1-Ultra For more information on each, see: https://developer.arm.com/Processors/C1-Nano https://developer.arm.com/Processors/C1-Pro https://developer.arm.com/Processors/C1-Premium https://developer.arm.com/Processors/C1-Ultra Technical Reference Manual for C1-Nano: https://developer.arm.com/documentation/107753/latest/ Technical Reference Manual for C1-Pro: https://developer.arm.com/documentation/107771/latest/ Technical Reference Manual for C1-Premium: https://developer.arm.com/documentation/109416/latest/ Technical Reference Manual for C1-Ultra: https://developer.arm.com/documentation/108014/latest/
This commit is contained in:
dcandler
GitHub
parent
2f9ed9d582
commit
23f967ada0
@ -660,6 +660,11 @@ X86 Support
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Arm and AArch64 Support
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^^^^^^^^^^^^^^^^^^^^^^^
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- Support has been added for the following processors (command-line identifiers in parentheses):
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- Arm C1-Nano (``c1-nano``)
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- Arm C1-Pro (``c1-pro``)
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- Arm C1-Premium (``c1-premium``)
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- Arm C1-Ultra (``c1-ultra``)
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- More intrinsics for the following AArch64 instructions:
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FCVTZ[US], FCVTN[US], FCVTM[US], FCVTP[US], FCVTA[US]
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@ -84,6 +84,14 @@
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// CORTEX-A520: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "cortex-a520"
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// RUN: %clang --target=aarch64 -mcpu=cortex-a520ae -### -c %s 2>&1 | FileCheck -check-prefix=CORTEX-A520AE %s
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// CORTEX-A520AE: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "cortex-a520ae"
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// RUN: %clang --target=aarch64 -mcpu=c1-nano -### -c %s 2>&1 | FileCheck -check-prefix=C1-NANO %s
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// C1-NANO: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "c1-nano"
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// RUN: %clang --target=aarch64 -mcpu=c1-pro -### -c %s 2>&1 | FileCheck -check-prefix=C1-PRO %s
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// C1-PRO: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "c1-pro"
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// RUN: %clang --target=aarch64 -mcpu=c1-premium -### -c %s 2>&1 | FileCheck -check-prefix=C1-PREMIUM %s
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// C1-PREMIUM: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "c1-premium"
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// RUN: %clang --target=aarch64 -mcpu=c1-ultra -### -c %s 2>&1 | FileCheck -check-prefix=C1-ULTRA %s
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// C1-ULTRA: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "c1-ultra"
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// RUN: %clang --target=aarch64 -mcpu=cortex-r82 -### -c %s 2>&1 | FileCheck -check-prefix=CORTEXR82 %s
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// CORTEXR82: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "cortex-r82"
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69
clang/test/Driver/print-enabled-extensions/aarch64-c1-nano.c
Normal file
69
clang/test/Driver/print-enabled-extensions/aarch64-c1-nano.c
Normal file
@ -0,0 +1,69 @@
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// REQUIRES: aarch64-registered-target
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// RUN: %clang --target=aarch64 --print-enabled-extensions -mcpu=c1-nano | FileCheck --strict-whitespace --implicit-check-not=FEAT_ %s
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// CHECK: Extensions enabled for the given AArch64 target
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// CHECK-EMPTY:
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// CHECK-NEXT: Architecture Feature(s) Description
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// CHECK-NEXT: FEAT_AMUv1 Enable Armv8.4-A Activity Monitors extension
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// CHECK-NEXT: FEAT_AMUv1p1 Enable Armv8.6-A Activity Monitors Virtualization support
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// CHECK-NEXT: FEAT_AdvSIMD Enable Advanced SIMD instructions
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// CHECK-NEXT: FEAT_BF16 Enable BFloat16 Extension
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// CHECK-NEXT: FEAT_BTI Enable Branch Target Identification
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// CHECK-NEXT: FEAT_CCIDX Enable Armv8.3-A Extend of the CCSIDR number of sets
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// CHECK-NEXT: FEAT_CHK Enable Armv8.0-A Check Feature Status Extension
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// CHECK-NEXT: FEAT_CLRBHB Enable Clear BHB instruction
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// CHECK-NEXT: FEAT_CRC32 Enable Armv8.0-A CRC-32 checksum instructions
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// CHECK-NEXT: FEAT_CSV2_2 Enable architectural speculation restriction
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// CHECK-NEXT: FEAT_DIT Enable Armv8.4-A Data Independent Timing instructions
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// CHECK-NEXT: FEAT_DPB Enable Armv8.2-A data Cache Clean to Point of Persistence
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// CHECK-NEXT: FEAT_DPB2 Enable Armv8.5-A Cache Clean to Point of Deep Persistence
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// CHECK-NEXT: FEAT_DotProd Enable dot product support
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// CHECK-NEXT: FEAT_ECV Enable enhanced counter virtualization extension
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// CHECK-NEXT: FEAT_ETE Enable Embedded Trace Extension
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// CHECK-NEXT: FEAT_FCMA Enable Armv8.3-A Floating-point complex number support
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// CHECK-NEXT: FEAT_FGT Enable fine grained virtualization traps extension
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// CHECK-NEXT: FEAT_FHM Enable FP16 FML instructions
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// CHECK-NEXT: FEAT_FP Enable Armv8.0-A Floating Point Extensions
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// CHECK-NEXT: FEAT_FP16 Enable half-precision floating-point data processing
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// CHECK-NEXT: FEAT_FPAC Enable Armv8.3-A Pointer Authentication Faulting enhancement
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// CHECK-NEXT: FEAT_FRINTTS Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int
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// CHECK-NEXT: FEAT_FlagM Enable Armv8.4-A Flag Manipulation instructions
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// CHECK-NEXT: FEAT_FlagM2 Enable alternative NZCV format for floating point comparisons
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// CHECK-NEXT: FEAT_HBC Enable Armv8.8-A Hinted Conditional Branches Extension
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// CHECK-NEXT: FEAT_HCX Enable Armv8.7-A HCRX_EL2 system register
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// CHECK-NEXT: FEAT_I8MM Enable Matrix Multiply Int8 Extension
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// CHECK-NEXT: FEAT_JSCVT Enable Armv8.3-A JavaScript FP conversion instructions
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// CHECK-NEXT: FEAT_LOR Enable Armv8.1-A Limited Ordering Regions extension
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// CHECK-NEXT: FEAT_LRCPC Enable support for RCPC extension
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// CHECK-NEXT: FEAT_LRCPC2 Enable Armv8.4-A RCPC instructions with Immediate Offsets
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// CHECK-NEXT: FEAT_LRCPC3 Enable Armv8.9-A RCPC instructions for A64 and Advanced SIMD and floating-point instruction set
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// CHECK-NEXT: FEAT_LSE Enable Armv8.1-A Large System Extension (LSE) atomic instructions
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// CHECK-NEXT: FEAT_LSE2 Enable Armv8.4-A Large System Extension 2 (LSE2) atomicity rules
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// CHECK-NEXT: FEAT_MOPS Enable Armv8.8-A memcpy and memset acceleration instructions
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// CHECK-NEXT: FEAT_MPAM Enable Armv8.4-A Memory system Partitioning and Monitoring extension
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// CHECK-NEXT: FEAT_MTE, FEAT_MTE2 Enable Memory Tagging Extension
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// CHECK-NEXT: FEAT_NMI, FEAT_GICv3_NMI Enable Armv8.8-A Non-maskable Interrupts
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// CHECK-NEXT: FEAT_NV, FEAT_NV2 Enable Armv8.4-A Nested Virtualization Enchancement
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// CHECK-NEXT: FEAT_PAN Enable Armv8.1-A Privileged Access-Never extension
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// CHECK-NEXT: FEAT_PAN2 Enable Armv8.2-A PAN s1e1R and s1e1W Variants
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// CHECK-NEXT: FEAT_PAuth Enable Armv8.3-A Pointer Authentication extension
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// CHECK-NEXT: FEAT_PMUv3 Enable Armv8.0-A PMUv3 Performance Monitors extension
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// CHECK-NEXT: FEAT_RAS, FEAT_RASv1p1 Enable Armv8.0-A Reliability, Availability and Serviceability Extensions
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// CHECK-NEXT: FEAT_RDM Enable Armv8.1-A Rounding Double Multiply Add/Subtract instructions
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// CHECK-NEXT: FEAT_SB Enable Armv8.5-A Speculation Barrier
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// CHECK-NEXT: FEAT_SEL2 Enable Armv8.4-A Secure Exception Level 2 extension
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// CHECK-NEXT: FEAT_SME Enable Scalable Matrix Extension (SME)
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// CHECK-NEXT: FEAT_SME2 Enable Scalable Matrix Extension 2 (SME2) instructions
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// CHECK-NEXT: FEAT_SPECRES Enable Armv8.5-A execution and data prediction invalidation instructions
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// CHECK-NEXT: FEAT_SPECRES2 Enable Speculation Restriction Instruction
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// CHECK-NEXT: FEAT_SSBS, FEAT_SSBS2 Enable Speculative Store Bypass Safe bit
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// CHECK-NEXT: FEAT_SVE Enable Scalable Vector Extension (SVE) instructions
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// CHECK-NEXT: FEAT_SVE2 Enable Scalable Vector Extension 2 (SVE2) instructions
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// CHECK-NEXT: FEAT_SVE_BitPerm Enable bit permutation SVE2 instructions
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// CHECK-NEXT: FEAT_TLBIOS, FEAT_TLBIRANGE Enable Armv8.4-A TLB Range and Maintenance instructions
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// CHECK-NEXT: FEAT_TRBE Enable Trace Buffer Extension
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// CHECK-NEXT: FEAT_TRF Enable Armv8.4-A Trace extension
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// CHECK-NEXT: FEAT_UAO Enable Armv8.2-A UAO PState
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// CHECK-NEXT: FEAT_VHE Enable Armv8.1-A Virtual Host extension
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// CHECK-NEXT: FEAT_WFxT Enable Armv8.7-A WFET and WFIT instruction
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// CHECK-NEXT: FEAT_XS Enable Armv8.7-A limited-TLB-maintenance instruction
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@ -0,0 +1,71 @@
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// REQUIRES: aarch64-registered-target
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// RUN: %clang --target=aarch64 --print-enabled-extensions -mcpu=c1-premium | FileCheck --strict-whitespace --implicit-check-not=FEAT_ %s
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// CHECK: Extensions enabled for the given AArch64 target
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// CHECK-EMPTY:
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// CHECK-NEXT: Architecture Feature(s) Description
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// CHECK-NEXT: FEAT_AMUv1 Enable Armv8.4-A Activity Monitors extension
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// CHECK-NEXT: FEAT_AMUv1p1 Enable Armv8.6-A Activity Monitors Virtualization support
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// CHECK-NEXT: FEAT_AdvSIMD Enable Advanced SIMD instructions
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// CHECK-NEXT: FEAT_BF16 Enable BFloat16 Extension
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// CHECK-NEXT: FEAT_BTI Enable Branch Target Identification
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// CHECK-NEXT: FEAT_CCIDX Enable Armv8.3-A Extend of the CCSIDR number of sets
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// CHECK-NEXT: FEAT_CHK Enable Armv8.0-A Check Feature Status Extension
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// CHECK-NEXT: FEAT_CLRBHB Enable Clear BHB instruction
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// CHECK-NEXT: FEAT_CRC32 Enable Armv8.0-A CRC-32 checksum instructions
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// CHECK-NEXT: FEAT_CSV2_2 Enable architectural speculation restriction
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// CHECK-NEXT: FEAT_DIT Enable Armv8.4-A Data Independent Timing instructions
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// CHECK-NEXT: FEAT_DPB Enable Armv8.2-A data Cache Clean to Point of Persistence
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// CHECK-NEXT: FEAT_DPB2 Enable Armv8.5-A Cache Clean to Point of Deep Persistence
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// CHECK-NEXT: FEAT_DotProd Enable dot product support
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// CHECK-NEXT: FEAT_ECV Enable enhanced counter virtualization extension
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// CHECK-NEXT: FEAT_ETE Enable Embedded Trace Extension
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// CHECK-NEXT: FEAT_FCMA Enable Armv8.3-A Floating-point complex number support
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// CHECK-NEXT: FEAT_FGT Enable fine grained virtualization traps extension
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// CHECK-NEXT: FEAT_FHM Enable FP16 FML instructions
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// CHECK-NEXT: FEAT_FP Enable Armv8.0-A Floating Point Extensions
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// CHECK-NEXT: FEAT_FP16 Enable half-precision floating-point data processing
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// CHECK-NEXT: FEAT_FPAC Enable Armv8.3-A Pointer Authentication Faulting enhancement
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// CHECK-NEXT: FEAT_FRINTTS Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int
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// CHECK-NEXT: FEAT_FlagM Enable Armv8.4-A Flag Manipulation instructions
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// CHECK-NEXT: FEAT_FlagM2 Enable alternative NZCV format for floating point comparisons
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// CHECK-NEXT: FEAT_HBC Enable Armv8.8-A Hinted Conditional Branches Extension
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// CHECK-NEXT: FEAT_HCX Enable Armv8.7-A HCRX_EL2 system register
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// CHECK-NEXT: FEAT_I8MM Enable Matrix Multiply Int8 Extension
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// CHECK-NEXT: FEAT_JSCVT Enable Armv8.3-A JavaScript FP conversion instructions
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// CHECK-NEXT: FEAT_LOR Enable Armv8.1-A Limited Ordering Regions extension
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// CHECK-NEXT: FEAT_LRCPC Enable support for RCPC extension
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// CHECK-NEXT: FEAT_LRCPC2 Enable Armv8.4-A RCPC instructions with Immediate Offsets
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// CHECK-NEXT: FEAT_LRCPC3 Enable Armv8.9-A RCPC instructions for A64 and Advanced SIMD and floating-point instruction set
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// CHECK-NEXT: FEAT_LSE Enable Armv8.1-A Large System Extension (LSE) atomic instructions
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// CHECK-NEXT: FEAT_LSE2 Enable Armv8.4-A Large System Extension 2 (LSE2) atomicity rules
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// CHECK-NEXT: FEAT_MOPS Enable Armv8.8-A memcpy and memset acceleration instructions
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// CHECK-NEXT: FEAT_MPAM Enable Armv8.4-A Memory system Partitioning and Monitoring extension
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// CHECK-NEXT: FEAT_MTE, FEAT_MTE2 Enable Memory Tagging Extension
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// CHECK-NEXT: FEAT_NMI, FEAT_GICv3_NMI Enable Armv8.8-A Non-maskable Interrupts
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// CHECK-NEXT: FEAT_NV, FEAT_NV2 Enable Armv8.4-A Nested Virtualization Enchancement
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// CHECK-NEXT: FEAT_PAN Enable Armv8.1-A Privileged Access-Never extension
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// CHECK-NEXT: FEAT_PAN2 Enable Armv8.2-A PAN s1e1R and s1e1W Variants
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// CHECK-NEXT: FEAT_PAuth Enable Armv8.3-A Pointer Authentication extension
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// CHECK-NEXT: FEAT_PMUv3 Enable Armv8.0-A PMUv3 Performance Monitors extension
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// CHECK-NEXT: FEAT_RAS, FEAT_RASv1p1 Enable Armv8.0-A Reliability, Availability and Serviceability Extensions
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// CHECK-NEXT: FEAT_RDM Enable Armv8.1-A Rounding Double Multiply Add/Subtract instructions
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// CHECK-NEXT: FEAT_SB Enable Armv8.5-A Speculation Barrier
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// CHECK-NEXT: FEAT_SEL2 Enable Armv8.4-A Secure Exception Level 2 extension
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// CHECK-NEXT: FEAT_SME Enable Scalable Matrix Extension (SME)
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// CHECK-NEXT: FEAT_SME2 Enable Scalable Matrix Extension 2 (SME2) instructions
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// CHECK-NEXT: FEAT_SPE Enable Statistical Profiling extension
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// CHECK-NEXT: FEAT_SPECRES Enable Armv8.5-A execution and data prediction invalidation instructions
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// CHECK-NEXT: FEAT_SPECRES2 Enable Speculation Restriction Instruction
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// CHECK-NEXT: FEAT_SPEv1p2 Enable extra register in the Statistical Profiling Extension
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// CHECK-NEXT: FEAT_SSBS, FEAT_SSBS2 Enable Speculative Store Bypass Safe bit
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// CHECK-NEXT: FEAT_SVE Enable Scalable Vector Extension (SVE) instructions
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// CHECK-NEXT: FEAT_SVE2 Enable Scalable Vector Extension 2 (SVE2) instructions
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// CHECK-NEXT: FEAT_SVE_BitPerm Enable bit permutation SVE2 instructions
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// CHECK-NEXT: FEAT_TLBIOS, FEAT_TLBIRANGE Enable Armv8.4-A TLB Range and Maintenance instructions
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// CHECK-NEXT: FEAT_TRBE Enable Trace Buffer Extension
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// CHECK-NEXT: FEAT_TRF Enable Armv8.4-A Trace extension
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// CHECK-NEXT: FEAT_UAO Enable Armv8.2-A UAO PState
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// CHECK-NEXT: FEAT_VHE Enable Armv8.1-A Virtual Host extension
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// CHECK-NEXT: FEAT_WFxT Enable Armv8.7-A WFET and WFIT instruction
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// CHECK-NEXT: FEAT_XS Enable Armv8.7-A limited-TLB-maintenance instruction
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71
clang/test/Driver/print-enabled-extensions/aarch64-c1-pro.c
Normal file
71
clang/test/Driver/print-enabled-extensions/aarch64-c1-pro.c
Normal file
@ -0,0 +1,71 @@
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// REQUIRES: aarch64-registered-target
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// RUN: %clang --target=aarch64 --print-enabled-extensions -mcpu=c1-pro | FileCheck --strict-whitespace --implicit-check-not=FEAT_ %s
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// CHECK: Extensions enabled for the given AArch64 target
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// CHECK-EMPTY:
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// CHECK-NEXT: Architecture Feature(s) Description
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// CHECK-NEXT: FEAT_AMUv1 Enable Armv8.4-A Activity Monitors extension
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// CHECK-NEXT: FEAT_AMUv1p1 Enable Armv8.6-A Activity Monitors Virtualization support
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// CHECK-NEXT: FEAT_AdvSIMD Enable Advanced SIMD instructions
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// CHECK-NEXT: FEAT_BF16 Enable BFloat16 Extension
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// CHECK-NEXT: FEAT_BTI Enable Branch Target Identification
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// CHECK-NEXT: FEAT_CCIDX Enable Armv8.3-A Extend of the CCSIDR number of sets
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// CHECK-NEXT: FEAT_CHK Enable Armv8.0-A Check Feature Status Extension
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// CHECK-NEXT: FEAT_CLRBHB Enable Clear BHB instruction
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// CHECK-NEXT: FEAT_CRC32 Enable Armv8.0-A CRC-32 checksum instructions
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// CHECK-NEXT: FEAT_CSV2_2 Enable architectural speculation restriction
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// CHECK-NEXT: FEAT_DIT Enable Armv8.4-A Data Independent Timing instructions
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// CHECK-NEXT: FEAT_DPB Enable Armv8.2-A data Cache Clean to Point of Persistence
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// CHECK-NEXT: FEAT_DPB2 Enable Armv8.5-A Cache Clean to Point of Deep Persistence
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// CHECK-NEXT: FEAT_DotProd Enable dot product support
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// CHECK-NEXT: FEAT_ECV Enable enhanced counter virtualization extension
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// CHECK-NEXT: FEAT_ETE Enable Embedded Trace Extension
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// CHECK-NEXT: FEAT_FCMA Enable Armv8.3-A Floating-point complex number support
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// CHECK-NEXT: FEAT_FGT Enable fine grained virtualization traps extension
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// CHECK-NEXT: FEAT_FHM Enable FP16 FML instructions
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// CHECK-NEXT: FEAT_FP Enable Armv8.0-A Floating Point Extensions
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// CHECK-NEXT: FEAT_FP16 Enable half-precision floating-point data processing
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// CHECK-NEXT: FEAT_FPAC Enable Armv8.3-A Pointer Authentication Faulting enhancement
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// CHECK-NEXT: FEAT_FRINTTS Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int
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// CHECK-NEXT: FEAT_FlagM Enable Armv8.4-A Flag Manipulation instructions
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// CHECK-NEXT: FEAT_FlagM2 Enable alternative NZCV format for floating point comparisons
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// CHECK-NEXT: FEAT_HBC Enable Armv8.8-A Hinted Conditional Branches Extension
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// CHECK-NEXT: FEAT_HCX Enable Armv8.7-A HCRX_EL2 system register
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// CHECK-NEXT: FEAT_I8MM Enable Matrix Multiply Int8 Extension
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// CHECK-NEXT: FEAT_JSCVT Enable Armv8.3-A JavaScript FP conversion instructions
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// CHECK-NEXT: FEAT_LOR Enable Armv8.1-A Limited Ordering Regions extension
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// CHECK-NEXT: FEAT_LRCPC Enable support for RCPC extension
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// CHECK-NEXT: FEAT_LRCPC2 Enable Armv8.4-A RCPC instructions with Immediate Offsets
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// CHECK-NEXT: FEAT_LRCPC3 Enable Armv8.9-A RCPC instructions for A64 and Advanced SIMD and floating-point instruction set
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// CHECK-NEXT: FEAT_LSE Enable Armv8.1-A Large System Extension (LSE) atomic instructions
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// CHECK-NEXT: FEAT_LSE2 Enable Armv8.4-A Large System Extension 2 (LSE2) atomicity rules
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// CHECK-NEXT: FEAT_MOPS Enable Armv8.8-A memcpy and memset acceleration instructions
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// CHECK-NEXT: FEAT_MPAM Enable Armv8.4-A Memory system Partitioning and Monitoring extension
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// CHECK-NEXT: FEAT_MTE, FEAT_MTE2 Enable Memory Tagging Extension
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// CHECK-NEXT: FEAT_NMI, FEAT_GICv3_NMI Enable Armv8.8-A Non-maskable Interrupts
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// CHECK-NEXT: FEAT_NV, FEAT_NV2 Enable Armv8.4-A Nested Virtualization Enchancement
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// CHECK-NEXT: FEAT_PAN Enable Armv8.1-A Privileged Access-Never extension
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// CHECK-NEXT: FEAT_PAN2 Enable Armv8.2-A PAN s1e1R and s1e1W Variants
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// CHECK-NEXT: FEAT_PAuth Enable Armv8.3-A Pointer Authentication extension
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// CHECK-NEXT: FEAT_PMUv3 Enable Armv8.0-A PMUv3 Performance Monitors extension
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// CHECK-NEXT: FEAT_RAS, FEAT_RASv1p1 Enable Armv8.0-A Reliability, Availability and Serviceability Extensions
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// CHECK-NEXT: FEAT_RDM Enable Armv8.1-A Rounding Double Multiply Add/Subtract instructions
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// CHECK-NEXT: FEAT_SB Enable Armv8.5-A Speculation Barrier
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// CHECK-NEXT: FEAT_SEL2 Enable Armv8.4-A Secure Exception Level 2 extension
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// CHECK-NEXT: FEAT_SME Enable Scalable Matrix Extension (SME)
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// CHECK-NEXT: FEAT_SME2 Enable Scalable Matrix Extension 2 (SME2) instructions
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// CHECK-NEXT: FEAT_SPE Enable Statistical Profiling extension
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// CHECK-NEXT: FEAT_SPECRES Enable Armv8.5-A execution and data prediction invalidation instructions
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// CHECK-NEXT: FEAT_SPECRES2 Enable Speculation Restriction Instruction
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// CHECK-NEXT: FEAT_SPEv1p2 Enable extra register in the Statistical Profiling Extension
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// CHECK-NEXT: FEAT_SSBS, FEAT_SSBS2 Enable Speculative Store Bypass Safe bit
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// CHECK-NEXT: FEAT_SVE Enable Scalable Vector Extension (SVE) instructions
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// CHECK-NEXT: FEAT_SVE2 Enable Scalable Vector Extension 2 (SVE2) instructions
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// CHECK-NEXT: FEAT_SVE_BitPerm Enable bit permutation SVE2 instructions
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// CHECK-NEXT: FEAT_TLBIOS, FEAT_TLBIRANGE Enable Armv8.4-A TLB Range and Maintenance instructions
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// CHECK-NEXT: FEAT_TRBE Enable Trace Buffer Extension
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// CHECK-NEXT: FEAT_TRF Enable Armv8.4-A Trace extension
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// CHECK-NEXT: FEAT_UAO Enable Armv8.2-A UAO PState
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// CHECK-NEXT: FEAT_VHE Enable Armv8.1-A Virtual Host extension
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// CHECK-NEXT: FEAT_WFxT Enable Armv8.7-A WFET and WFIT instruction
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// CHECK-NEXT: FEAT_XS Enable Armv8.7-A limited-TLB-maintenance instruction
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@ -0,0 +1,71 @@
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// REQUIRES: aarch64-registered-target
|
||||
// RUN: %clang --target=aarch64 --print-enabled-extensions -mcpu=c1-ultra | FileCheck --strict-whitespace --implicit-check-not=FEAT_ %s
|
||||
|
||||
// CHECK: Extensions enabled for the given AArch64 target
|
||||
// CHECK-EMPTY:
|
||||
// CHECK-NEXT: Architecture Feature(s) Description
|
||||
// CHECK-NEXT: FEAT_AMUv1 Enable Armv8.4-A Activity Monitors extension
|
||||
// CHECK-NEXT: FEAT_AMUv1p1 Enable Armv8.6-A Activity Monitors Virtualization support
|
||||
// CHECK-NEXT: FEAT_AdvSIMD Enable Advanced SIMD instructions
|
||||
// CHECK-NEXT: FEAT_BF16 Enable BFloat16 Extension
|
||||
// CHECK-NEXT: FEAT_BTI Enable Branch Target Identification
|
||||
// CHECK-NEXT: FEAT_CCIDX Enable Armv8.3-A Extend of the CCSIDR number of sets
|
||||
// CHECK-NEXT: FEAT_CHK Enable Armv8.0-A Check Feature Status Extension
|
||||
// CHECK-NEXT: FEAT_CLRBHB Enable Clear BHB instruction
|
||||
// CHECK-NEXT: FEAT_CRC32 Enable Armv8.0-A CRC-32 checksum instructions
|
||||
// CHECK-NEXT: FEAT_CSV2_2 Enable architectural speculation restriction
|
||||
// CHECK-NEXT: FEAT_DIT Enable Armv8.4-A Data Independent Timing instructions
|
||||
// CHECK-NEXT: FEAT_DPB Enable Armv8.2-A data Cache Clean to Point of Persistence
|
||||
// CHECK-NEXT: FEAT_DPB2 Enable Armv8.5-A Cache Clean to Point of Deep Persistence
|
||||
// CHECK-NEXT: FEAT_DotProd Enable dot product support
|
||||
// CHECK-NEXT: FEAT_ECV Enable enhanced counter virtualization extension
|
||||
// CHECK-NEXT: FEAT_ETE Enable Embedded Trace Extension
|
||||
// CHECK-NEXT: FEAT_FCMA Enable Armv8.3-A Floating-point complex number support
|
||||
// CHECK-NEXT: FEAT_FGT Enable fine grained virtualization traps extension
|
||||
// CHECK-NEXT: FEAT_FHM Enable FP16 FML instructions
|
||||
// CHECK-NEXT: FEAT_FP Enable Armv8.0-A Floating Point Extensions
|
||||
// CHECK-NEXT: FEAT_FP16 Enable half-precision floating-point data processing
|
||||
// CHECK-NEXT: FEAT_FPAC Enable Armv8.3-A Pointer Authentication Faulting enhancement
|
||||
// CHECK-NEXT: FEAT_FRINTTS Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int
|
||||
// CHECK-NEXT: FEAT_FlagM Enable Armv8.4-A Flag Manipulation instructions
|
||||
// CHECK-NEXT: FEAT_FlagM2 Enable alternative NZCV format for floating point comparisons
|
||||
// CHECK-NEXT: FEAT_HBC Enable Armv8.8-A Hinted Conditional Branches Extension
|
||||
// CHECK-NEXT: FEAT_HCX Enable Armv8.7-A HCRX_EL2 system register
|
||||
// CHECK-NEXT: FEAT_I8MM Enable Matrix Multiply Int8 Extension
|
||||
// CHECK-NEXT: FEAT_JSCVT Enable Armv8.3-A JavaScript FP conversion instructions
|
||||
// CHECK-NEXT: FEAT_LOR Enable Armv8.1-A Limited Ordering Regions extension
|
||||
// CHECK-NEXT: FEAT_LRCPC Enable support for RCPC extension
|
||||
// CHECK-NEXT: FEAT_LRCPC2 Enable Armv8.4-A RCPC instructions with Immediate Offsets
|
||||
// CHECK-NEXT: FEAT_LRCPC3 Enable Armv8.9-A RCPC instructions for A64 and Advanced SIMD and floating-point instruction set
|
||||
// CHECK-NEXT: FEAT_LSE Enable Armv8.1-A Large System Extension (LSE) atomic instructions
|
||||
// CHECK-NEXT: FEAT_LSE2 Enable Armv8.4-A Large System Extension 2 (LSE2) atomicity rules
|
||||
// CHECK-NEXT: FEAT_MOPS Enable Armv8.8-A memcpy and memset acceleration instructions
|
||||
// CHECK-NEXT: FEAT_MPAM Enable Armv8.4-A Memory system Partitioning and Monitoring extension
|
||||
// CHECK-NEXT: FEAT_MTE, FEAT_MTE2 Enable Memory Tagging Extension
|
||||
// CHECK-NEXT: FEAT_NMI, FEAT_GICv3_NMI Enable Armv8.8-A Non-maskable Interrupts
|
||||
// CHECK-NEXT: FEAT_NV, FEAT_NV2 Enable Armv8.4-A Nested Virtualization Enchancement
|
||||
// CHECK-NEXT: FEAT_PAN Enable Armv8.1-A Privileged Access-Never extension
|
||||
// CHECK-NEXT: FEAT_PAN2 Enable Armv8.2-A PAN s1e1R and s1e1W Variants
|
||||
// CHECK-NEXT: FEAT_PAuth Enable Armv8.3-A Pointer Authentication extension
|
||||
// CHECK-NEXT: FEAT_PMUv3 Enable Armv8.0-A PMUv3 Performance Monitors extension
|
||||
// CHECK-NEXT: FEAT_RAS, FEAT_RASv1p1 Enable Armv8.0-A Reliability, Availability and Serviceability Extensions
|
||||
// CHECK-NEXT: FEAT_RDM Enable Armv8.1-A Rounding Double Multiply Add/Subtract instructions
|
||||
// CHECK-NEXT: FEAT_SB Enable Armv8.5-A Speculation Barrier
|
||||
// CHECK-NEXT: FEAT_SEL2 Enable Armv8.4-A Secure Exception Level 2 extension
|
||||
// CHECK-NEXT: FEAT_SME Enable Scalable Matrix Extension (SME)
|
||||
// CHECK-NEXT: FEAT_SME2 Enable Scalable Matrix Extension 2 (SME2) instructions
|
||||
// CHECK-NEXT: FEAT_SPE Enable Statistical Profiling extension
|
||||
// CHECK-NEXT: FEAT_SPECRES Enable Armv8.5-A execution and data prediction invalidation instructions
|
||||
// CHECK-NEXT: FEAT_SPECRES2 Enable Speculation Restriction Instruction
|
||||
// CHECK-NEXT: FEAT_SPEv1p2 Enable extra register in the Statistical Profiling Extension
|
||||
// CHECK-NEXT: FEAT_SSBS, FEAT_SSBS2 Enable Speculative Store Bypass Safe bit
|
||||
// CHECK-NEXT: FEAT_SVE Enable Scalable Vector Extension (SVE) instructions
|
||||
// CHECK-NEXT: FEAT_SVE2 Enable Scalable Vector Extension 2 (SVE2) instructions
|
||||
// CHECK-NEXT: FEAT_SVE_BitPerm Enable bit permutation SVE2 instructions
|
||||
// CHECK-NEXT: FEAT_TLBIOS, FEAT_TLBIRANGE Enable Armv8.4-A TLB Range and Maintenance instructions
|
||||
// CHECK-NEXT: FEAT_TRBE Enable Trace Buffer Extension
|
||||
// CHECK-NEXT: FEAT_TRF Enable Armv8.4-A Trace extension
|
||||
// CHECK-NEXT: FEAT_UAO Enable Armv8.2-A UAO PState
|
||||
// CHECK-NEXT: FEAT_VHE Enable Armv8.1-A Virtual Host extension
|
||||
// CHECK-NEXT: FEAT_WFxT Enable Armv8.7-A WFET and WFIT instruction
|
||||
// CHECK-NEXT: FEAT_XS Enable Armv8.7-A limited-TLB-maintenance instruction
|
||||
@ -36,6 +36,10 @@
|
||||
// CHECK-SAME: {{^}}, apple-s7
|
||||
// CHECK-SAME: {{^}}, apple-s8
|
||||
// CHECK-SAME: {{^}}, apple-s9
|
||||
// CHECK-SAME: {{^}}, c1-nano
|
||||
// CHECK-SAME: {{^}}, c1-premium
|
||||
// CHECK-SAME: {{^}}, c1-pro
|
||||
// CHECK-SAME: {{^}}, c1-ultra
|
||||
// CHECK-SAME: {{^}}, carmel
|
||||
// CHECK-SAME: {{^}}, cobalt-100
|
||||
// CHECK-SAME: {{^}}, cortex-a320
|
||||
|
||||
@ -112,6 +112,8 @@ Changes to the AArch64 Backend
|
||||
* `FEAT_TME` support has been removed, as it has been withdrawn from
|
||||
all future versions of the A-profile architecture.
|
||||
|
||||
* Added support for C1-Nano, C1-Pro, C1-Premium, and C1-Ultra CPUs.
|
||||
|
||||
Changes to the AMDGPU Backend
|
||||
-----------------------------
|
||||
|
||||
|
||||
@ -66,6 +66,14 @@ def TuneA520AE : SubtargetFeature<"a520ae", "ARMProcFamily", "CortexA520",
|
||||
FeaturePostRAScheduler,
|
||||
FeatureUseWzrToVecMove]>;
|
||||
|
||||
def TuneC1Nano : SubtargetFeature<"c1-nano", "ARMProcFamily",
|
||||
"C1Nano", "C1-Nano ARM Processors",[
|
||||
FeatureFuseAES,
|
||||
FeatureFuseAdrpAdd,
|
||||
FeaturePostRAScheduler,
|
||||
FeatureUseWzrToVecMove,
|
||||
FeatureUseFixedOverScalableIfEqualCost]>;
|
||||
|
||||
def TuneA57 : SubtargetFeature<"a57", "ARMProcFamily", "CortexA57",
|
||||
"Cortex-A57 ARM processors", [
|
||||
FeatureFuseAES,
|
||||
@ -232,6 +240,18 @@ def TuneA725 : SubtargetFeature<"cortex-a725", "ARMProcFamily",
|
||||
FeatureEnableSelectOptimize,
|
||||
FeaturePredictableSelectIsExpensive]>;
|
||||
|
||||
def TuneC1Pro : SubtargetFeature<"c1-pro", "ARMProcFamily",
|
||||
"C1Pro", "C1-Pro ARM Processors",[
|
||||
FeatureFuseAES,
|
||||
FeaturePostRAScheduler,
|
||||
FeatureCmpBccFusion,
|
||||
FeatureALULSLFast,
|
||||
FeatureFuseAdrpAdd,
|
||||
FeatureFuseCmpCSel,
|
||||
FeatureFuseCmpCSet,
|
||||
FeatureEnableSelectOptimize,
|
||||
FeaturePredictableSelectIsExpensive]>;
|
||||
|
||||
def TuneR82 : SubtargetFeature<"cortex-r82", "ARMProcFamily",
|
||||
"CortexR82",
|
||||
"Cortex-R82 ARM processors", [
|
||||
@ -301,6 +321,32 @@ def TuneX925 : SubtargetFeature<"cortex-x925", "ARMProcFamily",
|
||||
FeatureAvoidLDAPUR,
|
||||
FeaturePredictableSelectIsExpensive]>;
|
||||
|
||||
def TuneC1Premium : SubtargetFeature<"c1-premium", "ARMProcFamily",
|
||||
"C1Premium", "C1-Premium ARM Processors",[
|
||||
FeatureALULSLFast,
|
||||
FeatureFuseAdrpAdd,
|
||||
FeatureFuseCmpCSel,
|
||||
FeatureFuseCmpCSet,
|
||||
FeatureFuseAES,
|
||||
FeaturePostRAScheduler,
|
||||
FeatureEnableSelectOptimize,
|
||||
FeatureUseFixedOverScalableIfEqualCost,
|
||||
FeatureAvoidLDAPUR,
|
||||
FeaturePredictableSelectIsExpensive]>;
|
||||
|
||||
def TuneC1Ultra : SubtargetFeature<"c1-ultra", "ARMProcFamily",
|
||||
"C1Ultra", "C1-Ultra ARM Processors",[
|
||||
FeatureALULSLFast,
|
||||
FeatureFuseAdrpAdd,
|
||||
FeatureFuseCmpCSel,
|
||||
FeatureFuseCmpCSet,
|
||||
FeatureFuseAES,
|
||||
FeaturePostRAScheduler,
|
||||
FeatureEnableSelectOptimize,
|
||||
FeatureUseFixedOverScalableIfEqualCost,
|
||||
FeatureAvoidLDAPUR,
|
||||
FeaturePredictableSelectIsExpensive]>;
|
||||
|
||||
def TuneA64FX : SubtargetFeature<"a64fx", "ARMProcFamily", "A64FX",
|
||||
"Fujitsu A64FX processors", [
|
||||
FeaturePostRAScheduler,
|
||||
@ -867,6 +913,19 @@ def ProcessorFeatures {
|
||||
FeatureFPARMv8, FeatureFullFP16, FeatureMatMulInt8, FeatureJS,
|
||||
FeatureNEON, FeatureLSE, FeatureRAS, FeatureRCPC, FeatureRDM,
|
||||
FeatureDotProd, FeatureFPAC];
|
||||
list<SubtargetFeature> C1Nano = [HasV9_3aOps, FeatureNEON, FeatureCLRBHB,
|
||||
FeatureCHK, FeatureFPARMv8, FeaturePerfMon,
|
||||
FeatureSPECRES2, FeatureSSBS, FeatureRDM,
|
||||
FeatureVH, FeatureBF16, FeatureDotProd,
|
||||
FeatureFP16FML, FeatureFullFP16, FeatureMPAM,
|
||||
FeatureSVE, FeatureCCIDX, FeatureComplxNum,
|
||||
FeatureFPAC, FeatureJS, FeatureAM,
|
||||
FeatureRAS, FeatureSEL2, FeatureTRACEV8_4,
|
||||
FeatureAltFPCmp, FeatureFRInt3264,
|
||||
FeatureMTE, FeatureFineGrainedTraps,
|
||||
FeatureHCX, FeatureRCPC3, FeatureETE,
|
||||
FeatureSVEBitPerm, FeatureSVE2, FeatureTRBE,
|
||||
FeatureSME, FeatureSME2];
|
||||
list<SubtargetFeature> A65 = [HasV8_2aOps, FeatureSHA2, FeatureAES, FeatureFPARMv8,
|
||||
FeatureNEON, FeatureFullFP16, FeatureDotProd,
|
||||
FeatureRCPC, FeatureSSBS, FeatureRAS,
|
||||
@ -936,6 +995,20 @@ def ProcessorFeatures {
|
||||
FeatureDotProd, FeatureFPARMv8, FeatureFullFP16, FeatureMatMulInt8,
|
||||
FeatureJS, FeatureLSE, FeatureNEON, FeaturePAuth, FeatureRAS,
|
||||
FeatureRCPC, FeatureRDM, FeatureFPAC];
|
||||
list<SubtargetFeature> C1Pro = [HasV9_3aOps, FeatureNEON, FeatureCLRBHB,
|
||||
FeatureCHK, FeatureFPARMv8, FeaturePerfMon,
|
||||
FeatureSPECRES2, FeatureSSBS, FeatureRDM,
|
||||
FeatureVH, FeatureBF16, FeatureDotProd,
|
||||
FeatureFP16FML, FeatureFullFP16, FeatureMPAM,
|
||||
FeatureSPE, FeatureSVE, FeatureCCIDX,
|
||||
FeatureComplxNum, FeatureFPAC, FeatureJS,
|
||||
FeatureAM, FeatureRAS, FeatureSEL2,
|
||||
FeatureTRACEV8_4, FeatureAltFPCmp,
|
||||
FeatureFRInt3264, FeatureMTE,
|
||||
FeatureFineGrainedTraps, FeatureHCX,
|
||||
FeatureSPE_EEF, FeatureRCPC3, FeatureETE,
|
||||
FeatureSVEBitPerm, FeatureSVE2, FeatureTRBE,
|
||||
FeatureSME, FeatureSME2];
|
||||
list<SubtargetFeature> R82 = [HasV8_0rOps, FeaturePerfMon, FeatureFullFP16,
|
||||
FeatureFP16FML, FeatureSSBS, FeaturePredRes,
|
||||
FeatureSB, FeatureRDM, FeatureDotProd,
|
||||
@ -995,6 +1068,36 @@ def ProcessorFeatures {
|
||||
FeatureDotProd, FeatureFPARMv8, FeatureFullFP16, FeatureMatMulInt8,
|
||||
FeatureJS, FeatureLSE, FeatureNEON, FeaturePAuth, FeatureRAS,
|
||||
FeatureRCPC, FeatureRDM, FeatureFPAC];
|
||||
list<SubtargetFeature> C1Premium = [HasV9_3aOps, FeatureNEON, FeatureCLRBHB,
|
||||
FeatureCHK, FeatureFPARMv8,
|
||||
FeaturePerfMon, FeatureSPECRES2,
|
||||
FeatureSSBS, FeatureRDM, FeatureVH,
|
||||
FeatureBF16, FeatureDotProd,
|
||||
FeatureFP16FML, FeatureFullFP16,
|
||||
FeatureMPAM, FeatureSPE, FeatureSVE,
|
||||
FeatureCCIDX, FeatureComplxNum,
|
||||
FeatureFPAC, FeatureJS, FeatureAM,
|
||||
FeatureRAS, FeatureSEL2, FeatureTRACEV8_4,
|
||||
FeatureAltFPCmp, FeatureFRInt3264,
|
||||
FeatureMTE, FeatureFineGrainedTraps,
|
||||
FeatureHCX, FeatureSPE_EEF, FeatureRCPC3,
|
||||
FeatureETE, FeatureSVEBitPerm,
|
||||
FeatureSVE2, FeatureTRBE, FeatureSME,
|
||||
FeatureSME2];
|
||||
list<SubtargetFeature> C1Ultra = [HasV9_3aOps, FeatureNEON, FeatureCLRBHB,
|
||||
FeatureCHK, FeatureFPARMv8, FeaturePerfMon,
|
||||
FeatureSPECRES2, FeatureSSBS, FeatureRDM,
|
||||
FeatureVH, FeatureBF16, FeatureDotProd,
|
||||
FeatureFP16FML, FeatureFullFP16,
|
||||
FeatureMPAM, FeatureSPE, FeatureSVE,
|
||||
FeatureCCIDX, FeatureComplxNum, FeatureFPAC,
|
||||
FeatureJS, FeatureAM, FeatureRAS,
|
||||
FeatureSEL2, FeatureTRACEV8_4,
|
||||
FeatureAltFPCmp, FeatureFRInt3264,
|
||||
FeatureMTE, FeatureFineGrainedTraps,
|
||||
FeatureHCX, FeatureSPE_EEF, FeatureRCPC3,
|
||||
FeatureETE, FeatureSVEBitPerm, FeatureSVE2,
|
||||
FeatureTRBE, FeatureSME, FeatureSME2];
|
||||
list<SubtargetFeature> A64FX = [HasV8_2aOps, FeatureFPARMv8, FeatureNEON,
|
||||
FeatureSHA2, FeaturePerfMon, FeatureFullFP16,
|
||||
FeatureSVE, FeatureComplxNum,
|
||||
@ -1266,6 +1369,8 @@ def : ProcessorModel<"cortex-a520", CortexA510Model, ProcessorFeatures.A520,
|
||||
[TuneA520]>;
|
||||
def : ProcessorModel<"cortex-a520ae", CortexA510Model, ProcessorFeatures.A520AE,
|
||||
[TuneA520AE]>;
|
||||
def : ProcessorModel<"c1-nano", CortexA510Model,
|
||||
ProcessorFeatures.C1Nano, [TuneC1Nano]>;
|
||||
def : ProcessorModel<"cortex-a57", CortexA57Model, ProcessorFeatures.A53,
|
||||
[TuneA57]>;
|
||||
def : ProcessorModel<"cortex-a65", CortexA53Model, ProcessorFeatures.A65,
|
||||
@ -1300,6 +1405,8 @@ def : ProcessorModel<"cortex-a720ae", NeoverseN2Model, ProcessorFeatures.A720AE,
|
||||
[TuneA720AE]>;
|
||||
def : ProcessorModel<"cortex-a725", NeoverseN3Model, ProcessorFeatures.A725,
|
||||
[TuneA725]>;
|
||||
def : ProcessorModel<"c1-pro", NeoverseN3Model,
|
||||
ProcessorFeatures.C1Pro, [TuneC1Pro]>;
|
||||
def : ProcessorModel<"cortex-r82", CortexA55Model, ProcessorFeatures.R82,
|
||||
[TuneR82]>;
|
||||
def : ProcessorModel<"cortex-r82ae", CortexA55Model, ProcessorFeatures.R82AE,
|
||||
@ -1316,6 +1423,10 @@ def : ProcessorModel<"cortex-x4", NeoverseV3Model, ProcessorFeatures.X4,
|
||||
[TuneX4]>;
|
||||
def : ProcessorModel<"cortex-x925", NeoverseV3Model, ProcessorFeatures.X925,
|
||||
[TuneX925]>;
|
||||
def : ProcessorModel<"c1-premium", NeoverseV3Model,
|
||||
ProcessorFeatures.C1Premium, [TuneC1Premium]>;
|
||||
def : ProcessorModel<"c1-ultra", NeoverseV3Model,
|
||||
ProcessorFeatures.C1Ultra, [TuneC1Ultra]>;
|
||||
def : ProcessorModel<"gb10", NeoverseV3Model, ProcessorFeatures.GB10,
|
||||
[TuneX925]>;
|
||||
def : ProcessorModel<"grace", NeoverseV2Model, ProcessorFeatures.Grace,
|
||||
|
||||
@ -177,6 +177,7 @@ void AArch64Subtarget::initializeProperties(bool HasMinSize) {
|
||||
case CortexA320:
|
||||
case CortexA510:
|
||||
case CortexA520:
|
||||
case C1Nano:
|
||||
PrefFunctionAlignment = Align(16);
|
||||
VScaleForTuning = 1;
|
||||
PrefLoopAlignment = Align(16);
|
||||
@ -186,10 +187,13 @@ void AArch64Subtarget::initializeProperties(bool HasMinSize) {
|
||||
case CortexA715:
|
||||
case CortexA720:
|
||||
case CortexA725:
|
||||
case C1Pro:
|
||||
case CortexX2:
|
||||
case CortexX3:
|
||||
case CortexX4:
|
||||
case CortexX925:
|
||||
case C1Premium:
|
||||
case C1Ultra:
|
||||
PrefFunctionAlignment = Align(16);
|
||||
VScaleForTuning = 1;
|
||||
PrefLoopAlignment = Align(32);
|
||||
|
||||
@ -203,6 +203,10 @@ getHostCPUNameForARMFromComponents(StringRef Implementer, StringRef Hardware,
|
||||
.Case("0xb36", "arm1136j-s")
|
||||
.Case("0xb56", "arm1156t2-s")
|
||||
.Case("0xb76", "arm1176jz-s")
|
||||
.Case("0xd8a", "c1-nano")
|
||||
.Case("0xd90", "c1-premium")
|
||||
.Case("0xd8b", "c1-pro")
|
||||
.Case("0xd8c", "c1-ultra")
|
||||
.Case("0xc05", "cortex-a5")
|
||||
.Case("0xc07", "cortex-a7")
|
||||
.Case("0xc08", "cortex-a8")
|
||||
|
||||
@ -148,6 +148,18 @@ TEST(getLinuxHostCPUName, AArch64) {
|
||||
EXPECT_EQ(sys::detail::getHostCPUNameForARM(
|
||||
0x4100d870, ArrayRef<uint64_t>{0x4100d870, 0x4100d850}),
|
||||
"cortex-x925");
|
||||
EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
|
||||
"CPU part : 0xd8a"),
|
||||
"c1-nano");
|
||||
EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
|
||||
"CPU part : 0xd90"),
|
||||
"c1-premium");
|
||||
EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
|
||||
"CPU part : 0xd8b"),
|
||||
"c1-pro");
|
||||
EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
|
||||
"CPU part : 0xd8c"),
|
||||
"c1-ultra");
|
||||
EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n"
|
||||
"CPU part : 0xc00"),
|
||||
"falkor");
|
||||
|
||||
@ -1120,6 +1120,10 @@ INSTANTIATE_TEST_SUITE_P(
|
||||
AArch64CPUTestParams("cortex-x3", "armv9-a"),
|
||||
AArch64CPUTestParams("cortex-x4", "armv9.2-a"),
|
||||
AArch64CPUTestParams("cortex-x925", "armv9.2-a"),
|
||||
AArch64CPUTestParams("c1-nano", "armv9.3-a"),
|
||||
AArch64CPUTestParams("c1-premium", "armv9.3-a"),
|
||||
AArch64CPUTestParams("c1-pro", "armv9.3-a"),
|
||||
AArch64CPUTestParams("c1-ultra", "armv9.3-a"),
|
||||
AArch64CPUTestParams("cyclone", "armv8-a"),
|
||||
AArch64CPUTestParams("apple-a7", "armv8-a"),
|
||||
AArch64CPUTestParams("apple-a8", "armv8-a"),
|
||||
@ -1266,7 +1270,7 @@ INSTANTIATE_TEST_SUITE_P(
|
||||
AArch64CPUAliasTestParams::PrintToStringParamName);
|
||||
|
||||
// Note: number of CPUs includes aliases.
|
||||
static constexpr unsigned NumAArch64CPUArchs = 93;
|
||||
static constexpr unsigned NumAArch64CPUArchs = 97;
|
||||
|
||||
TEST(TargetParserTest, testAArch64CPUArchList) {
|
||||
SmallVector<StringRef, NumAArch64CPUArchs> List;
|
||||
|
||||
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Reference in New Issue
Block a user