[SLP]Fix PR102187: do not insert extractelement before landingpad instruction.
Landingpad instruction must be the very first instruction after the phi nodes, so need to inser extractelement/shuffles after this instruction. Fixes https://github.com/llvm/llvm-project/issues/102187
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@ -14049,12 +14049,19 @@ Value *BoUpSLP::vectorizeTree(
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"ExternallyUsedValues map or remain as scalar in vectorized "
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"instructions");
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if (auto *VecI = dyn_cast<Instruction>(Vec)) {
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if (auto *PHI = dyn_cast<PHINode>(VecI))
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Builder.SetInsertPoint(PHI->getParent(),
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PHI->getParent()->getFirstNonPHIIt());
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else
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if (auto *PHI = dyn_cast<PHINode>(VecI)) {
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if (PHI->getParent()->isLandingPad())
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Builder.SetInsertPoint(
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PHI->getParent(),
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std::next(
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PHI->getParent()->getLandingPadInst()->getIterator()));
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else
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Builder.SetInsertPoint(PHI->getParent(),
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PHI->getParent()->getFirstNonPHIIt());
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} else {
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Builder.SetInsertPoint(VecI->getParent(),
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std::next(VecI->getIterator()));
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}
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} else {
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Builder.SetInsertPoint(&F->getEntryBlock(), F->getEntryBlock().begin());
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}
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@ -14080,11 +14087,18 @@ Value *BoUpSLP::vectorizeTree(
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auto VecIt = VectorCasts.find(Key);
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if (VecIt == VectorCasts.end()) {
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IRBuilderBase::InsertPointGuard Guard(Builder);
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if (auto *IVec = dyn_cast<PHINode>(Vec))
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Builder.SetInsertPoint(
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IVec->getParent()->getFirstNonPHIOrDbgOrLifetime());
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else if (auto *IVec = dyn_cast<Instruction>(Vec))
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if (auto *IVec = dyn_cast<PHINode>(Vec)) {
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if (IVec->getParent()->isLandingPad())
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Builder.SetInsertPoint(IVec->getParent(),
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std::next(IVec->getParent()
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->getLandingPadInst()
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->getIterator()));
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else
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Builder.SetInsertPoint(
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IVec->getParent()->getFirstNonPHIOrDbgOrLifetime());
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} else if (auto *IVec = dyn_cast<Instruction>(Vec)) {
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Builder.SetInsertPoint(IVec->getNextNonDebugInstruction());
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}
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Vec = Builder.CreateIntCast(
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Vec,
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getWidenedType(
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@ -0,0 +1,40 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -S --passes=slp-vectorizer -slp-threshold=-99999 -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
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define void @test() personality ptr null {
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; CHECK-LABEL: define void @test() personality ptr null {
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; CHECK-NEXT: [[BB:.*]]:
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; CHECK-NEXT: invoke void null()
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; CHECK-NEXT: to label %[[BB65:.*]] unwind label %[[BB4:.*]]
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; CHECK: [[BB2:.*]]:
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; CHECK-NEXT: invoke void null()
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; CHECK-NEXT: to label %[[BB65]] unwind label %[[BB4]]
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; CHECK: [[BB4]]:
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; CHECK-NEXT: [[TMP0:%.*]] = phi <2 x i32> [ zeroinitializer, %[[BB]] ], [ poison, %[[BB2]] ]
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; CHECK-NEXT: [[LANDINGPAD:%.*]] = landingpad { ptr, i32 }
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; CHECK-NEXT: cleanup
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; CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x i32> [[TMP0]], i32 1
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; CHECK-NEXT: call void null(i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]], i32 [[TMP1]])
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; CHECK-NEXT: ret void
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; CHECK: [[BB65]]:
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; CHECK-NEXT: ret void
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;
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bb:
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invoke void null()
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to label %bb65 unwind label %bb4
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bb2:
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invoke void null()
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to label %bb65 unwind label %bb4
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bb4:
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%phi5 = phi i32 [ 0, %bb ], [ 0, %bb2 ]
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%phi6 = phi i32 [ 0, %bb ], [ 0, %bb2 ]
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%landingpad = landingpad { ptr, i32 }
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cleanup
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call void null(i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5, i32 %phi5)
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ret void
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bb65:
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ret void
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}
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