[x86] translate SSE packed FP comparison builtins to IR
As noted in the code comment, a potential follow-on would be to remove
the builtins themselves. Other than ord/unord, this already works as
expected. Eg:
typedef float v4sf __attribute__((__vector_size__(16)));
v4sf fcmpgt(v4sf a, v4sf b) { return a > b; }
Differential Revision: http://reviews.llvm.org/D21268
llvm-svn: 272840
This commit is contained in:
Sanjay Patel
parent
062c26f1f0
commit
280cfd1a69
@ -6419,6 +6419,36 @@ Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID,
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Ops.push_back(llvm::ConstantInt::get(getLLVMContext(), Result));
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}
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// These exist so that the builtin that takes an immediate can be bounds
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// checked by clang to avoid passing bad immediates to the backend. Since
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// AVX has a larger immediate than SSE we would need separate builtins to
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// do the different bounds checking. Rather than create a clang specific
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// SSE only builtin, this implements eight separate builtins to match gcc
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// implementation.
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auto getCmpIntrinsicCall = [this, &Ops](Intrinsic::ID ID, unsigned Imm) {
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Ops.push_back(llvm::ConstantInt::get(Int8Ty, Imm));
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llvm::Function *F = CGM.getIntrinsic(ID);
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return Builder.CreateCall(F, Ops);
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};
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// For the vector forms of FP comparisons, translate the builtins directly to
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// IR.
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// TODO: The builtins could be removed if the SSE header files used vector
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// extension comparisons directly (vector ordered/unordered may need
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// additional support via __builtin_isnan()).
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llvm::VectorType *V2F64 =
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llvm::VectorType::get(llvm::Type::getDoubleTy(getLLVMContext()), 2);
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llvm::VectorType *V4F32 =
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llvm::VectorType::get(llvm::Type::getFloatTy(getLLVMContext()), 4);
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auto getVectorFCmpIR = [this, &Ops](CmpInst::Predicate Pred,
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llvm::VectorType *FPVecTy) {
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Value *Cmp = Builder.CreateFCmp(Pred, Ops[0], Ops[1]);
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llvm::VectorType *IntVecTy = llvm::VectorType::getInteger(FPVecTy);
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Value *Sext = Builder.CreateSExt(Cmp, IntVecTy);
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return Builder.CreateBitCast(Sext, FPVecTy);
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};
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switch (BuiltinID) {
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default: return nullptr;
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case X86::BI__builtin_cpu_supports: {
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@ -6857,154 +6887,74 @@ Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID,
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Ops[0]);
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return Builder.CreateExtractValue(Call, 1);
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}
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// SSE comparison intrisics
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// SSE packed comparison intrinsics
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case X86::BI__builtin_ia32_cmpeqps:
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return getVectorFCmpIR(CmpInst::FCMP_OEQ, V4F32);
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case X86::BI__builtin_ia32_cmpltps:
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return getVectorFCmpIR(CmpInst::FCMP_OLT, V4F32);
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case X86::BI__builtin_ia32_cmpleps:
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return getVectorFCmpIR(CmpInst::FCMP_OLE, V4F32);
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case X86::BI__builtin_ia32_cmpunordps:
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return getVectorFCmpIR(CmpInst::FCMP_UNO, V4F32);
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case X86::BI__builtin_ia32_cmpneqps:
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return getVectorFCmpIR(CmpInst::FCMP_UNE, V4F32);
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case X86::BI__builtin_ia32_cmpnltps:
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return getVectorFCmpIR(CmpInst::FCMP_UGE, V4F32);
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case X86::BI__builtin_ia32_cmpnleps:
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return getVectorFCmpIR(CmpInst::FCMP_UGT, V4F32);
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case X86::BI__builtin_ia32_cmpordps:
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case X86::BI__builtin_ia32_cmpeqss:
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case X86::BI__builtin_ia32_cmpltss:
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case X86::BI__builtin_ia32_cmpless:
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case X86::BI__builtin_ia32_cmpunordss:
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case X86::BI__builtin_ia32_cmpneqss:
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case X86::BI__builtin_ia32_cmpnltss:
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case X86::BI__builtin_ia32_cmpnless:
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case X86::BI__builtin_ia32_cmpordss:
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return getVectorFCmpIR(CmpInst::FCMP_ORD, V4F32);
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case X86::BI__builtin_ia32_cmpeqpd:
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return getVectorFCmpIR(CmpInst::FCMP_OEQ, V2F64);
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case X86::BI__builtin_ia32_cmpltpd:
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return getVectorFCmpIR(CmpInst::FCMP_OLT, V2F64);
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case X86::BI__builtin_ia32_cmplepd:
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return getVectorFCmpIR(CmpInst::FCMP_OLE, V2F64);
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case X86::BI__builtin_ia32_cmpunordpd:
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return getVectorFCmpIR(CmpInst::FCMP_UNO, V2F64);
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case X86::BI__builtin_ia32_cmpneqpd:
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return getVectorFCmpIR(CmpInst::FCMP_UNE, V2F64);
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case X86::BI__builtin_ia32_cmpnltpd:
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return getVectorFCmpIR(CmpInst::FCMP_UGE, V2F64);
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case X86::BI__builtin_ia32_cmpnlepd:
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return getVectorFCmpIR(CmpInst::FCMP_UGT, V2F64);
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case X86::BI__builtin_ia32_cmpordpd:
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return getVectorFCmpIR(CmpInst::FCMP_ORD, V2F64);
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// SSE scalar comparison intrinsics
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case X86::BI__builtin_ia32_cmpeqss:
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return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 0);
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case X86::BI__builtin_ia32_cmpltss:
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return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 1);
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case X86::BI__builtin_ia32_cmpless:
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return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 2);
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case X86::BI__builtin_ia32_cmpunordss:
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return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 3);
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case X86::BI__builtin_ia32_cmpneqss:
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return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 4);
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case X86::BI__builtin_ia32_cmpnltss:
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return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 5);
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case X86::BI__builtin_ia32_cmpnless:
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return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 6);
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case X86::BI__builtin_ia32_cmpordss:
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return getCmpIntrinsicCall(Intrinsic::x86_sse_cmp_ss, 7);
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case X86::BI__builtin_ia32_cmpeqsd:
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return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 0);
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case X86::BI__builtin_ia32_cmpltsd:
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return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 1);
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case X86::BI__builtin_ia32_cmplesd:
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return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 2);
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case X86::BI__builtin_ia32_cmpunordsd:
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return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 3);
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case X86::BI__builtin_ia32_cmpneqsd:
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return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 4);
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case X86::BI__builtin_ia32_cmpnltsd:
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return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 5);
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case X86::BI__builtin_ia32_cmpnlesd:
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return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 6);
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case X86::BI__builtin_ia32_cmpordsd:
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// These exist so that the builtin that takes an immediate can be bounds
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// checked by clang to avoid passing bad immediates to the backend. Since
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// AVX has a larger immediate than SSE we would need separate builtins to
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// do the different bounds checking. Rather than create a clang specific
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// SSE only builtin, this implements eight separate builtins to match gcc
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// implementation.
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// Choose the immediate.
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unsigned Imm;
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switch (BuiltinID) {
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default: llvm_unreachable("Unsupported intrinsic!");
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case X86::BI__builtin_ia32_cmpeqps:
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case X86::BI__builtin_ia32_cmpeqss:
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case X86::BI__builtin_ia32_cmpeqpd:
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case X86::BI__builtin_ia32_cmpeqsd:
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Imm = 0;
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break;
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case X86::BI__builtin_ia32_cmpltps:
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case X86::BI__builtin_ia32_cmpltss:
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case X86::BI__builtin_ia32_cmpltpd:
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case X86::BI__builtin_ia32_cmpltsd:
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Imm = 1;
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break;
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case X86::BI__builtin_ia32_cmpleps:
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case X86::BI__builtin_ia32_cmpless:
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case X86::BI__builtin_ia32_cmplepd:
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case X86::BI__builtin_ia32_cmplesd:
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Imm = 2;
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break;
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case X86::BI__builtin_ia32_cmpunordps:
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case X86::BI__builtin_ia32_cmpunordss:
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case X86::BI__builtin_ia32_cmpunordpd:
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case X86::BI__builtin_ia32_cmpunordsd:
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Imm = 3;
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break;
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case X86::BI__builtin_ia32_cmpneqps:
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case X86::BI__builtin_ia32_cmpneqss:
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case X86::BI__builtin_ia32_cmpneqpd:
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case X86::BI__builtin_ia32_cmpneqsd:
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Imm = 4;
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break;
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case X86::BI__builtin_ia32_cmpnltps:
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case X86::BI__builtin_ia32_cmpnltss:
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case X86::BI__builtin_ia32_cmpnltpd:
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case X86::BI__builtin_ia32_cmpnltsd:
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Imm = 5;
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break;
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case X86::BI__builtin_ia32_cmpnleps:
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case X86::BI__builtin_ia32_cmpnless:
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case X86::BI__builtin_ia32_cmpnlepd:
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case X86::BI__builtin_ia32_cmpnlesd:
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Imm = 6;
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break;
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case X86::BI__builtin_ia32_cmpordps:
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case X86::BI__builtin_ia32_cmpordss:
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case X86::BI__builtin_ia32_cmpordpd:
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case X86::BI__builtin_ia32_cmpordsd:
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Imm = 7;
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break;
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}
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// Choose the intrinsic ID.
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const char *name;
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Intrinsic::ID ID;
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switch (BuiltinID) {
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default: llvm_unreachable("Unsupported intrinsic!");
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case X86::BI__builtin_ia32_cmpeqps:
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case X86::BI__builtin_ia32_cmpltps:
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case X86::BI__builtin_ia32_cmpleps:
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case X86::BI__builtin_ia32_cmpunordps:
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case X86::BI__builtin_ia32_cmpneqps:
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case X86::BI__builtin_ia32_cmpnltps:
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case X86::BI__builtin_ia32_cmpnleps:
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case X86::BI__builtin_ia32_cmpordps:
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name = "cmpps";
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ID = Intrinsic::x86_sse_cmp_ps;
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break;
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case X86::BI__builtin_ia32_cmpeqss:
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case X86::BI__builtin_ia32_cmpltss:
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case X86::BI__builtin_ia32_cmpless:
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case X86::BI__builtin_ia32_cmpunordss:
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case X86::BI__builtin_ia32_cmpneqss:
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case X86::BI__builtin_ia32_cmpnltss:
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case X86::BI__builtin_ia32_cmpnless:
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case X86::BI__builtin_ia32_cmpordss:
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name = "cmpss";
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ID = Intrinsic::x86_sse_cmp_ss;
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break;
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case X86::BI__builtin_ia32_cmpeqpd:
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case X86::BI__builtin_ia32_cmpltpd:
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case X86::BI__builtin_ia32_cmplepd:
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case X86::BI__builtin_ia32_cmpunordpd:
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case X86::BI__builtin_ia32_cmpneqpd:
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case X86::BI__builtin_ia32_cmpnltpd:
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case X86::BI__builtin_ia32_cmpnlepd:
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case X86::BI__builtin_ia32_cmpordpd:
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name = "cmppd";
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ID = Intrinsic::x86_sse2_cmp_pd;
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break;
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case X86::BI__builtin_ia32_cmpeqsd:
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case X86::BI__builtin_ia32_cmpltsd:
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case X86::BI__builtin_ia32_cmplesd:
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case X86::BI__builtin_ia32_cmpunordsd:
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case X86::BI__builtin_ia32_cmpneqsd:
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case X86::BI__builtin_ia32_cmpnltsd:
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case X86::BI__builtin_ia32_cmpnlesd:
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case X86::BI__builtin_ia32_cmpordsd:
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name = "cmpsd";
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ID = Intrinsic::x86_sse2_cmp_sd;
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break;
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}
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Ops.push_back(llvm::ConstantInt::get(Int8Ty, Imm));
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llvm::Function *F = CGM.getIntrinsic(ID);
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return Builder.CreateCall(F, Ops, name);
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return getCmpIntrinsicCall(Intrinsic::x86_sse2_cmp_sd, 7);
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}
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}
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@ -473,7 +473,9 @@ __m256i test_mm256_mask_i32gather_epi64(__m256i a, long long const *b, __m128i c
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__m128d test_mm_i32gather_pd(double const *b, __m128i c) {
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// CHECK-LABEL: test_mm_i32gather_pd
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// CHECK: call <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}}, i8 0)
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// CHECK: [[CMP:%.*]] = fcmp oeq <2 x double>
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// CHECK-NEXT: [[SEXT:%.*]] = sext <2 x i1> [[CMP]] to <2 x i64>
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// CHECK-NEXT: [[BC:%.*]] = bitcast <2 x i64> [[SEXT]] to <2 x double>
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// CHECK: call <2 x double> @llvm.x86.avx2.gather.d.pd(<2 x double> undef, i8* %{{.*}}, <4 x i32> %{{.*}}, <2 x double> %{{.*}}, i8 2)
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return _mm_i32gather_pd(b, c, 2);
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}
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@ -499,7 +501,9 @@ __m256d test_mm256_mask_i32gather_pd(__m256d a, double const *b, __m128i c, __m2
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__m128 test_mm_i32gather_ps(float const *b, __m128i c) {
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// CHECK-LABEL: test_mm_i32gather_ps
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// CHECK: call <4 x float> @llvm.x86.sse.cmp.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 0)
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// CHECK: [[CMP:%.*]] = fcmp oeq <4 x float>
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// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>
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// CHECK-NEXT: [[BC:%.*]] = bitcast <4 x i32> [[SEXT]] to <4 x float>
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// CHECK: call <4 x float> @llvm.x86.avx2.gather.d.ps(<4 x float> undef, i8* %{{.*}}, <4 x i32> %{{.*}}, <4 x float> %{{.*}}, i8 2)
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return _mm_i32gather_ps(b, c, 2);
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}
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@ -573,7 +577,9 @@ __m256i test_mm256_mask_i64gather_epi64(__m256i a, long long const *b, __m256i c
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__m128d test_mm_i64gather_pd(double const *b, __m128i c) {
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// CHECK-LABEL: test_mm_i64gather_pd
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// CHECK: call <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}}, i8 0)
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// CHECK: [[CMP:%.*]] = fcmp oeq <2 x double>
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// CHECK-NEXT: [[SEXT:%.*]] = sext <2 x i1> [[CMP]] to <2 x i64>
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// CHECK-NEXT: [[BC:%.*]] = bitcast <2 x i64> [[SEXT]] to <2 x double>
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// CHECK: call <2 x double> @llvm.x86.avx2.gather.q.pd(<2 x double> undef, i8* %{{.*}}, <2 x i64> %{{.*}}, <2 x double> %{{.*}}, i8 2)
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return _mm_i64gather_pd(b, c, 2);
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}
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@ -599,7 +605,9 @@ __m256d test_mm256_mask_i64gather_pd(__m256d a, double const *b, __m256i c, __m2
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__m128 test_mm_i64gather_ps(float const *b, __m128i c) {
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// CHECK-LABEL: test_mm_i64gather_ps
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// CHECK: call <4 x float> @llvm.x86.sse.cmp.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 0)
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// CHECK: [[CMP:%.*]] = fcmp oeq <4 x float>
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// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>
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// CHECK-NEXT: [[BC:%.*]] = bitcast <4 x i32> [[SEXT]] to <4 x float>
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// CHECK: call <4 x float> @llvm.x86.avx2.gather.q.ps(<4 x float> undef, i8* %{{.*}}, <2 x i64> %{{.*}}, <4 x float> %{{.*}}, i8 2)
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return _mm_i64gather_ps(b, c, 2);
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}
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@ -612,7 +620,9 @@ __m128 test_mm_mask_i64gather_ps(__m128 a, float const *b, __m128i c, __m128 d)
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__m128 test_mm256_i64gather_ps(float const *b, __m256i c) {
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// CHECK-LABEL: test_mm256_i64gather_ps
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// CHECK: call <4 x float> @llvm.x86.sse.cmp.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 0)
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// CHECK: [[CMP:%.*]] = fcmp oeq <4 x float>
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// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>
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// CHECK-NEXT: [[BC:%.*]] = bitcast <4 x i32> [[SEXT]] to <4 x float>
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// CHECK: call <4 x float> @llvm.x86.avx2.gather.q.ps.256(<4 x float> undef, i8* %{{.*}}, <4 x i64> %{{.*}}, <4 x float> %{{.*}}, i8 2)
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return _mm256_i64gather_ps(b, c, 2);
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}
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@ -37,7 +37,10 @@ __m128 test_mm_andnot_ps(__m128 A, __m128 B) {
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__m128 test_mm_cmpeq_ps(__m128 __a, __m128 __b) {
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// CHECK-LABEL: @test_mm_cmpeq_ps
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// CHECK: @llvm.x86.sse.cmp.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 0)
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// CHECK: [[CMP:%.*]] = fcmp oeq <4 x float>
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// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>
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// CHECK-NEXT: [[BC:%.*]] = bitcast <4 x i32> [[SEXT]] to <4 x float>
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// CHECK-NEXT: ret <4 x float> [[BC]]
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return _mm_cmpeq_ps(__a, __b);
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}
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@ -49,7 +52,10 @@ __m128 test_mm_cmpeq_ss(__m128 __a, __m128 __b) {
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__m128 test_mm_cmpge_ps(__m128 __a, __m128 __b) {
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// CHECK-LABEL: @test_mm_cmpge_ps
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// CHECK: @llvm.x86.sse.cmp.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 2)
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// CHECK: [[CMP:%.*]] = fcmp ole <4 x float>
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// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>
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// CHECK-NEXT: [[BC:%.*]] = bitcast <4 x i32> [[SEXT]] to <4 x float>
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// CHECK-NEXT: ret <4 x float> [[BC]]
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return _mm_cmpge_ps(__a, __b);
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}
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|
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@ -62,7 +68,10 @@ __m128 test_mm_cmpge_ss(__m128 __a, __m128 __b) {
|
||||
|
||||
__m128 test_mm_cmpgt_ps(__m128 __a, __m128 __b) {
|
||||
// CHECK-LABEL: @test_mm_cmpgt_ps
|
||||
// CHECK: @llvm.x86.sse.cmp.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 1)
|
||||
// CHECK: [[CMP:%.*]] = fcmp olt <4 x float>
|
||||
// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>
|
||||
// CHECK-NEXT: [[BC:%.*]] = bitcast <4 x i32> [[SEXT]] to <4 x float>
|
||||
// CHECK-NEXT: ret <4 x float> [[BC]]
|
||||
return _mm_cmpgt_ps(__a, __b);
|
||||
}
|
||||
|
||||
@ -75,7 +84,10 @@ __m128 test_mm_cmpgt_ss(__m128 __a, __m128 __b) {
|
||||
|
||||
__m128 test_mm_cmple_ps(__m128 __a, __m128 __b) {
|
||||
// CHECK-LABEL: @test_mm_cmple_ps
|
||||
// CHECK: @llvm.x86.sse.cmp.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 2)
|
||||
// CHECK: [[CMP:%.*]] = fcmp ole <4 x float>
|
||||
// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>
|
||||
// CHECK-NEXT: [[BC:%.*]] = bitcast <4 x i32> [[SEXT]] to <4 x float>
|
||||
// CHECK-NEXT: ret <4 x float> [[BC]]
|
||||
return _mm_cmple_ps(__a, __b);
|
||||
}
|
||||
|
||||
@ -87,7 +99,10 @@ __m128 test_mm_cmple_ss(__m128 __a, __m128 __b) {
|
||||
|
||||
__m128 test_mm_cmplt_ps(__m128 __a, __m128 __b) {
|
||||
// CHECK-LABEL: @test_mm_cmplt_ps
|
||||
// CHECK: @llvm.x86.sse.cmp.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 1)
|
||||
// CHECK: [[CMP:%.*]] = fcmp olt <4 x float>
|
||||
// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>
|
||||
// CHECK-NEXT: [[BC:%.*]] = bitcast <4 x i32> [[SEXT]] to <4 x float>
|
||||
// CHECK-NEXT: ret <4 x float> [[BC]]
|
||||
return _mm_cmplt_ps(__a, __b);
|
||||
}
|
||||
|
||||
@ -99,7 +114,10 @@ __m128 test_mm_cmplt_ss(__m128 __a, __m128 __b) {
|
||||
|
||||
__m128 test_mm_cmpneq_ps(__m128 __a, __m128 __b) {
|
||||
// CHECK-LABEL: @test_mm_cmpneq_ps
|
||||
// CHECK: @llvm.x86.sse.cmp.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 4)
|
||||
// CHECK: [[CMP:%.*]] = fcmp une <4 x float>
|
||||
// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>
|
||||
// CHECK-NEXT: [[BC:%.*]] = bitcast <4 x i32> [[SEXT]] to <4 x float>
|
||||
// CHECK-NEXT: ret <4 x float> [[BC]]
|
||||
return _mm_cmpneq_ps(__a, __b);
|
||||
}
|
||||
|
||||
@ -111,7 +129,10 @@ __m128 test_mm_cmpneq_ss(__m128 __a, __m128 __b) {
|
||||
|
||||
__m128 test_mm_cmpnge_ps(__m128 __a, __m128 __b) {
|
||||
// CHECK-LABEL: @test_mm_cmpnge_ps
|
||||
// CHECK: @llvm.x86.sse.cmp.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 6)
|
||||
// CHECK: [[CMP:%.*]] = fcmp ugt <4 x float>
|
||||
// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>
|
||||
// CHECK-NEXT: [[BC:%.*]] = bitcast <4 x i32> [[SEXT]] to <4 x float>
|
||||
// CHECK-NEXT: ret <4 x float> [[BC]]
|
||||
return _mm_cmpnge_ps(__a, __b);
|
||||
}
|
||||
|
||||
@ -124,7 +145,10 @@ __m128 test_mm_cmpnge_ss(__m128 __a, __m128 __b) {
|
||||
|
||||
__m128 test_mm_cmpngt_ps(__m128 __a, __m128 __b) {
|
||||
// CHECK-LABEL: @test_mm_cmpngt_ps
|
||||
// CHECK: @llvm.x86.sse.cmp.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 5)
|
||||
// CHECK: [[CMP:%.*]] = fcmp uge <4 x float>
|
||||
// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>
|
||||
// CHECK-NEXT: [[BC:%.*]] = bitcast <4 x i32> [[SEXT]] to <4 x float>
|
||||
// CHECK-NEXT: ret <4 x float> [[BC]]
|
||||
return _mm_cmpngt_ps(__a, __b);
|
||||
}
|
||||
|
||||
@ -137,7 +161,10 @@ __m128 test_mm_cmpngt_ss(__m128 __a, __m128 __b) {
|
||||
|
||||
__m128 test_mm_cmpnle_ps(__m128 __a, __m128 __b) {
|
||||
// CHECK-LABEL: @test_mm_cmpnle_ps
|
||||
// CHECK: @llvm.x86.sse.cmp.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 6)
|
||||
// CHECK: [[CMP:%.*]] = fcmp ugt <4 x float>
|
||||
// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>
|
||||
// CHECK-NEXT: [[BC:%.*]] = bitcast <4 x i32> [[SEXT]] to <4 x float>
|
||||
// CHECK-NEXT: ret <4 x float> [[BC]]
|
||||
return _mm_cmpnle_ps(__a, __b);
|
||||
}
|
||||
|
||||
@ -149,7 +176,10 @@ __m128 test_mm_cmpnle_ss(__m128 __a, __m128 __b) {
|
||||
|
||||
__m128 test_mm_cmpnlt_ps(__m128 __a, __m128 __b) {
|
||||
// CHECK-LABEL: @test_mm_cmpnlt_ps
|
||||
// CHECK: @llvm.x86.sse.cmp.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 5)
|
||||
// CHECK: [[CMP:%.*]] = fcmp uge <4 x float>
|
||||
// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>
|
||||
// CHECK-NEXT: [[BC:%.*]] = bitcast <4 x i32> [[SEXT]] to <4 x float>
|
||||
// CHECK-NEXT: ret <4 x float> [[BC]]
|
||||
return _mm_cmpnlt_ps(__a, __b);
|
||||
}
|
||||
|
||||
@ -161,7 +191,10 @@ __m128 test_mm_cmpnlt_ss(__m128 __a, __m128 __b) {
|
||||
|
||||
__m128 test_mm_cmpord_ps(__m128 __a, __m128 __b) {
|
||||
// CHECK-LABEL: @test_mm_cmpord_ps
|
||||
// CHECK: @llvm.x86.sse.cmp.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 7)
|
||||
// CHECK: [[CMP:%.*]] = fcmp ord <4 x float>
|
||||
// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>
|
||||
// CHECK-NEXT: [[BC:%.*]] = bitcast <4 x i32> [[SEXT]] to <4 x float>
|
||||
// CHECK-NEXT: ret <4 x float> [[BC]]
|
||||
return _mm_cmpord_ps(__a, __b);
|
||||
}
|
||||
|
||||
@ -173,7 +206,10 @@ __m128 test_mm_cmpord_ss(__m128 __a, __m128 __b) {
|
||||
|
||||
__m128 test_mm_cmpunord_ps(__m128 __a, __m128 __b) {
|
||||
// CHECK-LABEL: @test_mm_cmpunord_ps
|
||||
// CHECK: @llvm.x86.sse.cmp.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, i8 3)
|
||||
// CHECK: [[CMP:%.*]] = fcmp uno <4 x float>
|
||||
// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32>
|
||||
// CHECK-NEXT: [[BC:%.*]] = bitcast <4 x i32> [[SEXT]] to <4 x float>
|
||||
// CHECK-NEXT: ret <4 x float> [[BC]]
|
||||
return _mm_cmpunord_ps(__a, __b);
|
||||
}
|
||||
|
||||
|
||||
@ -183,7 +183,10 @@ __m128i test_mm_cmpeq_epi32(__m128i A, __m128i B) {
|
||||
|
||||
__m128d test_mm_cmpeq_pd(__m128d A, __m128d B) {
|
||||
// CHECK-LABEL: test_mm_cmpeq_pd
|
||||
// CHECK: call <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}}, i8 0)
|
||||
// CHECK: [[CMP:%.*]] = fcmp oeq <2 x double>
|
||||
// CHECK-NEXT: [[SEXT:%.*]] = sext <2 x i1> [[CMP]] to <2 x i64>
|
||||
// CHECK-NEXT: [[BC:%.*]] = bitcast <2 x i64> [[SEXT]] to <2 x double>
|
||||
// CHECK-NEXT: ret <2 x double> [[BC]]
|
||||
return _mm_cmpeq_pd(A, B);
|
||||
}
|
||||
|
||||
@ -195,7 +198,10 @@ __m128d test_mm_cmpeq_sd(__m128d A, __m128d B) {
|
||||
|
||||
__m128d test_mm_cmpge_pd(__m128d A, __m128d B) {
|
||||
// CHECK-LABEL: test_mm_cmpge_pd
|
||||
// CHECK: call <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}}, i8 2)
|
||||
// CHECK: [[CMP:%.*]] = fcmp ole <2 x double>
|
||||
// CHECK-NEXT: [[SEXT:%.*]] = sext <2 x i1> [[CMP]] to <2 x i64>
|
||||
// CHECK-NEXT: [[BC:%.*]] = bitcast <2 x i64> [[SEXT]] to <2 x double>
|
||||
// CHECK-NEXT: ret <2 x double> [[BC]]
|
||||
return _mm_cmpge_pd(A, B);
|
||||
}
|
||||
|
||||
@ -229,7 +235,10 @@ __m128i test_mm_cmpgt_epi32(__m128i A, __m128i B) {
|
||||
|
||||
__m128d test_mm_cmpgt_pd(__m128d A, __m128d B) {
|
||||
// CHECK-LABEL: test_mm_cmpgt_pd
|
||||
// CHECK: call <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}}, i8 1)
|
||||
// CHECK: [[CMP:%.*]] = fcmp olt <2 x double>
|
||||
// CHECK-NEXT: [[SEXT:%.*]] = sext <2 x i1> [[CMP]] to <2 x i64>
|
||||
// CHECK-NEXT: [[BC:%.*]] = bitcast <2 x i64> [[SEXT]] to <2 x double>
|
||||
// CHECK-NEXT: ret <2 x double> [[BC]]
|
||||
return _mm_cmpgt_pd(A, B);
|
||||
}
|
||||
|
||||
@ -245,7 +254,10 @@ __m128d test_mm_cmpgt_sd(__m128d A, __m128d B) {
|
||||
|
||||
__m128d test_mm_cmple_pd(__m128d A, __m128d B) {
|
||||
// CHECK-LABEL: test_mm_cmple_pd
|
||||
// CHECK: call <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}}, i8 2)
|
||||
// CHECK: [[CMP:%.*]] = fcmp ole <2 x double>
|
||||
// CHECK-NEXT: [[SEXT:%.*]] = sext <2 x i1> [[CMP]] to <2 x i64>
|
||||
// CHECK-NEXT: [[BC:%.*]] = bitcast <2 x i64> [[SEXT]] to <2 x double>
|
||||
// CHECK-NEXT: ret <2 x double> [[BC]]
|
||||
return _mm_cmple_pd(A, B);
|
||||
}
|
||||
|
||||
@ -275,7 +287,10 @@ __m128i test_mm_cmplt_epi32(__m128i A, __m128i B) {
|
||||
|
||||
__m128d test_mm_cmplt_pd(__m128d A, __m128d B) {
|
||||
// CHECK-LABEL: test_mm_cmplt_pd
|
||||
// CHECK: call <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}}, i8 1)
|
||||
// CHECK: [[CMP:%.*]] = fcmp olt <2 x double>
|
||||
// CHECK-NEXT: [[SEXT:%.*]] = sext <2 x i1> [[CMP]] to <2 x i64>
|
||||
// CHECK-NEXT: [[BC:%.*]] = bitcast <2 x i64> [[SEXT]] to <2 x double>
|
||||
// CHECK-NEXT: ret <2 x double> [[BC]]
|
||||
return _mm_cmplt_pd(A, B);
|
||||
}
|
||||
|
||||
@ -287,7 +302,10 @@ __m128d test_mm_cmplt_sd(__m128d A, __m128d B) {
|
||||
|
||||
__m128d test_mm_cmpneq_pd(__m128d A, __m128d B) {
|
||||
// CHECK-LABEL: test_mm_cmpneq_pd
|
||||
// CHECK: call <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}}, i8 4)
|
||||
// CHECK: [[CMP:%.*]] = fcmp une <2 x double>
|
||||
// CHECK-NEXT: [[SEXT:%.*]] = sext <2 x i1> [[CMP]] to <2 x i64>
|
||||
// CHECK-NEXT: [[BC:%.*]] = bitcast <2 x i64> [[SEXT]] to <2 x double>
|
||||
// CHECK-NEXT: ret <2 x double> [[BC]]
|
||||
return _mm_cmpneq_pd(A, B);
|
||||
}
|
||||
|
||||
@ -299,7 +317,10 @@ __m128d test_mm_cmpneq_sd(__m128d A, __m128d B) {
|
||||
|
||||
__m128d test_mm_cmpnge_pd(__m128d A, __m128d B) {
|
||||
// CHECK-LABEL: test_mm_cmpnge_pd
|
||||
// CHECK: call <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}}, i8 6)
|
||||
// CHECK: [[CMP:%.*]] = fcmp ugt <2 x double>
|
||||
// CHECK-NEXT: [[SEXT:%.*]] = sext <2 x i1> [[CMP]] to <2 x i64>
|
||||
// CHECK-NEXT: [[BC:%.*]] = bitcast <2 x i64> [[SEXT]] to <2 x double>
|
||||
// CHECK-NEXT: ret <2 x double> [[BC]]
|
||||
return _mm_cmpnge_pd(A, B);
|
||||
}
|
||||
|
||||
@ -315,7 +336,10 @@ __m128d test_mm_cmpnge_sd(__m128d A, __m128d B) {
|
||||
|
||||
__m128d test_mm_cmpngt_pd(__m128d A, __m128d B) {
|
||||
// CHECK-LABEL: test_mm_cmpngt_pd
|
||||
// CHECK: call <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}}, i8 5)
|
||||
// CHECK: [[CMP:%.*]] = fcmp uge <2 x double>
|
||||
// CHECK-NEXT: [[SEXT:%.*]] = sext <2 x i1> [[CMP]] to <2 x i64>
|
||||
// CHECK-NEXT: [[BC:%.*]] = bitcast <2 x i64> [[SEXT]] to <2 x double>
|
||||
// CHECK-NEXT: ret <2 x double> [[BC]]
|
||||
return _mm_cmpngt_pd(A, B);
|
||||
}
|
||||
|
||||
@ -331,7 +355,10 @@ __m128d test_mm_cmpngt_sd(__m128d A, __m128d B) {
|
||||
|
||||
__m128d test_mm_cmpnle_pd(__m128d A, __m128d B) {
|
||||
// CHECK-LABEL: test_mm_cmpnle_pd
|
||||
// CHECK: call <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}}, i8 6)
|
||||
// CHECK: [[CMP:%.*]] = fcmp ugt <2 x double>
|
||||
// CHECK-NEXT: [[SEXT:%.*]] = sext <2 x i1> [[CMP]] to <2 x i64>
|
||||
// CHECK-NEXT: [[BC:%.*]] = bitcast <2 x i64> [[SEXT]] to <2 x double>
|
||||
// CHECK-NEXT: ret <2 x double> [[BC]]
|
||||
return _mm_cmpnle_pd(A, B);
|
||||
}
|
||||
|
||||
@ -343,7 +370,10 @@ __m128d test_mm_cmpnle_sd(__m128d A, __m128d B) {
|
||||
|
||||
__m128d test_mm_cmpnlt_pd(__m128d A, __m128d B) {
|
||||
// CHECK-LABEL: test_mm_cmpnlt_pd
|
||||
// CHECK: call <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}}, i8 5)
|
||||
// CHECK: [[CMP:%.*]] = fcmp uge <2 x double>
|
||||
// CHECK-NEXT: [[SEXT:%.*]] = sext <2 x i1> [[CMP]] to <2 x i64>
|
||||
// CHECK-NEXT: [[BC:%.*]] = bitcast <2 x i64> [[SEXT]] to <2 x double>
|
||||
// CHECK-NEXT: ret <2 x double> [[BC]]
|
||||
return _mm_cmpnlt_pd(A, B);
|
||||
}
|
||||
|
||||
@ -355,7 +385,10 @@ __m128d test_mm_cmpnlt_sd(__m128d A, __m128d B) {
|
||||
|
||||
__m128d test_mm_cmpord_pd(__m128d A, __m128d B) {
|
||||
// CHECK-LABEL: test_mm_cmpord_pd
|
||||
// CHECK: call <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}}, i8 7)
|
||||
// CHECK: [[CMP:%.*]] = fcmp ord <2 x double>
|
||||
// CHECK-NEXT: [[SEXT:%.*]] = sext <2 x i1> [[CMP]] to <2 x i64>
|
||||
// CHECK-NEXT: [[BC:%.*]] = bitcast <2 x i64> [[SEXT]] to <2 x double>
|
||||
// CHECK-NEXT: ret <2 x double> [[BC]]
|
||||
return _mm_cmpord_pd(A, B);
|
||||
}
|
||||
|
||||
@ -367,7 +400,10 @@ __m128d test_mm_cmpord_sd(__m128d A, __m128d B) {
|
||||
|
||||
__m128d test_mm_cmpunord_pd(__m128d A, __m128d B) {
|
||||
// CHECK-LABEL: test_mm_cmpunord_pd
|
||||
// CHECK: call <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}}, i8 3)
|
||||
// CHECK: [[CMP:%.*]] = fcmp uno <2 x double>
|
||||
// CHECK-NEXT: [[SEXT:%.*]] = sext <2 x i1> [[CMP]] to <2 x i64>
|
||||
// CHECK-NEXT: [[BC:%.*]] = bitcast <2 x i64> [[SEXT]] to <2 x double>
|
||||
// CHECK-NEXT: ret <2 x double> [[BC]]
|
||||
return _mm_cmpunord_pd(A, B);
|
||||
}
|
||||
|
||||
|
||||
Loading…
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Reference in New Issue
Block a user