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[CodeGen] Default TargetOptions::RelaxELFRelocations to true

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MC and lld/ELF defaults were flipped in 2016. For Clang: CMake
ENABLE_X86_RELAX_RELOCATIONS defaults to on in 2020. It makes sense for
the TargetOptions default to be true now.

R_X86_64_GOTPCRELX/R_X86_64_REX_GOTPCRELX require GNU ld newer than 2015-10
(subsumed by the current requirement of -fbinutils-version=).

This should fix `rustc -Z plt=no` PIC relocatable files with GNU ld.
(See https://github.com/rust-lang/rust/pull/106380)
This commit is contained in:
Fangrui Song 2023-01-05 13:28:48 -08:00
parent 5751c439be
commit 2aedfdd9b8
5 changed files with 4 additions and 5 deletions
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1
lld/ELF/LTO.cpp
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@ -77,7 +77,6 @@ static lto::Config createConfig() {
// LLD supports the new relocations and address-significance tables.
c.Options = initTargetOptionsFromCodeGenFlags();
c.Options.RelaxELFRelocations = true;
c.Options.EmitAddrsig = true;
for (StringRef C : config->mllvmOpts)
c.MllvmArgs.emplace_back(C.str());

2
llvm/include/llvm/Target/TargetOptions.h
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@ -131,7 +131,7 @@ namespace llvm {
GuaranteedTailCallOpt(false), StackSymbolOrdering(true),
EnableFastISel(false), EnableGlobalISel(false), UseInitArray(false),
LowerGlobalDtorsViaCxaAtExit(false), DisableIntegratedAS(false),
RelaxELFRelocations(false), FunctionSections(false),
RelaxELFRelocations(true), FunctionSections(false),
DataSections(false), IgnoreXCOFFVisibility(false),
XCOFFTracebackTable(true), UniqueSectionNames(true),
UniqueBasicBlockSectionNames(false), TrapUnreachable(false),

2
llvm/lib/CodeGen/CommandFlags.cpp
View File

@ -359,7 +359,7 @@ codegen::RegisterCodeGenFlags::RegisterCodeGenFlags() {
"relax-elf-relocations",
cl::desc(
"Emit GOTPCRELX/REX_GOTPCRELX instead of GOTPCREL on x86-64 ELF"),
cl::init(false));
cl::init(true));
CGBINDOPT(RelaxELFRelocations);
static cl::opt<bool> DataSections(

2
llvm/test/LTO/Resolution/X86/not-prevailing-variables.ll
View File

@ -13,7 +13,7 @@
; CHECK-NEXT: retq
; CHECK: <testVar2>:
; CHECK-NEXT: movq (%rip), %rax
; CHECK-NEXT: R_X86_64_GOTPCREL var2-0x4
; CHECK-NEXT: R_X86_64_REX_GOTPCRELX var2-0x4
; CHECK-NEXT: movl (%rax), %eax
; CHECK-NEXT: retq

2
llvm/test/ThinLTO/X86/cache-config.ll
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@ -3,7 +3,7 @@
; RUN: llvm-lto2 run -o %t.o %t.bc -cache-dir %t.cache -r=%t.bc,globalfunc,plx
; RUN: llvm-lto2 run -o %t.o %t.bc -cache-dir %t.cache -r=%t.bc,globalfunc,plx -mcpu=core2
; RUN: llvm-lto2 run -o %t.o %t.bc -cache-dir %t.cache -r=%t.bc,globalfunc,plx -relax-elf-relocations
; RUN: llvm-lto2 run -o %t.o %t.bc -cache-dir %t.cache -r=%t.bc,globalfunc,plx -relax-elf-relocations=0
; RUN: llvm-lto2 run -o %t.o %t.bc -cache-dir %t.cache -r=%t.bc,globalfunc,plx -function-sections
; RUN: llvm-lto2 run -o %t.o %t.bc -cache-dir %t.cache -r=%t.bc,globalfunc,plx -data-sections
; RUN: llvm-lto2 run -o %t.o %t.bc -cache-dir %t.cache -r=%t.bc,globalfunc,plx -debugger-tune=sce