AMDGPU: Fix -amdgpu-mfma-vgpr-form flag on gfx908 (#150599)
This should be ignored since there are no VGPR forms. This makes it possible to flip the default for the flag to true.
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@ -81,11 +81,15 @@ SIMachineFunctionInfo::SIMachineFunctionInfo(const Function &F,
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PSInputAddr = AMDGPU::getInitialPSInputAddr(F);
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}
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MayNeedAGPRs = ST.hasMAIInsts() && !MFMAVGPRForm;
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if (!MFMAVGPRForm && ST.hasGFX90AInsts() &&
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ST.getMaxNumVGPRs(F) <= AMDGPU::VGPR_32RegClass.getNumRegs() &&
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!mayUseAGPRs(F))
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MayNeedAGPRs = ST.hasMAIInsts();
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if (ST.hasGFX90AInsts()) {
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// FIXME: MayNeedAGPRs is a misnomer for how this is used. MFMA selection
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// should be separated from availability of AGPRs
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if (MFMAVGPRForm ||
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(ST.getMaxNumVGPRs(F) <= AMDGPU::VGPR_32RegClass.getNumRegs() &&
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!mayUseAGPRs(F)))
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MayNeedAGPRs = false; // We will select all MAI with VGPR operands.
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}
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if (AMDGPU::isChainCC(CC)) {
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// Chain functions don't receive an SP from their caller, but are free to
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@ -1,4 +1,7 @@
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; RUN: llc -mtriple=amdgcn -mcpu=gfx908 -show-mc-encoding < %s | FileCheck -check-prefixes=GFX9,GFX908 %s
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; Make sure flag is ignored
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; RUN: llc -mtriple=amdgcn -mcpu=gfx908 -amdgpu-mfma-vgpr-form=1 -show-mc-encoding < %s | FileCheck -check-prefixes=GFX9,GFX908 %s
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; RUN: llc -mtriple=amdgcn -mcpu=gfx90a -show-mc-encoding < %s | FileCheck -check-prefixes=GFX9,GFX90A %s
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; GFX9-DAG: buffer_load_format_xyzw v[{{[0-9:]+}}], v{{[0-9]+}}, s[{{[0-9:]+}}], 0 idxen ; encoding:
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