[InstCombine] freeze operand in div+mul fold
As discussed in issue #37809, this transform is not safe if the input is an undefined value. This is similar to recent changes for urem and sdiv: d428f09b2c9d 99ef341ce943 There is no difference in codegen on the basic examples, but this could lead to regressions. We may need to improve freeze analysis or lowering if that happens. Presumably, in real cases that are similar to the tests where a subsequent transform removes the rem, we will also be able to remove the freeze by seeing that the parameter has 'noundef'.
This commit is contained in:
Sanjay Patel
parent
52b5f1f7d4
commit
2fa8fc3d0a
@ -292,10 +292,12 @@ Instruction *InstCombinerImpl::visitMul(BinaryOperator &I) {
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auto RemOpc = Div->getOpcode() == Instruction::UDiv ? Instruction::URem
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: Instruction::SRem;
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Value *Rem = Builder.CreateBinOp(RemOpc, X, DivOp1);
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// X must be frozen because we are increasing its number of uses.
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Value *XFreeze = Builder.CreateFreeze(X, X->getName() + ".fr");
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Value *Rem = Builder.CreateBinOp(RemOpc, XFreeze, DivOp1);
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if (DivOp1 == Y)
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return BinaryOperator::CreateSub(X, Rem);
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return BinaryOperator::CreateSub(Rem, X);
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return BinaryOperator::CreateSub(XFreeze, Rem);
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return BinaryOperator::CreateSub(Rem, XFreeze);
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}
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}
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@ -113,9 +113,10 @@ define i64 @not_match_inconsistent_values(i64 %x) {
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define i32 @not_match_overflow(i32 %x) {
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; CHECK-LABEL: @not_match_overflow(
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; CHECK-NEXT: [[T:%.*]] = urem i32 [[X:%.*]], 299
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; CHECK-NEXT: [[TMP1:%.*]] = urem i32 [[X]], 299
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; CHECK-NEXT: [[T3:%.*]] = sub i32 [[X]], [[TMP1]]
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; CHECK-NEXT: [[X_FR:%.*]] = freeze i32 [[X:%.*]]
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; CHECK-NEXT: [[T:%.*]] = urem i32 [[X_FR]], 299
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; CHECK-NEXT: [[TMP1:%.*]] = urem i32 [[X_FR]], 299
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; CHECK-NEXT: [[T3:%.*]] = sub i32 [[X_FR]], [[TMP1]]
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; CHECK-NEXT: [[T4:%.*]] = add i32 [[T]], [[T3]]
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; CHECK-NEXT: ret i32 [[T4]]
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;
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@ -30,8 +30,9 @@ define <2 x i32> @sdiv2_vec(<2 x i32> %x) {
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define i32 @sdiv3(i32 %x) {
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; CHECK-LABEL: @sdiv3(
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; CHECK-NEXT: [[TMP1:%.*]] = srem i32 [[X:%.*]], 3
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; CHECK-NEXT: [[Z:%.*]] = sub i32 [[X]], [[TMP1]]
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; CHECK-NEXT: [[X_FR:%.*]] = freeze i32 [[X:%.*]]
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; CHECK-NEXT: [[TMP1:%.*]] = srem i32 [[X_FR]], 3
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; CHECK-NEXT: [[Z:%.*]] = sub i32 [[X_FR]], [[TMP1]]
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; CHECK-NEXT: ret i32 [[Z]]
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;
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%y = sdiv i32 %x, 3
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@ -50,8 +51,9 @@ define i32 @sdiv4(i32 %x) {
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define i32 @sdiv5(i32 %x) {
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; CHECK-LABEL: @sdiv5(
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; CHECK-NEXT: [[TMP1:%.*]] = srem i32 [[X:%.*]], 3
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; CHECK-NEXT: [[Z:%.*]] = sub i32 [[TMP1]], [[X]]
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; CHECK-NEXT: [[X_FR:%.*]] = freeze i32 [[X:%.*]]
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; CHECK-NEXT: [[TMP1:%.*]] = srem i32 [[X_FR]], 3
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; CHECK-NEXT: [[Z:%.*]] = sub i32 [[TMP1]], [[X_FR]]
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; CHECK-NEXT: ret i32 [[Z]]
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;
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%y = sdiv i32 %x, 3
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@ -80,8 +82,8 @@ define i32 @udiv1(i32 %x, i32 %w) {
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define i32 @udiv2(i32 %x, i32 %w) {
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; CHECK-LABEL: @udiv2(
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; CHECK-NEXT: [[Z:%.*]] = lshr exact i32 [[X:%.*]], [[W:%.*]]
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; CHECK-NEXT: ret i32 [[Z]]
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; CHECK-NEXT: [[Z1:%.*]] = lshr exact i32 [[X:%.*]], [[W:%.*]]
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; CHECK-NEXT: ret i32 [[Z1]]
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;
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%y = shl i32 1, %w
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%z = udiv exact i32 %x, %y
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@ -5,7 +5,8 @@ declare void @use(i32)
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define i64 @rem_signed(i64 %x1, i64 %y2) {
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; CHECK-LABEL: @rem_signed(
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; CHECK-NEXT: [[TMP1:%.*]] = srem i64 [[X1:%.*]], [[Y2:%.*]]
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; CHECK-NEXT: [[X1_FR:%.*]] = freeze i64 [[X1:%.*]]
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; CHECK-NEXT: [[TMP1:%.*]] = srem i64 [[X1_FR]], [[Y2:%.*]]
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; CHECK-NEXT: ret i64 [[TMP1]]
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;
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%r = sdiv i64 %x1, %y2
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@ -16,7 +17,8 @@ define i64 @rem_signed(i64 %x1, i64 %y2) {
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define <4 x i32> @rem_signed_vec(<4 x i32> %t, <4 x i32> %u) {
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; CHECK-LABEL: @rem_signed_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = srem <4 x i32> [[T:%.*]], [[U:%.*]]
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; CHECK-NEXT: [[T_FR:%.*]] = freeze <4 x i32> [[T:%.*]]
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; CHECK-NEXT: [[TMP1:%.*]] = srem <4 x i32> [[T_FR]], [[U:%.*]]
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; CHECK-NEXT: ret <4 x i32> [[TMP1]]
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;
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%k = sdiv <4 x i32> %t, %u
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@ -27,7 +29,8 @@ define <4 x i32> @rem_signed_vec(<4 x i32> %t, <4 x i32> %u) {
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define i64 @rem_unsigned(i64 %x1, i64 %y2) {
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; CHECK-LABEL: @rem_unsigned(
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; CHECK-NEXT: [[TMP1:%.*]] = urem i64 [[X1:%.*]], [[Y2:%.*]]
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; CHECK-NEXT: [[X1_FR:%.*]] = freeze i64 [[X1:%.*]]
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; CHECK-NEXT: [[TMP1:%.*]] = urem i64 [[X1_FR]], [[Y2:%.*]]
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; CHECK-NEXT: ret i64 [[TMP1]]
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;
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%r = udiv i64 %x1, %y2
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@ -97,7 +100,8 @@ define <2 x i4> @big_divisor_vec(<2 x i4> %x) {
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define i8 @urem1(i8 %x, i8 %y) {
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; CHECK-LABEL: @urem1(
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; CHECK-NEXT: [[TMP1:%.*]] = urem i8 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[X_FR:%.*]] = freeze i8 [[X:%.*]]
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; CHECK-NEXT: [[TMP1:%.*]] = urem i8 [[X_FR]], [[Y:%.*]]
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; CHECK-NEXT: ret i8 [[TMP1]]
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;
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%A = udiv i8 %x, %y
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@ -108,7 +112,8 @@ define i8 @urem1(i8 %x, i8 %y) {
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define i8 @srem1(i8 %x, i8 %y) {
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; CHECK-LABEL: @srem1(
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; CHECK-NEXT: [[TMP1:%.*]] = srem i8 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[X_FR:%.*]] = freeze i8 [[X:%.*]]
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; CHECK-NEXT: [[TMP1:%.*]] = srem i8 [[X_FR]], [[Y:%.*]]
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; CHECK-NEXT: ret i8 [[TMP1]]
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;
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%A = sdiv i8 %x, %y
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@ -119,7 +124,8 @@ define i8 @srem1(i8 %x, i8 %y) {
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define i8 @urem2(i8 %x, i8 %y) {
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; CHECK-LABEL: @urem2(
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; CHECK-NEXT: [[TMP1:%.*]] = urem i8 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[X_FR:%.*]] = freeze i8 [[X:%.*]]
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; CHECK-NEXT: [[TMP1:%.*]] = urem i8 [[X_FR]], [[Y:%.*]]
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; CHECK-NEXT: [[C:%.*]] = sub i8 0, [[TMP1]]
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; CHECK-NEXT: ret i8 [[C]]
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;
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@ -131,9 +137,10 @@ define i8 @urem2(i8 %x, i8 %y) {
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define i8 @urem3(i8 %x) {
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; CHECK-LABEL: @urem3(
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; CHECK-NEXT: [[TMP1:%.*]] = urem i8 [[X:%.*]], 3
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; CHECK-NEXT: [[B_NEG:%.*]] = sub i8 [[X]], [[TMP1]]
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; CHECK-NEXT: [[C:%.*]] = add i8 [[B_NEG]], [[X]]
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; CHECK-NEXT: [[X_FR:%.*]] = freeze i8 [[X:%.*]]
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; CHECK-NEXT: [[TMP1:%.*]] = urem i8 [[X_FR]], 3
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; CHECK-NEXT: [[B_NEG:%.*]] = sub i8 [[X_FR]], [[TMP1]]
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; CHECK-NEXT: [[C:%.*]] = add i8 [[B_NEG]], [[X_FR]]
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; CHECK-NEXT: ret i8 [[C]]
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;
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%A = udiv i8 %x, 3
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@ -146,7 +153,8 @@ define i8 @urem3(i8 %x) {
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define i32 @sdiv_mul_sdiv(i32 %x, i32 %y) {
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; CHECK-LABEL: @sdiv_mul_sdiv(
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; CHECK-NEXT: [[R:%.*]] = sdiv i32 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[X_FR:%.*]] = freeze i32 [[X:%.*]]
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; CHECK-NEXT: [[R:%.*]] = sdiv i32 [[X_FR]], [[Y:%.*]]
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; CHECK-NEXT: ret i32 [[R]]
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;
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%div = sdiv i32 %x, %y
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@ -159,7 +167,8 @@ define i32 @sdiv_mul_sdiv(i32 %x, i32 %y) {
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define i32 @udiv_mul_udiv(i32 %x, i32 %y) {
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; CHECK-LABEL: @udiv_mul_udiv(
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; CHECK-NEXT: [[R:%.*]] = udiv i32 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[X_FR:%.*]] = freeze i32 [[X:%.*]]
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; CHECK-NEXT: [[R:%.*]] = udiv i32 [[X_FR]], [[Y:%.*]]
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; CHECK-NEXT: ret i32 [[R]]
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;
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%div = udiv i32 %x, %y
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