shylie/llvm-project
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

[AMDGPU] Allow readonly features to be written to IR when there is no target (#148141)

Browse Source 
Fixes: SWDEV-541399
This commit is contained in:
Changpeng Fang 2025-07-29 08:18:00 -07:00 committed by GitHub
parent e68a20e0b7
commit 30ad2e24ab
No known key found for this signature in database
GPG Key ID: B5690EEEBB952194
3 changed files with 22 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
clang/lib/Basic/Targets/AMDGPU.cpp
View File

@ -266,8 +266,11 @@ AMDGPUTargetInfo::AMDGPUTargetInfo(const llvm::Triple &Triple,
MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
CUMode = !(GPUFeatures & llvm::AMDGPU::FEATURE_WGP);
for (auto F : {"image-insts", "gws", "vmem-to-lds-load-insts"})
ReadOnlyFeatures.insert(F);
for (auto F : {"image-insts", "gws", "vmem-to-lds-load-insts"}) {
if (GPUKind != llvm::AMDGPU::GK_NONE)
ReadOnlyFeatures.insert(F);
}
HalfArgsAndReturns = true;
}

2
clang/test/CodeGenOpenCL/amdgpu-features-readonly.cl
View File

@ -1,4 +1,4 @@
// RUN: %clang_cc1 -triple amdgcn -target-feature +gws -o /dev/null %s 2>&1 \
// RUN: %clang_cc1 -triple amdgcn -target-cpu gfx942 -target-feature +gws -o /dev/null %s 2>&1 \
// RUN: | FileCheck --check-prefix=GWS %s
// GWS: warning: feature flag '+gws' is ignored since the feature is read only [-Winvalid-command-line-argument]

16
clang/test/CodeGenOpenCL/amdgpu-readonly-features-written-with-no-target.cl Normal file
View File

@ -0,0 +1,16 @@
// REQUIRES: amdgpu-registered-target
// Check the readonly feature will can be written to the IR
// if there is no target specified.
// RUN: %clang_cc1 -triple amdgcn -emit-llvm -o - %s | FileCheck --check-prefix=NOCPU %s
// RUN: %clang_cc1 -triple amdgcn -target-cpu gfx942 -emit-llvm -o - %s | FileCheck --check-prefix=GFX942 %s
// RUN: %clang_cc1 -triple amdgcn -target-cpu gfx1100 -emit-llvm -o - %s | FileCheck --check-prefix=GFX1100 %s
// RUN: %clang_cc1 -triple amdgcn -target-cpu gfx1200 -emit-llvm -o - %s | FileCheck --check-prefix=GFX1200 %s
__attribute__((target("gws,image-insts,vmem-to-lds-load-insts"))) void test() {}
// NOCPU: "target-features"="+gws,+image-insts,+vmem-to-lds-load-insts"
// GFX942: "target-features"="+16-bit-insts,+atomic-buffer-global-pk-add-f16-insts,+atomic-ds-pk-add-16-insts,+atomic-fadd-rtn-insts,+atomic-flat-pk-add-16-insts,+atomic-global-pk-add-bf16-inst,+ci-insts,+dl-insts,+dot1-insts,+dot10-insts,+dot2-insts,+dot3-insts,+dot4-insts,+dot5-insts,+dot6-insts,+dot7-insts,+dpp,+fp8-conversion-insts,+fp8-insts,+gfx8-insts,+gfx9-insts,+gfx90a-insts,+gfx940-insts,+mai-insts,+s-memrealtime,+s-memtime-inst,+wavefrontsize64,+xf32-insts"
// GFX1100: "target-features"="+16-bit-insts,+atomic-fadd-rtn-insts,+ci-insts,+dl-insts,+dot10-insts,+dot12-insts,+dot5-insts,+dot7-insts,+dot8-insts,+dot9-insts,+dpp,+gfx10-3-insts,+gfx10-insts,+gfx11-insts,+gfx8-insts,+gfx9-insts,+wavefrontsize32"
// GFX1200: "target-features"="+16-bit-insts,+atomic-buffer-global-pk-add-f16-insts,+atomic-buffer-pk-add-bf16-inst,+atomic-ds-pk-add-16-insts,+atomic-fadd-rtn-insts,+atomic-flat-pk-add-16-insts,+atomic-global-pk-add-bf16-inst,+ci-insts,+dl-insts,+dot10-insts,+dot11-insts,+dot12-insts,+dot7-insts,+dot8-insts,+dot9-insts,+dpp,+fp8-conversion-insts,+gfx10-3-insts,+gfx10-insts,+gfx11-insts,+gfx12-insts,+gfx8-insts,+gfx9-insts,+wavefrontsize32"