AMDGPU/GlobalISel: Use getSubRegFromChannel (#100732)
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@ -2169,27 +2169,6 @@ bool AMDGPUInstructionSelector::selectG_SELECT(MachineInstr &I) const {
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return Ret;
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}
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static int sizeToSubRegIndex(unsigned Size) {
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switch (Size) {
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case 32:
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return AMDGPU::sub0;
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case 64:
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return AMDGPU::sub0_sub1;
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case 96:
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return AMDGPU::sub0_sub1_sub2;
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case 128:
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return AMDGPU::sub0_sub1_sub2_sub3;
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case 256:
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return AMDGPU::sub0_sub1_sub2_sub3_sub4_sub5_sub6_sub7;
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default:
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if (Size < 32)
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return AMDGPU::sub0;
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if (Size > 256)
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return -1;
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return sizeToSubRegIndex(llvm::bit_ceil(Size));
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}
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}
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bool AMDGPUInstructionSelector::selectG_TRUNC(MachineInstr &I) const {
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Register DstReg = I.getOperand(0).getReg();
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Register SrcReg = I.getOperand(1).getReg();
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@ -2293,8 +2272,9 @@ bool AMDGPUInstructionSelector::selectG_TRUNC(MachineInstr &I) const {
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return false;
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if (SrcSize > 32) {
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int SubRegIdx = sizeToSubRegIndex(DstSize);
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if (SubRegIdx == -1)
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unsigned SubRegIdx =
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DstSize < 32 ? AMDGPU::sub0 : TRI.getSubRegFromChannel(0, DstSize / 32);
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if (SubRegIdx == AMDGPU::NoSubRegister)
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return false;
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// Deal with weird cases where the class only partially supports the subreg
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