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AArch64: Remove the PAUTH_BLEND pseudo-instruction.

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It can be represented using a regular MOVK instruction
which also has the advantage of sometimes being selectable
without a preceding MOV.

Reviewers: ahmedbougacha, asl, atrosinenko

Reviewed By: atrosinenko

Pull Request: https://github.com/llvm/llvm-project/pull/134765
This commit is contained in:
Peter Collingbourne 2025-04-15 11:08:48 -07:00 committed by GitHub
parent 30d13e3591
commit 3f58ff20fe
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GPG Key ID: B5690EEEBB952194
3 changed files with 1 additions and 68 deletions
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5
llvm/lib/Target/AArch64/AArch64InstrInfo.td
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@ -1798,9 +1798,6 @@ def PAUTH_PROLOGUE : Pseudo<(outs), (ins), []>, Sched<[]> {
def PAUTH_EPILOGUE : Pseudo<(outs), (ins), []>, Sched<[]>; def PAUTH_EPILOGUE : Pseudo<(outs), (ins), []>, Sched<[]>;
} }
def PAUTH_BLEND : Pseudo<(outs GPR64:$disc),
(ins GPR64:$addr_disc, i32imm:$int_disc), []>, Sched<[]>;
// These pointer authentication instructions require armv8.3a // These pointer authentication instructions require armv8.3a
let Predicates = [HasPAuth] in { let Predicates = [HasPAuth] in {
@ -10130,7 +10127,7 @@ let Predicates = [HasMOPS, HasMTE], Defs = [NZCV], Size = 12, mayLoad = 0, maySt
// v8.3 Pointer Authentication late patterns // v8.3 Pointer Authentication late patterns
def : Pat<(int_ptrauth_blend GPR64:$Rd, imm64_0_65535:$imm), def : Pat<(int_ptrauth_blend GPR64:$Rd, imm64_0_65535:$imm),
(PAUTH_BLEND GPR64:$Rd, (trunc_imm imm64_0_65535:$imm))>; (MOVKXi GPR64:$Rd, (trunc_imm imm64_0_65535:$imm), 48)>;
def : Pat<(int_ptrauth_blend GPR64:$Rd, GPR64:$Rn), def : Pat<(int_ptrauth_blend GPR64:$Rd, GPR64:$Rn),
(BFMXri GPR64:$Rd, GPR64:$Rn, 16, 15)>; (BFMXri GPR64:$Rd, GPR64:$Rn, 16, 15)>;

37
llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
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@ -42,13 +42,6 @@ private:
void authenticateLR(MachineFunction &MF, void authenticateLR(MachineFunction &MF,
MachineBasicBlock::iterator MBBI) const; MachineBasicBlock::iterator MBBI) const;
/// Stores blend(AddrDisc, IntDisc) to the Result register.
void emitBlend(MachineBasicBlock::iterator MBBI, Register Result,
Register AddrDisc, unsigned IntDisc) const;
/// Expands PAUTH_BLEND pseudo instruction.
void expandPAuthBlend(MachineBasicBlock::iterator MBBI) const;
bool checkAuthenticatedLR(MachineBasicBlock::iterator TI) const; bool checkAuthenticatedLR(MachineBasicBlock::iterator TI) const;
}; };
@ -249,32 +242,6 @@ unsigned llvm::AArch64PAuth::getCheckerSizeInBytes(AuthCheckMethod Method) {
llvm_unreachable("Unknown AuthCheckMethod enum"); llvm_unreachable("Unknown AuthCheckMethod enum");
} }
void AArch64PointerAuth::emitBlend(MachineBasicBlock::iterator MBBI,
Register Result, Register AddrDisc,
unsigned IntDisc) const {
MachineBasicBlock &MBB = *MBBI->getParent();
DebugLoc DL = MBBI->getDebugLoc();
if (Result != AddrDisc)
BuildMI(MBB, MBBI, DL, TII->get(AArch64::ORRXrs), Result)
.addReg(AArch64::XZR)
.addReg(AddrDisc)
.addImm(0);
BuildMI(MBB, MBBI, DL, TII->get(AArch64::MOVKXi), Result)
.addReg(Result)
.addImm(IntDisc)
.addImm(48);
}
void AArch64PointerAuth::expandPAuthBlend(
MachineBasicBlock::iterator MBBI) const {
Register ResultReg = MBBI->getOperand(0).getReg();
Register AddrDisc = MBBI->getOperand(1).getReg();
unsigned IntDisc = MBBI->getOperand(2).getImm();
emitBlend(MBBI, ResultReg, AddrDisc, IntDisc);
}
bool AArch64PointerAuth::runOnMachineFunction(MachineFunction &MF) { bool AArch64PointerAuth::runOnMachineFunction(MachineFunction &MF) {
Subtarget = &MF.getSubtarget<AArch64Subtarget>(); Subtarget = &MF.getSubtarget<AArch64Subtarget>();
TII = Subtarget->getInstrInfo(); TII = Subtarget->getInstrInfo();
@ -290,7 +257,6 @@ bool AArch64PointerAuth::runOnMachineFunction(MachineFunction &MF) {
break; break;
case AArch64::PAUTH_PROLOGUE: case AArch64::PAUTH_PROLOGUE:
case AArch64::PAUTH_EPILOGUE: case AArch64::PAUTH_EPILOGUE:
case AArch64::PAUTH_BLEND:
PAuthPseudoInstrs.push_back(MI.getIterator()); PAuthPseudoInstrs.push_back(MI.getIterator());
break; break;
} }
@ -305,9 +271,6 @@ bool AArch64PointerAuth::runOnMachineFunction(MachineFunction &MF) {
case AArch64::PAUTH_EPILOGUE: case AArch64::PAUTH_EPILOGUE:
authenticateLR(MF, It); authenticateLR(MF, It);
break; break;
case AArch64::PAUTH_BLEND:
expandPAuthBlend(It);
break;
default: default:
llvm_unreachable("Unhandled opcode"); llvm_unreachable("Unhandled opcode");
} }

27
llvm/test/CodeGen/AArch64/ptrauth-pseudo-instructions.mir
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@ -1,27 +0,0 @@
# RUN: llc -mtriple=aarch64--- -run-pass=aarch64-ptrauth -verify-machineinstrs %s -o - | FileCheck %s
# Test the corner cases that cannot be reliably tested using LLVM IR as input.
--- |
define i64 @blend_untied(i64 %unused, i64 %ptr_arg) {
ret i64 0
}
...
---
# Check that the input register is copied to the output one, if not tied.
name: blend_untied
tracksRegLiveness: true
body: |
bb.0:
liveins: $lr, $x0, $x1
$x0 = PAUTH_BLEND $x1, 42
RET undef $lr
# CHECK: liveins: $lr, $x0, $x1
# CHECK-NEXT: {{^ +$}}
# CHECK-NEXT: $x0 = ORRXrs $xzr, $x1, 0
# CHECK-NEXT: $x0 = MOVKXi $x0, 42, 48
# CHECK-NEXT: RET undef $lr
...