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AMDGPU: Fix assert when multi operands to update after folding imm (#148205)

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In the original motivating test case,
[FoldList](d8a2141ff9/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp (L1764))
had entries:
```
  #0: UseMI: %224:sreg_32 = S_OR_B32 %219.sub0:sreg_64, %219.sub1:sreg_64, implicit-def dead $scc
      UseOpNo: 1

  #1: UseMI: %224:sreg_32 = S_OR_B32 %219.sub0:sreg_64, %219.sub1:sreg_64, implicit-def dead $scc
      UseOpNo: 2
```
After calling
[updateOperand(#0)](d8a2141ff9/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp (L1773)),
[tryConstantFoldOp(#0.UseMI)](d8a2141ff9/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp (L1786))
removed operand 1, and entry #​1.UseOpNo was no longer valid,
resulting in an
[assert](4a35214bdd/llvm/include/llvm/ADT/ArrayRef.h (L452)).

This change defers constant folding until all operands have been updated
so that UseOpNo values remain stable.
This commit is contained in:
macurtis-amd 2025-07-16 06:37:08 -05:00 committed by GitHub
parent 3b8a18c27a
commit 402b989693
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2 changed files with 25 additions and 4 deletions
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14
llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
View File

@ -1761,6 +1761,7 @@ bool SIFoldOperandsImpl::foldInstOperand(MachineInstr &MI,
for (MachineInstr *Copy : CopiesToReplace)
Copy->addImplicitDefUseOperands(*MF);
SetVector<MachineInstr *> ConstantFoldCandidates;
for (FoldCandidate &Fold : FoldList) {
assert(!Fold.isReg() || Fold.Def.OpToFold);
if (Fold.isReg() && Fold.getReg().isVirtual()) {
@ -1783,16 +1784,21 @@ bool SIFoldOperandsImpl::foldInstOperand(MachineInstr &MI,
<< static_cast<int>(Fold.UseOpNo) << " of "
<< *Fold.UseMI);
if (Fold.isImm() && tryConstantFoldOp(Fold.UseMI)) {
LLVM_DEBUG(dbgs() << "Constant folded " << *Fold.UseMI);
Changed = true;
}
if (Fold.isImm())
ConstantFoldCandidates.insert(Fold.UseMI);
} else if (Fold.Commuted) {
// Restoring instruction's original operand order if fold has failed.
TII->commuteInstruction(*Fold.UseMI, false);
}
}
for (MachineInstr *MI : ConstantFoldCandidates) {
if (tryConstantFoldOp(MI)) {
LLVM_DEBUG(dbgs() << "Constant folded " << *MI);
Changed = true;
}
}
return true;
}

15
llvm/test/CodeGen/AMDGPU/bug-multi-operands-to-update-after-fold.mir Normal file
View File

@ -0,0 +1,15 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
# RUN: llc -mtriple=amdgcn-amd-hsa -mcpu=gfx1031 -run-pass=si-fold-operands -o - %s | FileCheck %s
---
name: snork
body: |
bb.0:
; CHECK-LABEL: name: snork
; CHECK: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[S_MOV_B32_]], %subreg.sub0, [[S_MOV_B32_]], %subreg.sub1, [[S_MOV_B32_]], %subreg.sub2, [[S_MOV_B32_]], %subreg.sub3
; CHECK-NEXT: SI_RETURN
%0:sreg_32 = S_MOV_B32 0
%1:sgpr_128 = REG_SEQUENCE %0, %subreg.sub0, %0, %subreg.sub1, %0, %subreg.sub2, %0, %subreg.sub3
%2:sreg_32 = S_OR_B32 %1.sub0, %1.sub3, implicit-def dead $scc
SI_RETURN
...