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[SelectionDAG] In PromoteFloatRes_BITCAST, insert a bitcast before the fp16_to_fp in case the input type isn't an i16.

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The bitcast can be further legalized as needed.

Fixes PR38533.

llvm-svn: 339533
This commit is contained in:
Craig Topper 2018-08-13 05:26:49 +00:00
parent 8caccc32b5
commit 42e32117bb
2 changed files with 15 additions and 2 deletions
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6
llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
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@ -1941,8 +1941,10 @@ void DAGTypeLegalizer::PromoteFloatResult(SDNode *N, unsigned ResNo) {
SDValue DAGTypeLegalizer::PromoteFloatRes_BITCAST(SDNode *N) {
EVT VT = N->getValueType(0);
EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
return DAG.getNode(GetPromotionOpcode(VT, NVT), SDLoc(N), NVT,
N->getOperand(0));
// Input type isn't guaranteed to be i16 so bitcast if not. The bitcast
// will be legalized further if necessary.
SDValue Cast = DAG.getBitcast(MVT::i16, N->getOperand(0));
return DAG.getNode(GetPromotionOpcode(VT, NVT), SDLoc(N), NVT, Cast);
}
SDValue DAGTypeLegalizer::PromoteFloatRes_ConstantFP(SDNode *N) {

11
llvm/test/CodeGen/X86/pr38533.ll Normal file
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@ -0,0 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s
define void @constant_fold_vector_to_half() {
; CHECK-LABEL: constant_fold_vector_to_half:
; CHECK: # %bb.0:
; CHECK-NEXT: movw $16384, (%rax) # imm = 0x4000
; CHECK-NEXT: retq
store volatile half bitcast (<4 x i4> <i4 0, i4 0, i4 0, i4 4> to half), half* undef
ret void
}