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[NFC][PowerPC] Pre-commit testcases for locking down the xxsel instructions for ternary patterns (#146764)

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Pre-commit test case for exploitation of `xxsel` for ternary operations
of the pattern. This adds support for `v4i32`, `v2i64`, `v16i8` and
`v8i16` operand types for the following patterns.

```
ternary(A, X, and(B,C))
ternary(A, X, B)
ternary(A, X, C)
ternary(A, X, xor(B,C))
ternary(A,X,or(B,C))
```
Exploitation of xxeval to be added later.

Co-authored-by: Tony Varghese <tony.varghese@ibm.com>
This commit is contained in:
Tony Varghese 2025-07-03 20:53:02 +05:30 committed by GitHub
parent 6c23e9e82c
commit 46b4ca8e98
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5 changed files with 864 additions and 25 deletions
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186
llvm/test/CodeGen/PowerPC/xxeval-vselect-x-and.ll
View File

@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; Test file to verify the emission of Vector selection instructions when ternary operators are used.
; Test file to verify the emission of Vector Selection instructions when ternary operators are used.
; RUN: llc -verify-machineinstrs -mcpu=pwr10 -mtriple=powerpc64le-unknown-unknown \
; RUN: -ppc-asm-full-reg-names --ppc-vsr-nums-as-vr < %s | FileCheck %s
@ -47,6 +47,42 @@ entry:
ret <2 x i64> %res
}
; Function to test ternary(A, xor(B, C), and(B, C)) for <16 x i8>
define <16 x i8> @ternary_A_xor_BC_and_BC_16x8(<16 x i1> %A, <16 x i8> %B, <16 x i8> %C) {
; CHECK-LABEL: ternary_A_xor_BC_and_BC_16x8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltib v5, 7
; CHECK-NEXT: xxlxor vs0, v3, v4
; CHECK-NEXT: xxland vs1, v3, v4
; CHECK-NEXT: vslb v2, v2, v5
; CHECK-NEXT: vsrab v2, v2, v5
; CHECK-NEXT: xxsel v2, vs1, vs0, v2
; CHECK-NEXT: blr
entry:
%xor = xor <16 x i8> %B, %C
%and = and <16 x i8> %B, %C
%res = select <16 x i1> %A, <16 x i8> %xor, <16 x i8> %and
ret <16 x i8> %res
}
; Function to test ternary(A, xor(B, C), and(B, C)) for <8 x i16>
define <8 x i16> @ternary_A_xor_BC_and_BC_8x16(<8 x i1> %A, <8 x i16> %B, <8 x i16> %C) {
; CHECK-LABEL: ternary_A_xor_BC_and_BC_8x16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltiw v5, 983055
; CHECK-NEXT: xxlxor vs0, v3, v4
; CHECK-NEXT: xxland vs1, v3, v4
; CHECK-NEXT: vslh v2, v2, v5
; CHECK-NEXT: vsrah v2, v2, v5
; CHECK-NEXT: xxsel v2, vs1, vs0, v2
; CHECK-NEXT: blr
entry:
%xor = xor <8 x i16> %B, %C
%and = and <8 x i16> %B, %C
%res = select <8 x i1> %A, <8 x i16> %xor, <8 x i16> %and
ret <8 x i16> %res
}
; Function to test ternary(A, nor(B, C), and(B, C)) for <4 x i32>
define <4 x i32> @ternary_A_nor_BC_and_BC_4x32(<4 x i1> %A, <4 x i32> %B, <4 x i32> %C) {
; CHECK-LABEL: ternary_A_nor_BC_and_BC_4x32:
@ -86,6 +122,44 @@ entry:
ret <2 x i64> %res
}
; Function to test ternary(A, nor(B, C), and(B, C)) for <16 x i8>
define <16 x i8> @ternary_A_nor_BC_and_BC_16x8(<16 x i1> %A, <16 x i8> %B, <16 x i8> %C) {
; CHECK-LABEL: ternary_A_nor_BC_and_BC_16x8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltib v5, 7
; CHECK-NEXT: xxlnor vs0, v3, v4
; CHECK-NEXT: xxland vs1, v3, v4
; CHECK-NEXT: vslb v2, v2, v5
; CHECK-NEXT: vsrab v2, v2, v5
; CHECK-NEXT: xxsel v2, vs1, vs0, v2
; CHECK-NEXT: blr
entry:
%or = or <16 x i8> %B, %C
%nor = xor <16 x i8> %or, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> ; Vector NOR operation
%and = and <16 x i8> %B, %C
%res = select <16 x i1> %A, <16 x i8> %nor, <16 x i8> %and
ret <16 x i8> %res
}
; Function to test ternary(A, nor(B, C), and(B, C)) for <8 x i16>
define <8 x i16> @ternary_A_nor_BC_and_BC_8x16(<8 x i1> %A, <8 x i16> %B, <8 x i16> %C) {
; CHECK-LABEL: ternary_A_nor_BC_and_BC_8x16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltiw v5, 983055
; CHECK-NEXT: xxlnor vs0, v3, v4
; CHECK-NEXT: xxland vs1, v3, v4
; CHECK-NEXT: vslh v2, v2, v5
; CHECK-NEXT: vsrah v2, v2, v5
; CHECK-NEXT: xxsel v2, vs1, vs0, v2
; CHECK-NEXT: blr
entry:
%or = or <8 x i16> %B, %C
%nor = xor <8 x i16> %or, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> ; Vector NOR operation
%and = and <8 x i16> %B, %C
%res = select <8 x i1> %A, <8 x i16> %nor, <8 x i16> %and
ret <8 x i16> %res
}
; Function to test ternary(A, eqv(B, C), and(B, C)) for <4 x i32>
define <4 x i32> @ternary_A_eqv_BC_and_BC_4x32(<4 x i1> %A, <4 x i32> %B, <4 x i32> %C) {
; CHECK-LABEL: ternary_A_eqv_BC_and_BC_4x32:
@ -125,6 +199,44 @@ entry:
ret <2 x i64> %res
}
; Function to test ternary(A, eqv(B, C), and(B, C)) for <16 x i8>
define <16 x i8> @ternary_A_eqv_BC_and_BC_16x8(<16 x i1> %A, <16 x i8> %B, <16 x i8> %C) {
; CHECK-LABEL: ternary_A_eqv_BC_and_BC_16x8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltib v5, 7
; CHECK-NEXT: xxleqv vs0, v3, v4
; CHECK-NEXT: xxland vs1, v3, v4
; CHECK-NEXT: vslb v2, v2, v5
; CHECK-NEXT: vsrab v2, v2, v5
; CHECK-NEXT: xxsel v2, vs1, vs0, v2
; CHECK-NEXT: blr
entry:
%xor = xor <16 x i8> %B, %C
%eqv = xor <16 x i8> %xor, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> ; Vector eqv operation
%and = and <16 x i8> %B, %C
%res = select <16 x i1> %A, <16 x i8> %eqv, <16 x i8> %and
ret <16 x i8> %res
}
; Function to test ternary(A, eqv(B, C), and(B, C)) for <8 x i16>
define <8 x i16> @ternary_A_eqv_BC_and_BC_8x16(<8 x i1> %A, <8 x i16> %B, <8 x i16> %C) {
; CHECK-LABEL: ternary_A_eqv_BC_and_BC_8x16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltiw v5, 983055
; CHECK-NEXT: xxleqv vs0, v3, v4
; CHECK-NEXT: xxland vs1, v3, v4
; CHECK-NEXT: vslh v2, v2, v5
; CHECK-NEXT: vsrah v2, v2, v5
; CHECK-NEXT: xxsel v2, vs1, vs0, v2
; CHECK-NEXT: blr
entry:
%xor = xor <8 x i16> %B, %C
%eqv = xor <8 x i16> %xor, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> ; Vector eqv operation
%and = and <8 x i16> %B, %C
%res = select <8 x i1> %A, <8 x i16> %eqv, <8 x i16> %and
ret <8 x i16> %res
}
; Function to test ternary(A, not(C), and(B, C)) for <4 x i32>
define <4 x i32> @ternary_A_not_C_and_BC_4x32(<4 x i1> %A, <4 x i32> %B, <4 x i32> %C) {
; CHECK-LABEL: ternary_A_not_C_and_BC_4x32:
@ -162,6 +274,42 @@ entry:
ret <2 x i64> %res
}
; Function to test ternary(A, not(C), and(B, C)) for <16 x i8>
define <16 x i8> @ternary_A_not_C_and_BC_16x8(<16 x i1> %A, <16 x i8> %B, <16 x i8> %C) {
; CHECK-LABEL: ternary_A_not_C_and_BC_16x8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltib v5, 7
; CHECK-NEXT: xxlnor vs0, v4, v4
; CHECK-NEXT: xxland vs1, v3, v4
; CHECK-NEXT: vslb v2, v2, v5
; CHECK-NEXT: vsrab v2, v2, v5
; CHECK-NEXT: xxsel v2, vs1, vs0, v2
; CHECK-NEXT: blr
entry:
%not = xor <16 x i8> %C, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> ; Vector not operation
%and = and <16 x i8> %B, %C
%res = select <16 x i1> %A, <16 x i8> %not, <16 x i8> %and
ret <16 x i8> %res
}
; Function to test ternary(A, not(C), and(B, C)) for <8 x i16>
define <8 x i16> @ternary_A_not_C_and_BC_8x16(<8 x i1> %A, <8 x i16> %B, <8 x i16> %C) {
; CHECK-LABEL: ternary_A_not_C_and_BC_8x16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltiw v5, 983055
; CHECK-NEXT: xxlnor vs0, v4, v4
; CHECK-NEXT: xxland vs1, v3, v4
; CHECK-NEXT: vslh v2, v2, v5
; CHECK-NEXT: vsrah v2, v2, v5
; CHECK-NEXT: xxsel v2, vs1, vs0, v2
; CHECK-NEXT: blr
entry:
%not = xor <8 x i16> %C, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> ; Vector not operation
%and = and <8 x i16> %B, %C
%res = select <8 x i1> %A, <8 x i16> %not, <8 x i16> %and
ret <8 x i16> %res
}
; Function to test ternary(A, not(B), and(B, C)) for <4 x i32>
define <4 x i32> @ternary_A_not_B_and_BC_4x32(<4 x i1> %A, <4 x i32> %B, <4 x i32> %C) {
; CHECK-LABEL: ternary_A_not_B_and_BC_4x32:
@ -198,3 +346,39 @@ entry:
%res = select <2 x i1> %A, <2 x i64> %not, <2 x i64> %and
ret <2 x i64> %res
}
; Function to test ternary(A, not(B), and(B, C)) for <16 x i8>
define <16 x i8> @ternary_A_not_B_and_BC_16x8(<16 x i1> %A, <16 x i8> %B, <16 x i8> %C) {
; CHECK-LABEL: ternary_A_not_B_and_BC_16x8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltib v5, 7
; CHECK-NEXT: xxlnor vs0, v3, v3
; CHECK-NEXT: xxland vs1, v3, v4
; CHECK-NEXT: vslb v2, v2, v5
; CHECK-NEXT: vsrab v2, v2, v5
; CHECK-NEXT: xxsel v2, vs1, vs0, v2
; CHECK-NEXT: blr
entry:
%not = xor <16 x i8> %B, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> ; Vector not operation
%and = and <16 x i8> %B, %C
%res = select <16 x i1> %A, <16 x i8> %not, <16 x i8> %and
ret <16 x i8> %res
}
; Function to test ternary(A, not(B), and(B, C)) for <8 x i16>
define <8 x i16> @ternary_A_not_B_and_BC_8x16(<8 x i1> %A, <8 x i16> %B, <8 x i16> %C) {
; CHECK-LABEL: ternary_A_not_B_and_BC_8x16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltiw v5, 983055
; CHECK-NEXT: xxlnor vs0, v3, v3
; CHECK-NEXT: xxland vs1, v3, v4
; CHECK-NEXT: vslh v2, v2, v5
; CHECK-NEXT: vsrah v2, v2, v5
; CHECK-NEXT: xxsel v2, vs1, vs0, v2
; CHECK-NEXT: blr
entry:
%not = xor <8 x i16> %B, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> ; Vector not operation
%and = and <8 x i16> %B, %C
%res = select <8 x i1> %A, <8 x i16> %not, <8 x i16> %and
ret <8 x i16> %res
}

145
llvm/test/CodeGen/PowerPC/xxeval-vselect-x-b.ll
View File

@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; Test file to verify the emission of Vector selection instructions when ternary operators are used.
; Test file to verify the emission of Vector Selection instructions when ternary operators are used.
; RUN: llc -verify-machineinstrs -mcpu=pwr10 -mtriple=powerpc64le-unknown-unknown \
; RUN: -ppc-asm-full-reg-names --ppc-vsr-nums-as-vr < %s | FileCheck %s
@ -43,6 +43,38 @@ entry:
ret <2 x i64> %res
}
; Function to test ternary(A, and(B, C), B) for <16 x i8>
define <16 x i8> @ternary_A_and_BC_B_16x8(<16 x i1> %A, <16 x i8> %B, <16 x i8> %C) {
; CHECK-LABEL: ternary_A_and_BC_B_16x8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltib v5, 7
; CHECK-NEXT: xxland vs0, v3, v4
; CHECK-NEXT: vslb v2, v2, v5
; CHECK-NEXT: vsrab v2, v2, v5
; CHECK-NEXT: xxsel v2, v3, vs0, v2
; CHECK-NEXT: blr
entry:
%and = and <16 x i8> %B, %C
%res = select <16 x i1> %A, <16 x i8> %and, <16 x i8> %B
ret <16 x i8> %res
}
; Function to test ternary(A, and(B, C), B) for <8 x i16>
define <8 x i16> @ternary_A_and_BC_B_8x16(<8 x i1> %A, <8 x i16> %B, <8 x i16> %C) {
; CHECK-LABEL: ternary_A_and_BC_B_8x16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltiw v5, 983055
; CHECK-NEXT: xxland vs0, v3, v4
; CHECK-NEXT: vslh v2, v2, v5
; CHECK-NEXT: vsrah v2, v2, v5
; CHECK-NEXT: xxsel v2, v3, vs0, v2
; CHECK-NEXT: blr
entry:
%and = and <8 x i16> %B, %C
%res = select <8 x i1> %A, <8 x i16> %and, <8 x i16> %B
ret <8 x i16> %res
}
; Function to test ternary(A, nor(B, C), B) for <4 x i32>
define <4 x i32> @ternary_A_nor_BC_B_4x32(<4 x i1> %A, <4 x i32> %B, <4 x i32> %C) {
; CHECK-LABEL: ternary_A_nor_BC_B_4x32:
@ -78,6 +110,40 @@ entry:
ret <2 x i64> %res
}
; Function to test ternary(A, nor(B, C), B) for <16 x i8>
define <16 x i8> @ternary_A_nor_BC_B_16x8(<16 x i1> %A, <16 x i8> %B, <16 x i8> %C) {
; CHECK-LABEL: ternary_A_nor_BC_B_16x8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltib v5, 7
; CHECK-NEXT: xxlnor vs0, v3, v4
; CHECK-NEXT: vslb v2, v2, v5
; CHECK-NEXT: vsrab v2, v2, v5
; CHECK-NEXT: xxsel v2, v3, vs0, v2
; CHECK-NEXT: blr
entry:
%or = or <16 x i8> %B, %C
%nor = xor <16 x i8> %or, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> ; Vector NOR operation
%res = select <16 x i1> %A, <16 x i8> %nor, <16 x i8> %B
ret <16 x i8> %res
}
; Function to test ternary(A, nor(B, C), B) for <8 x i16>
define <8 x i16> @ternary_A_nor_BC_B_8x16(<8 x i1> %A, <8 x i16> %B, <8 x i16> %C) {
; CHECK-LABEL: ternary_A_nor_BC_B_8x16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltiw v5, 983055
; CHECK-NEXT: xxlnor vs0, v3, v4
; CHECK-NEXT: vslh v2, v2, v5
; CHECK-NEXT: vsrah v2, v2, v5
; CHECK-NEXT: xxsel v2, v3, vs0, v2
; CHECK-NEXT: blr
entry:
%or = or <8 x i16> %B, %C
%nor = xor <8 x i16> %or, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> ; Vector NOR operation
%res = select <8 x i1> %A, <8 x i16> %nor, <8 x i16> %B
ret <8 x i16> %res
}
; Function to test ternary(A, eqv(B, C), B) for <4 x i32>
define <4 x i32> @ternary_A_eqv_BC_B_4x32(<4 x i1> %A, <4 x i32> %B, <4 x i32> %C) {
; CHECK-LABEL: ternary_A_eqv_BC_B_4x32:
@ -113,37 +179,38 @@ entry:
ret <2 x i64> %res
}
; Function to test ternary(A, not(C), B) for <4 x i32>
define <4 x i32> @ternary_A_not_C_B_4x32(<4 x i1> %A, <4 x i32> %B, <4 x i32> %C) {
; CHECK-LABEL: ternary_A_not_C_B_4x32:
; Function to test ternary(A, eqv(B, C), B) for <16 x i8>
define <16 x i8> @ternary_A_eqv_BC_B_16x8(<16 x i1> %A, <16 x i8> %B, <16 x i8> %C) {
; CHECK-LABEL: ternary_A_eqv_BC_B_16x8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxleqv v5, v5, v5
; CHECK-NEXT: xxlnor vs0, v4, v4
; CHECK-NEXT: vslw v2, v2, v5
; CHECK-NEXT: vsraw v2, v2, v5
; CHECK-NEXT: xxspltib v5, 7
; CHECK-NEXT: xxleqv vs0, v3, v4
; CHECK-NEXT: vslb v2, v2, v5
; CHECK-NEXT: vsrab v2, v2, v5
; CHECK-NEXT: xxsel v2, v3, vs0, v2
; CHECK-NEXT: blr
entry:
%not = xor <4 x i32> %C, <i32 -1, i32 -1, i32 -1, i32 -1> ; Vector not operation
%res = select <4 x i1> %A, <4 x i32> %not, <4 x i32> %B
ret <4 x i32> %res
%xor = xor <16 x i8> %B, %C
%eqv = xor <16 x i8> %xor, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> ; Vector eqv operation
%res = select <16 x i1> %A, <16 x i8> %eqv, <16 x i8> %B
ret <16 x i8> %res
}
; Function to test ternary(A, not(C), B) for <2 x i64>
define <2 x i64> @ternary_A_not_C_B_2x64(<2 x i1> %A, <2 x i64> %B, <2 x i64> %C) {
; CHECK-LABEL: ternary_A_not_C_B_2x64:
; Function to test ternary(A, eqv(B, C), B) for <8 x i16>
define <8 x i16> @ternary_A_eqv_BC_B_8x16(<8 x i1> %A, <8 x i16> %B, <8 x i16> %C) {
; CHECK-LABEL: ternary_A_eqv_BC_B_8x16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxlxor v5, v5, v5
; CHECK-NEXT: xxlnor vs0, v4, v4
; CHECK-NEXT: xxsplti32dx v5, 1, 63
; CHECK-NEXT: vsld v2, v2, v5
; CHECK-NEXT: vsrad v2, v2, v5
; CHECK-NEXT: xxspltiw v5, 983055
; CHECK-NEXT: xxleqv vs0, v3, v4
; CHECK-NEXT: vslh v2, v2, v5
; CHECK-NEXT: vsrah v2, v2, v5
; CHECK-NEXT: xxsel v2, v3, vs0, v2
; CHECK-NEXT: blr
entry:
%not = xor <2 x i64> %C, <i64 -1, i64 -1> ; Vector not operation
%res = select <2 x i1> %A, <2 x i64> %not, <2 x i64> %B
ret <2 x i64> %res
%xor = xor <8 x i16> %B, %C
%eqv = xor <8 x i16> %xor, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> ; Vector eqv operation
%res = select <8 x i1> %A, <8 x i16> %eqv, <8 x i16> %B
ret <8 x i16> %res
}
; Function to test ternary(A, nand(B, C), B) for <4 x i32>
@ -180,3 +247,37 @@ entry:
%res = select <2 x i1> %A, <2 x i64> %nand, <2 x i64> %B
ret <2 x i64> %res
}
; Function to test ternary(A, nand(B, C), B) for <16 x i8>
define <16 x i8> @ternary_A_nand_BC_B_16x8(<16 x i1> %A, <16 x i8> %B, <16 x i8> %C) {
; CHECK-LABEL: ternary_A_nand_BC_B_16x8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltib v5, 7
; CHECK-NEXT: xxlnand vs0, v3, v4
; CHECK-NEXT: vslb v2, v2, v5
; CHECK-NEXT: vsrab v2, v2, v5
; CHECK-NEXT: xxsel v2, v3, vs0, v2
; CHECK-NEXT: blr
entry:
%and = and <16 x i8> %B, %C
%nand = xor <16 x i8> %and, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> ; Vector nand operation
%res = select <16 x i1> %A, <16 x i8> %nand, <16 x i8> %B
ret <16 x i8> %res
}
; Function to test ternary(A, nand(B, C), B) for <8 x i16>
define <8 x i16> @ternary_A_nand_BC_B_8x16(<8 x i1> %A, <8 x i16> %B, <8 x i16> %C) {
; CHECK-LABEL: ternary_A_nand_BC_B_8x16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltiw v5, 983055
; CHECK-NEXT: xxlnand vs0, v3, v4
; CHECK-NEXT: vslh v2, v2, v5
; CHECK-NEXT: vsrah v2, v2, v5
; CHECK-NEXT: xxsel v2, v3, vs0, v2
; CHECK-NEXT: blr
entry:
%and = and <8 x i16> %B, %C
%nand = xor <8 x i16> %and, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> ; Vector nand operation
%res = select <8 x i1> %A, <8 x i16> %nand, <8 x i16> %B
ret <8 x i16> %res
}

136
llvm/test/CodeGen/PowerPC/xxeval-vselect-x-c.ll
View File

@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; Test file to verify the emission of Vector selection instructions when ternary operators are used.
; Test file to verify the emission of Vector Selection instructions when ternary operators are used.
; RUN: llc -verify-machineinstrs -mcpu=pwr10 -mtriple=powerpc64le-unknown-unknown \
; RUN: -ppc-asm-full-reg-names --ppc-vsr-nums-as-vr < %s | FileCheck %s
@ -43,6 +43,38 @@ entry:
ret <2 x i64> %res
}
; Function to test ternary(A, and(B, C), C) for <16 x i8>
define <16 x i8> @ternary_A_and_BC_C_16x8(<16 x i1> %A, <16 x i8> %B, <16 x i8> %C) {
; CHECK-LABEL: ternary_A_and_BC_C_16x8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltib v5, 7
; CHECK-NEXT: xxland vs0, v3, v4
; CHECK-NEXT: vslb v2, v2, v5
; CHECK-NEXT: vsrab v2, v2, v5
; CHECK-NEXT: xxsel v2, v4, vs0, v2
; CHECK-NEXT: blr
entry:
%and = and <16 x i8> %B, %C
%res = select <16 x i1> %A, <16 x i8> %and, <16 x i8> %C
ret <16 x i8> %res
}
; Function to test ternary(A, and(B, C), C) for <8 x i16>
define <8 x i16> @ternary_A_and_BC_C_8x16(<8 x i1> %A, <8 x i16> %B, <8 x i16> %C) {
; CHECK-LABEL: ternary_A_and_BC_C_8x16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltiw v5, 983055
; CHECK-NEXT: xxland vs0, v3, v4
; CHECK-NEXT: vslh v2, v2, v5
; CHECK-NEXT: vsrah v2, v2, v5
; CHECK-NEXT: xxsel v2, v4, vs0, v2
; CHECK-NEXT: blr
entry:
%and = and <8 x i16> %B, %C
%res = select <8 x i1> %A, <8 x i16> %and, <8 x i16> %C
ret <8 x i16> %res
}
; Function to test ternary(A, nor(B, C), C) for <4 x i32>
define <4 x i32> @ternary_A_nor_BC_C_4x32(<4 x i1> %A, <4 x i32> %B, <4 x i32> %C) {
; CHECK-LABEL: ternary_A_nor_BC_C_4x32:
@ -78,6 +110,40 @@ entry:
ret <2 x i64> %res
}
; Function to test ternary(A, nor(B, C), C) for <16 x i8>
define <16 x i8> @ternary_A_nor_BC_C_16x8(<16 x i1> %A, <16 x i8> %B, <16 x i8> %C) {
; CHECK-LABEL: ternary_A_nor_BC_C_16x8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltib v5, 7
; CHECK-NEXT: xxlnor vs0, v3, v4
; CHECK-NEXT: vslb v2, v2, v5
; CHECK-NEXT: vsrab v2, v2, v5
; CHECK-NEXT: xxsel v2, v4, vs0, v2
; CHECK-NEXT: blr
entry:
%or = or <16 x i8> %B, %C
%nor = xor <16 x i8> %or, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> ; Vector NOR operation
%res = select <16 x i1> %A, <16 x i8> %nor, <16 x i8> %C
ret <16 x i8> %res
}
; Function to test ternary(A, nor(B, C), C) for <8 x i16>
define <8 x i16> @ternary_A_nor_BC_C_8x16(<8 x i1> %A, <8 x i16> %B, <8 x i16> %C) {
; CHECK-LABEL: ternary_A_nor_BC_C_8x16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltiw v5, 983055
; CHECK-NEXT: xxlnor vs0, v3, v4
; CHECK-NEXT: vslh v2, v2, v5
; CHECK-NEXT: vsrah v2, v2, v5
; CHECK-NEXT: xxsel v2, v4, vs0, v2
; CHECK-NEXT: blr
entry:
%or = or <8 x i16> %B, %C
%nor = xor <8 x i16> %or, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> ; Vector NOR operation
%res = select <8 x i1> %A, <8 x i16> %nor, <8 x i16> %C
ret <8 x i16> %res
}
; Function to test ternary(A, eqv(B, C), C) for <4 x i32>
define <4 x i32> @ternary_A_eqv_BC_C_4x32(<4 x i1> %A, <4 x i32> %B, <4 x i32> %C) {
; CHECK-LABEL: ternary_A_eqv_BC_C_4x32:
@ -113,6 +179,40 @@ entry:
ret <2 x i64> %res
}
; Function to test ternary(A, eqv(B, C), C) for <16 x i8>
define <16 x i8> @ternary_A_eqv_BC_C_16x8(<16 x i1> %A, <16 x i8> %B, <16 x i8> %C) {
; CHECK-LABEL: ternary_A_eqv_BC_C_16x8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltib v5, 7
; CHECK-NEXT: xxleqv vs0, v3, v4
; CHECK-NEXT: vslb v2, v2, v5
; CHECK-NEXT: vsrab v2, v2, v5
; CHECK-NEXT: xxsel v2, v4, vs0, v2
; CHECK-NEXT: blr
entry:
%xor = xor <16 x i8> %B, %C
%eqv = xor <16 x i8> %xor, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> ; Vector eqv operation
%res = select <16 x i1> %A, <16 x i8> %eqv, <16 x i8> %C
ret <16 x i8> %res
}
; Function to test ternary(A, eqv(B, C), C) for <8 x i16>
define <8 x i16> @ternary_A_eqv_BC_C_8x16(<8 x i1> %A, <8 x i16> %B, <8 x i16> %C) {
; CHECK-LABEL: ternary_A_eqv_BC_C_8x16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltiw v5, 983055
; CHECK-NEXT: xxleqv vs0, v3, v4
; CHECK-NEXT: vslh v2, v2, v5
; CHECK-NEXT: vsrah v2, v2, v5
; CHECK-NEXT: xxsel v2, v4, vs0, v2
; CHECK-NEXT: blr
entry:
%xor = xor <8 x i16> %B, %C
%eqv = xor <8 x i16> %xor, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> ; Vector eqv operation
%res = select <8 x i1> %A, <8 x i16> %eqv, <8 x i16> %C
ret <8 x i16> %res
}
; Function to test ternary(A, nand(B, C), C) for <4 x i32>
define <4 x i32> @ternary_A_nand_BC_C_4x32(<4 x i1> %A, <4 x i32> %B, <4 x i32> %C) {
; CHECK-LABEL: ternary_A_nand_BC_C_4x32:
@ -147,3 +247,37 @@ entry:
%res = select <2 x i1> %A, <2 x i64> %nand, <2 x i64> %C
ret <2 x i64> %res
}
; Function to test ternary(A, nand(B, C), C) for <16 x i8>
define <16 x i8> @ternary_A_nand_BC_C_16x8(<16 x i1> %A, <16 x i8> %B, <16 x i8> %C) {
; CHECK-LABEL: ternary_A_nand_BC_C_16x8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltib v5, 7
; CHECK-NEXT: xxlnand vs0, v3, v4
; CHECK-NEXT: vslb v2, v2, v5
; CHECK-NEXT: vsrab v2, v2, v5
; CHECK-NEXT: xxsel v2, v4, vs0, v2
; CHECK-NEXT: blr
entry:
%and = and <16 x i8> %B, %C
%nand = xor <16 x i8> %and, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> ; Vector nand operation
%res = select <16 x i1> %A, <16 x i8> %nand, <16 x i8> %C
ret <16 x i8> %res
}
; Function to test ternary(A, nand(B, C), C) for <8 x i16>
define <8 x i16> @ternary_A_nand_BC_C_8x16(<8 x i1> %A, <8 x i16> %B, <8 x i16> %C) {
; CHECK-LABEL: ternary_A_nand_BC_C_8x16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltiw v5, 983055
; CHECK-NEXT: xxlnand vs0, v3, v4
; CHECK-NEXT: vslh v2, v2, v5
; CHECK-NEXT: vsrah v2, v2, v5
; CHECK-NEXT: xxsel v2, v4, vs0, v2
; CHECK-NEXT: blr
entry:
%and = and <8 x i16> %B, %C
%nand = xor <8 x i16> %and, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> ; Vector nand operation
%res = select <8 x i1> %A, <8 x i16> %nand, <8 x i16> %C
ret <8 x i16> %res
}

246
llvm/test/CodeGen/PowerPC/xxeval-vselect-x-or.ll
View File

@ -47,6 +47,42 @@ entry:
ret <2 x i64> %res
}
; Function to test ternary(A, and(B, C), or(B, C)) for <16 x i8>
define <16 x i8> @ternary_A_and_BC_or_BC_16x8(<16 x i1> %A, <16 x i8> %B, <16 x i8> %C) {
; CHECK-LABEL: ternary_A_and_BC_or_BC_16x8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltib v5, 7
; CHECK-NEXT: xxland vs0, v3, v4
; CHECK-NEXT: xxlor vs1, v3, v4
; CHECK-NEXT: vslb v2, v2, v5
; CHECK-NEXT: vsrab v2, v2, v5
; CHECK-NEXT: xxsel v2, vs1, vs0, v2
; CHECK-NEXT: blr
entry:
%and = and <16 x i8> %B, %C
%or = or <16 x i8> %B, %C
%res = select <16 x i1> %A, <16 x i8> %and, <16 x i8> %or
ret <16 x i8> %res
}
; Function to test ternary(A, and(B, C), or(B, C)) for <8 x i16>
define <8 x i16> @ternary_A_and_BC_or_BC_8x16(<8 x i1> %A, <8 x i16> %B, <8 x i16> %C) {
; CHECK-LABEL: ternary_A_and_BC_or_BC_8x16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltiw v5, 983055
; CHECK-NEXT: xxland vs0, v3, v4
; CHECK-NEXT: xxlor vs1, v3, v4
; CHECK-NEXT: vslh v2, v2, v5
; CHECK-NEXT: vsrah v2, v2, v5
; CHECK-NEXT: xxsel v2, vs1, vs0, v2
; CHECK-NEXT: blr
entry:
%and = and <8 x i16> %B, %C
%or = or <8 x i16> %B, %C
%res = select <8 x i1> %A, <8 x i16> %and, <8 x i16> %or
ret <8 x i16> %res
}
; Function to test ternary(A, B, or(B, C)) for <4 x i32>
define <4 x i32> @ternary_A_B_or_BC_4x32(<4 x i1> %A, <4 x i32> %B, <4 x i32> %C) {
; CHECK-LABEL: ternary_A_B_or_BC_4x32:
@ -80,6 +116,37 @@ entry:
ret <2 x i64> %res
}
; Function to test ternary(A, B, or(B, C)) for <16 x i8>
define <16 x i8> @ternary_A_B_or_BC_16x8(<16 x i1> %A, <16 x i8> %B, <16 x i8> %C) {
; CHECK-LABEL: ternary_A_B_or_BC_16x8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltib v5, 7
; CHECK-NEXT: xxlor vs0, v3, v4
; CHECK-NEXT: vslb v2, v2, v5
; CHECK-NEXT: vsrab v2, v2, v5
; CHECK-NEXT: xxsel v2, vs0, v3, v2
; CHECK-NEXT: blr
entry:
%or = or <16 x i8> %B, %C
%res = select <16 x i1> %A, <16 x i8> %B, <16 x i8> %or
ret <16 x i8> %res
}
; Function to test ternary(A, B, or(B, C)) for <8 x i16>
define <8 x i16> @ternary_A_B_or_BC_8x16(<8 x i1> %A, <8 x i16> %B, <8 x i16> %C) {
; CHECK-LABEL: ternary_A_B_or_BC_8x16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltiw v5, 983055
; CHECK-NEXT: xxlor vs0, v3, v4
; CHECK-NEXT: vslh v2, v2, v5
; CHECK-NEXT: vsrah v2, v2, v5
; CHECK-NEXT: xxsel v2, vs0, v3, v2
; CHECK-NEXT: blr
entry:
%or = or <8 x i16> %B, %C
%res = select <8 x i1> %A, <8 x i16> %B, <8 x i16> %or
ret <8 x i16> %res
}
; Function to test ternary(A, C, or(B, C)) for <4 x i32>
define <4 x i32> @ternary_A_C_or_BC_4x32(<4 x i1> %A, <4 x i32> %B, <4 x i32> %C) {
@ -114,6 +181,37 @@ entry:
ret <2 x i64> %res
}
; Function to test ternary(A, C, or(B, C)) for <16 x i8>
define <16 x i8> @ternary_A_C_or_BC_16x8(<16 x i1> %A, <16 x i8> %B, <16 x i8> %C) {
; CHECK-LABEL: ternary_A_C_or_BC_16x8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltib v5, 7
; CHECK-NEXT: xxlor vs0, v3, v4
; CHECK-NEXT: vslb v2, v2, v5
; CHECK-NEXT: vsrab v2, v2, v5
; CHECK-NEXT: xxsel v2, vs0, v4, v2
; CHECK-NEXT: blr
entry:
%or = or <16 x i8> %B, %C
%res = select <16 x i1> %A, <16 x i8> %C, <16 x i8> %or
ret <16 x i8> %res
}
; Function to test ternary(A, C, or(B, C)) for <8 x i16>
define <8 x i16> @ternary_A_C_or_BC_8x16(<8 x i1> %A, <8 x i16> %B, <8 x i16> %C) {
; CHECK-LABEL: ternary_A_C_or_BC_8x16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltiw v5, 983055
; CHECK-NEXT: xxlor vs0, v3, v4
; CHECK-NEXT: vslh v2, v2, v5
; CHECK-NEXT: vsrah v2, v2, v5
; CHECK-NEXT: xxsel v2, vs0, v4, v2
; CHECK-NEXT: blr
entry:
%or = or <8 x i16> %B, %C
%res = select <8 x i1> %A, <8 x i16> %C, <8 x i16> %or
ret <8 x i16> %res
}
; Function to test ternary(A, eqv(B,C), or(B, C)) for <4 x i32>
define <4 x i32> @ternary_A_eqv_BC_or_BC_4x32(<4 x i1> %A, <4 x i32> %B, <4 x i32> %C) {
@ -154,6 +252,44 @@ entry:
ret <2 x i64> %res
}
; Function to test ternary(A, eqv(B,C), or(B, C)) for <16 x i8>
define <16 x i8> @ternary_A_eqv_BC_or_BC_16x8(<16 x i1> %A, <16 x i8> %B, <16 x i8> %C) {
; CHECK-LABEL: ternary_A_eqv_BC_or_BC_16x8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltib v5, 7
; CHECK-NEXT: xxleqv vs0, v3, v4
; CHECK-NEXT: xxlor vs1, v3, v4
; CHECK-NEXT: vslb v2, v2, v5
; CHECK-NEXT: vsrab v2, v2, v5
; CHECK-NEXT: xxsel v2, vs1, vs0, v2
; CHECK-NEXT: blr
entry:
%xor = xor <16 x i8> %B, %C
%eqv = xor <16 x i8> %xor, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> ; Vector eqv operation
%or = or <16 x i8> %B, %C
%res = select <16 x i1> %A, <16 x i8> %eqv, <16 x i8> %or
ret <16 x i8> %res
}
; Function to test ternary(A, eqv(B,C), or(B, C)) for <8 x i16>
define <8 x i16> @ternary_A_eqv_BC_or_BC_8x16(<8 x i1> %A, <8 x i16> %B, <8 x i16> %C) {
; CHECK-LABEL: ternary_A_eqv_BC_or_BC_8x16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltiw v5, 983055
; CHECK-NEXT: xxleqv vs0, v3, v4
; CHECK-NEXT: xxlor vs1, v3, v4
; CHECK-NEXT: vslh v2, v2, v5
; CHECK-NEXT: vsrah v2, v2, v5
; CHECK-NEXT: xxsel v2, vs1, vs0, v2
; CHECK-NEXT: blr
entry:
%xor = xor <8 x i16> %B, %C
%eqv = xor <8 x i16> %xor, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> ; Vector eqv operation
%or = or <8 x i16> %B, %C
%res = select <8 x i1> %A, <8 x i16> %eqv, <8 x i16> %or
ret <8 x i16> %res
}
; Function to test ternary(A, not(C), or(B, C)) for <4 x i32>
define <4 x i32> @ternary_A_not_C_or_BC_4x32(<4 x i1> %A, <4 x i32> %B, <4 x i32> %C) {
; CHECK-LABEL: ternary_A_not_C_or_BC_4x32:
@ -191,6 +327,42 @@ entry:
ret <2 x i64> %res
}
; Function to test ternary(A, not(C), or(B, C)) for <16 x i8>
define <16 x i8> @ternary_A_not_C_or_BC_16x8(<16 x i1> %A, <16 x i8> %B, <16 x i8> %C) {
; CHECK-LABEL: ternary_A_not_C_or_BC_16x8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltib v5, 7
; CHECK-NEXT: xxlnor vs0, v4, v4
; CHECK-NEXT: xxlor vs1, v3, v4
; CHECK-NEXT: vslb v2, v2, v5
; CHECK-NEXT: vsrab v2, v2, v5
; CHECK-NEXT: xxsel v2, vs1, vs0, v2
; CHECK-NEXT: blr
entry:
%not = xor <16 x i8> %C, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> ; Vector not operation
%or = or <16 x i8> %B, %C
%res = select <16 x i1> %A, <16 x i8> %not, <16 x i8> %or
ret <16 x i8> %res
}
; Function to test ternary(A, not(C), or(B, C)) for <8 x i16>
define <8 x i16> @ternary_A_not_C_or_BC_8x16(<8 x i1> %A, <8 x i16> %B, <8 x i16> %C) {
; CHECK-LABEL: ternary_A_not_C_or_BC_8x16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltiw v5, 983055
; CHECK-NEXT: xxlnor vs0, v4, v4
; CHECK-NEXT: xxlor vs1, v3, v4
; CHECK-NEXT: vslh v2, v2, v5
; CHECK-NEXT: vsrah v2, v2, v5
; CHECK-NEXT: xxsel v2, vs1, vs0, v2
; CHECK-NEXT: blr
entry:
%not = xor <8 x i16> %C, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> ; Vector not operation
%or = or <8 x i16> %B, %C
%res = select <8 x i1> %A, <8 x i16> %not, <8 x i16> %or
ret <8 x i16> %res
}
; Function to test ternary(A, not(B), or(B, C)) for <4 x i32>
define <4 x i32> @ternary_A_not_B_or_BC_4x32(<4 x i1> %A, <4 x i32> %B, <4 x i32> %C) {
; CHECK-LABEL: ternary_A_not_B_or_BC_4x32:
@ -228,6 +400,42 @@ entry:
ret <2 x i64> %res
}
; Function to test ternary(A, not(B), or(B, C)) for <16 x i8>
define <16 x i8> @ternary_A_not_B_or_BC_16x8(<16 x i1> %A, <16 x i8> %B, <16 x i8> %C) {
; CHECK-LABEL: ternary_A_not_B_or_BC_16x8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltib v5, 7
; CHECK-NEXT: xxlnor vs0, v3, v3
; CHECK-NEXT: xxlor vs1, v3, v4
; CHECK-NEXT: vslb v2, v2, v5
; CHECK-NEXT: vsrab v2, v2, v5
; CHECK-NEXT: xxsel v2, vs1, vs0, v2
; CHECK-NEXT: blr
entry:
%not = xor <16 x i8> %B, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> ; Vector not operation
%or = or <16 x i8> %B, %C
%res = select <16 x i1> %A, <16 x i8> %not, <16 x i8> %or
ret <16 x i8> %res
}
; Function to test ternary(A, not(B), or(B, C)) for <8 x i16>
define <8 x i16> @ternary_A_not_B_or_BC_8x16(<8 x i1> %A, <8 x i16> %B, <8 x i16> %C) {
; CHECK-LABEL: ternary_A_not_B_or_BC_8x16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltiw v5, 983055
; CHECK-NEXT: xxlnor vs0, v3, v3
; CHECK-NEXT: xxlor vs1, v3, v4
; CHECK-NEXT: vslh v2, v2, v5
; CHECK-NEXT: vsrah v2, v2, v5
; CHECK-NEXT: xxsel v2, vs1, vs0, v2
; CHECK-NEXT: blr
entry:
%not = xor <8 x i16> %B, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> ; Vector not operation
%or = or <8 x i16> %B, %C
%res = select <8 x i1> %A, <8 x i16> %not, <8 x i16> %or
ret <8 x i16> %res
}
; Function to test ternary(A, nand(B,C), or(B, C)) for <4 x i32>
define <4 x i32> @ternary_A_nand_BC_or_BC_4x32(<4 x i1> %A, <4 x i32> %B, <4 x i32> %C) {
; CHECK-LABEL: ternary_A_nand_BC_or_BC_4x32:
@ -266,3 +474,41 @@ entry:
%res = select <2 x i1> %A, <2 x i64> %nand, <2 x i64> %or
ret <2 x i64> %res
}
; Function to test ternary(A, nand(B,C), or(B, C)) for <16 x i8>
define <16 x i8> @ternary_A_nand_BC_or_BC_16x8(<16 x i1> %A, <16 x i8> %B, <16 x i8> %C) {
; CHECK-LABEL: ternary_A_nand_BC_or_BC_16x8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltib v5, 7
; CHECK-NEXT: xxlnand vs0, v3, v4
; CHECK-NEXT: xxlor vs1, v3, v4
; CHECK-NEXT: vslb v2, v2, v5
; CHECK-NEXT: vsrab v2, v2, v5
; CHECK-NEXT: xxsel v2, vs1, vs0, v2
; CHECK-NEXT: blr
entry:
%and = and <16 x i8> %B, %C
%nand = xor <16 x i8> %and, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> ; Vector nand operation
%or = or <16 x i8> %B, %C
%res = select <16 x i1> %A, <16 x i8> %nand, <16 x i8> %or
ret <16 x i8> %res
}
; Function to test ternary(A, nand(B,C), or(B, C)) for <8 x i16>
define <8 x i16> @ternary_A_nand_BC_or_BC_8x16(<8 x i1> %A, <8 x i16> %B, <8 x i16> %C) {
; CHECK-LABEL: ternary_A_nand_BC_or_BC_8x16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltiw v5, 983055
; CHECK-NEXT: xxlnand vs0, v3, v4
; CHECK-NEXT: xxlor vs1, v3, v4
; CHECK-NEXT: vslh v2, v2, v5
; CHECK-NEXT: vsrah v2, v2, v5
; CHECK-NEXT: xxsel v2, vs1, vs0, v2
; CHECK-NEXT: blr
entry:
%and = and <8 x i16> %B, %C
%nand = xor <8 x i16> %and, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> ; Vector nand operation
%or = or <8 x i16> %B, %C
%res = select <8 x i1> %A, <8 x i16> %nand, <8 x i16> %or
ret <8 x i16> %res
}

176
llvm/test/CodeGen/PowerPC/xxeval-vselect-x-xor.ll
View File

@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; Test file to verify the emission of Vector selection instructions when ternary operators are used.
; Test file to verify the emission of Vector Selection instructions when ternary operators are used.
; RUN: llc -verify-machineinstrs -mcpu=pwr10 -mtriple=powerpc64le-unknown-unknown \
; RUN: -ppc-asm-full-reg-names --ppc-vsr-nums-as-vr < %s | FileCheck %s
@ -47,6 +47,42 @@ entry:
ret <2 x i64> %res
}
; Function to test ternary(A, and(B, C), xor(B, C)) for <16 x i8>
define <16 x i8> @ternary_A_and_BC_xor_BC_16x8(<16 x i1> %A, <16 x i8> %B, <16 x i8> %C) {
; CHECK-LABEL: ternary_A_and_BC_xor_BC_16x8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltib v5, 7
; CHECK-NEXT: xxland vs0, v3, v4
; CHECK-NEXT: xxlxor vs1, v3, v4
; CHECK-NEXT: vslb v2, v2, v5
; CHECK-NEXT: vsrab v2, v2, v5
; CHECK-NEXT: xxsel v2, vs1, vs0, v2
; CHECK-NEXT: blr
entry:
%and = and <16 x i8> %B, %C
%xor = xor <16 x i8> %B, %C
%res = select <16 x i1> %A, <16 x i8> %and, <16 x i8> %xor
ret <16 x i8> %res
}
; Function to test ternary(A, and(B, C), xor(B, C)) for <8 x i16>
define <8 x i16> @ternary_A_and_BC_xor_BC_8x16(<8 x i1> %A, <8 x i16> %B, <8 x i16> %C) {
; CHECK-LABEL: ternary_A_and_BC_xor_BC_8x16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltiw v5, 983055
; CHECK-NEXT: xxland vs0, v3, v4
; CHECK-NEXT: xxlxor vs1, v3, v4
; CHECK-NEXT: vslh v2, v2, v5
; CHECK-NEXT: vsrah v2, v2, v5
; CHECK-NEXT: xxsel v2, vs1, vs0, v2
; CHECK-NEXT: blr
entry:
%and = and <8 x i16> %B, %C
%xor = xor <8 x i16> %B, %C
%res = select <8 x i1> %A, <8 x i16> %and, <8 x i16> %xor
ret <8 x i16> %res
}
; Function to test ternary(A, B, xor(B, C)) for <4 x i32>
define <4 x i32> @ternary_A_B_xor_BC_4x32(<4 x i1> %A, <4 x i32> %B, <4 x i32> %C) {
; CHECK-LABEL: ternary_A_B_xor_BC_4x32:
@ -80,6 +116,38 @@ entry:
ret <2 x i64> %res
}
; Function to test ternary(A, B, xor(B, C)) for <16 x i8>
define <16 x i8> @ternary_A_B_xor_BC_16x8(<16 x i1> %A, <16 x i8> %B, <16 x i8> %C) {
; CHECK-LABEL: ternary_A_B_xor_BC_16x8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltib v5, 7
; CHECK-NEXT: xxlxor vs0, v3, v4
; CHECK-NEXT: vslb v2, v2, v5
; CHECK-NEXT: vsrab v2, v2, v5
; CHECK-NEXT: xxsel v2, vs0, v3, v2
; CHECK-NEXT: blr
entry:
%xor = xor <16 x i8> %B, %C
%res = select <16 x i1> %A, <16 x i8> %B, <16 x i8> %xor
ret <16 x i8> %res
}
; Function to test ternary(A, B, xor(B, C)) for <8 x i16>
define <8 x i16> @ternary_A_B_xor_BC_8x16(<8 x i1> %A, <8 x i16> %B, <8 x i16> %C) {
; CHECK-LABEL: ternary_A_B_xor_BC_8x16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltiw v5, 983055
; CHECK-NEXT: xxlxor vs0, v3, v4
; CHECK-NEXT: vslh v2, v2, v5
; CHECK-NEXT: vsrah v2, v2, v5
; CHECK-NEXT: xxsel v2, vs0, v3, v2
; CHECK-NEXT: blr
entry:
%xor = xor <8 x i16> %B, %C
%res = select <8 x i1> %A, <8 x i16> %B, <8 x i16> %xor
ret <8 x i16> %res
}
; Function to test ternary(A, C, xor(B, C)) for <4 x i32>
define <4 x i32> @ternary_A_C_xor_BC_4x32(<4 x i1> %A, <4 x i32> %B, <4 x i32> %C) {
; CHECK-LABEL: ternary_A_C_xor_BC_4x32:
@ -113,6 +181,38 @@ entry:
ret <2 x i64> %res
}
; Function to test ternary(A, C, xor(B, C)) for <16 x i8>
define <16 x i8> @ternary_A_C_xor_BC_16x8(<16 x i1> %A, <16 x i8> %B, <16 x i8> %C) {
; CHECK-LABEL: ternary_A_C_xor_BC_16x8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltib v5, 7
; CHECK-NEXT: xxlxor vs0, v3, v4
; CHECK-NEXT: vslb v2, v2, v5
; CHECK-NEXT: vsrab v2, v2, v5
; CHECK-NEXT: xxsel v2, vs0, v4, v2
; CHECK-NEXT: blr
entry:
%xor = xor <16 x i8> %B, %C
%res = select <16 x i1> %A, <16 x i8> %C, <16 x i8> %xor
ret <16 x i8> %res
}
; Function to test ternary(A, C, xor(B, C)) for <8 x i16>
define <8 x i16> @ternary_A_C_xor_BC_8x16(<8 x i1> %A, <8 x i16> %B, <8 x i16> %C) {
; CHECK-LABEL: ternary_A_C_xor_BC_8x16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltiw v5, 983055
; CHECK-NEXT: xxlxor vs0, v3, v4
; CHECK-NEXT: vslh v2, v2, v5
; CHECK-NEXT: vsrah v2, v2, v5
; CHECK-NEXT: xxsel v2, vs0, v4, v2
; CHECK-NEXT: blr
entry:
%xor = xor <8 x i16> %B, %C
%res = select <8 x i1> %A, <8 x i16> %C, <8 x i16> %xor
ret <8 x i16> %res
}
; Function to test ternary(A, or(B, C), xor(B, C)) for <4 x i32>
define <4 x i32> @ternary_A_or_BC_xor_BC_4x32(<4 x i1> %A, <4 x i32> %B, <4 x i32> %C) {
; CHECK-LABEL: ternary_A_or_BC_xor_BC_4x32:
@ -150,6 +250,42 @@ entry:
ret <2 x i64> %res
}
; Function to test ternary(A, or(B, C), xor(B, C)) for <16 x i8>
define <16 x i8> @ternary_A_or_BC_xor_BC_16x8(<16 x i1> %A, <16 x i8> %B, <16 x i8> %C) {
; CHECK-LABEL: ternary_A_or_BC_xor_BC_16x8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltib v5, 7
; CHECK-NEXT: xxlor vs0, v3, v4
; CHECK-NEXT: xxlxor vs1, v3, v4
; CHECK-NEXT: vslb v2, v2, v5
; CHECK-NEXT: vsrab v2, v2, v5
; CHECK-NEXT: xxsel v2, vs1, vs0, v2
; CHECK-NEXT: blr
entry:
%or = or <16 x i8> %B, %C
%xor = xor <16 x i8> %B, %C
%res = select <16 x i1> %A, <16 x i8> %or, <16 x i8> %xor
ret <16 x i8> %res
}
; Function to test ternary(A, or(B, C), xor(B, C)) for <8 x i16>
define <8 x i16> @ternary_A_or_BC_xor_BC_8x16(<8 x i1> %A, <8 x i16> %B, <8 x i16> %C) {
; CHECK-LABEL: ternary_A_or_BC_xor_BC_8x16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltiw v5, 983055
; CHECK-NEXT: xxlor vs0, v3, v4
; CHECK-NEXT: xxlxor vs1, v3, v4
; CHECK-NEXT: vslh v2, v2, v5
; CHECK-NEXT: vsrah v2, v2, v5
; CHECK-NEXT: xxsel v2, vs1, vs0, v2
; CHECK-NEXT: blr
entry:
%or = or <8 x i16> %B, %C
%xor = xor <8 x i16> %B, %C
%res = select <8 x i1> %A, <8 x i16> %or, <8 x i16> %xor
ret <8 x i16> %res
}
; Function to test ternary(A, nor(B, C), xor(B, C)) for <4 x i32>
define <4 x i32> @ternary_A_nor_BC_xor_BC_4x32(<4 x i1> %A, <4 x i32> %B, <4 x i32> %C) {
; CHECK-LABEL: ternary_A_nor_BC_xor_BC_4x32:
@ -188,3 +324,41 @@ entry:
%res = select <2 x i1> %A, <2 x i64> %nor, <2 x i64> %xor
ret <2 x i64> %res
}
; Function to test ternary(A, nor(B, C), xor(B, C)) for <16 x i8>
define <16 x i8> @ternary_A_nor_BC_xor_BC_16x8(<16 x i1> %A, <16 x i8> %B, <16 x i8> %C) {
; CHECK-LABEL: ternary_A_nor_BC_xor_BC_16x8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltib v5, 7
; CHECK-NEXT: xxlnor vs0, v3, v4
; CHECK-NEXT: xxlxor vs1, v3, v4
; CHECK-NEXT: vslb v2, v2, v5
; CHECK-NEXT: vsrab v2, v2, v5
; CHECK-NEXT: xxsel v2, vs1, vs0, v2
; CHECK-NEXT: blr
entry:
%or = or <16 x i8> %B, %C
%nor = xor <16 x i8> %or, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> ; vector nor operation
%xor = xor <16 x i8> %B, %C
%res = select <16 x i1> %A, <16 x i8> %nor, <16 x i8> %xor
ret <16 x i8> %res
}
; Function to test ternary(A, nor(B, C), xor(B, C)) for <8 x i16>
define <8 x i16> @ternary_A_nor_BC_xor_BC_8x16(<8 x i1> %A, <8 x i16> %B, <8 x i16> %C) {
; CHECK-LABEL: ternary_A_nor_BC_xor_BC_8x16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxspltiw v5, 983055
; CHECK-NEXT: xxlnor vs0, v3, v4
; CHECK-NEXT: xxlxor vs1, v3, v4
; CHECK-NEXT: vslh v2, v2, v5
; CHECK-NEXT: vsrah v2, v2, v5
; CHECK-NEXT: xxsel v2, vs1, vs0, v2
; CHECK-NEXT: blr
entry:
%or = or <8 x i16> %B, %C
%nor = xor <8 x i16> %or, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> ; vector nor operation
%xor = xor <8 x i16> %B, %C
%res = select <8 x i1> %A, <8 x i16> %nor, <8 x i16> %xor
ret <8 x i16> %res
}