From 4abe3f18e2f021eee24b2b2c5cc366226fee0c60 Mon Sep 17 00:00:00 2001
From: Natalie Chouinard <chouinard@google.com>
Date: Wed, 30 Aug 2023 20:29:56 +0000
Subject: [PATCH] [SPIRV] Fix bug in emitting GLSL ext inst names

Lookup extended instruction numbers in the given instruction set so that
correct names are now emitted for GLSL.std.450 instructions as well as
OpenCL.std.

Add a single test to verify correct abs intrinsic names are emitted when
targetting logical SPIR-V.

Depends on D156424

Differential Revision: https://reviews.llvm.org/D159227
---
 .../SPIRV/MCTargetDesc/SPIRVBaseInfo.cpp      |  3 +--
 .../test/CodeGen/SPIRV/hlsl-intrinsics/abs.ll | 27 +++++++++++++++++++
 2 files changed, 28 insertions(+), 2 deletions(-)
 create mode 100644 llvm/test/CodeGen/SPIRV/hlsl-intrinsics/abs.ll

diff --git a/llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVBaseInfo.cpp b/llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVBaseInfo.cpp
index 020cfa6ee20f..1af7b7a5d784 100644
--- a/llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVBaseInfo.cpp
+++ b/llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVBaseInfo.cpp
@@ -217,8 +217,7 @@ getExtInstSetFromString(std::string SetName) {
 std::string getExtInstName(SPIRV::InstructionSet::InstructionSet Set,
                            uint32_t InstructionNumber) {
   const SPIRV::ExtendedBuiltin *Lookup =
-      SPIRV::lookupExtendedBuiltinBySetAndNumber(
-          SPIRV::InstructionSet::OpenCL_std, InstructionNumber);
+      SPIRV::lookupExtendedBuiltinBySetAndNumber(Set, InstructionNumber);
 
   if (!Lookup)
     return "UNKNOWN_EXT_INST";
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/abs.ll b/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/abs.ll
new file mode 100644
index 000000000000..7031129de21a
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/abs.ll
@@ -0,0 +1,27 @@
+; RUN: llc -O0 -mtriple=spirv-unknown-linux %s -o - | FileCheck %s
+
+; CHECK: OpExtInstImport "GLSL.std.450"
+
+define void @main() #1 {
+entry:
+  %i = alloca i32, align 4
+  %absi = alloca i32, align 4
+  %f = alloca float, align 4
+  %absf = alloca float, align 4
+  %0 = load i32, ptr %i, align 4
+
+; CHECK: %[[#]] = OpExtInst %[[#]] %[[#]] SAbs %[[#]]
+  %elt.abs = call i32 @llvm.abs.i32(i32 %0, i1 false)
+
+  store i32 %elt.abs, ptr %absi, align 4
+  %1 = load float, ptr %f, align 4
+
+; CHECK: %[[#]] = OpExtInst %[[#]] %[[#]] FAbs %[[#]]
+  %elt.abs1 = call float @llvm.fabs.f32(float %1)
+
+  store float %elt.abs1, ptr %absf, align 4
+  ret void
+}
+
+declare i32 @llvm.abs.i32(i32, i1 immarg) #2
+declare float @llvm.fabs.f32(float) #2