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[AMDGPU][DOC][NFC] Updated GFX1030 assembler syntax description

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Summary of changes:
- enabled null for VOP operands;
- added description of s_waitcnt_depctr syntactic sugar.
This commit is contained in:
Dmitry Preobrazhensky 2022-04-12 14:55:46 +03:00
parent bc32a1dd76
commit 4e83d4fd92
16 changed files with 1062 additions and 1039 deletions
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1966
llvm/docs/AMDGPU/AMDGPUAsmGFX1030.rst
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17
llvm/docs/AMDGPU/gfx1030_sdst_2e4c2a.rst
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..
**************************************************
* *
* Automatically generated file, do not edit! *
* *
**************************************************
.. _amdgpu_synid_gfx1030_sdst_2e4c2a:
sdst
====
Instruction output.
*Size:* 1 dword.
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`

4
llvm/docs/AMDGPU/gfx1030_sdst_3759f6.rst → llvm/docs/AMDGPU/gfx1030_sdst_3cd7ad.rst
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@ -5,7 +5,7 @@
* *
**************************************************
.. _amdgpu_synid_gfx1030_sdst_3759f6:
.. _amdgpu_synid_gfx1030_sdst_3cd7ad:
sdst
====
@ -14,4 +14,4 @@ Instruction output.
*Size:* 1 dword if wavefront size is 32, otherwise 2 dwords.
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`

4
llvm/docs/AMDGPU/gfx1030_src_37d670.rst → llvm/docs/AMDGPU/gfx1030_src_1facfe.rst
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@ -5,7 +5,7 @@
* *
**************************************************
.. _amdgpu_synid_gfx1030_src_37d670:
.. _amdgpu_synid_gfx1030_src_1facfe:
src
===
@ -14,4 +14,4 @@ Instruction input.
*Size:* 1 dword.
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`iconst<amdgpu_synid_iconst>`, :ref:`ival<amdgpu_synid_ival>`, :ref:`literal<amdgpu_synid_literal>`

4
llvm/docs/AMDGPU/gfx1030_src_c27036.rst → llvm/docs/AMDGPU/gfx1030_src_207976.rst
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@ -5,7 +5,7 @@
* *
**************************************************
.. _amdgpu_synid_gfx1030_src_c27036:
.. _amdgpu_synid_gfx1030_src_207976:
src
===
@ -14,4 +14,4 @@ Instruction input.
*Size:* 1 dword.
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`iconst<amdgpu_synid_iconst>`, :ref:`ival<amdgpu_synid_ival>`, :ref:`literal<amdgpu_synid_literal>`
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`, :ref:`literal<amdgpu_synid_literal>`

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llvm/docs/AMDGPU/gfx1030_src_364d7c.rst Normal file
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..
**************************************************
* *
* Automatically generated file, do not edit! *
* *
**************************************************
.. _amdgpu_synid_gfx1030_src_364d7c:
src
===
Instruction input.
*Size:* 1 dword.
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`lds_direct<amdgpu_synid_lds_direct>`, :ref:`iconst<amdgpu_synid_iconst>`, :ref:`ival<amdgpu_synid_ival>`, :ref:`literal<amdgpu_synid_literal>`

4
llvm/docs/AMDGPU/gfx1030_src_823582.rst → llvm/docs/AMDGPU/gfx1030_src_5bb6f2.rst
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@ -5,7 +5,7 @@
* *
**************************************************
.. _amdgpu_synid_gfx1030_src_823582:
.. _amdgpu_synid_gfx1030_src_5bb6f2:
src
===
@ -14,4 +14,4 @@ Instruction input.
*Size:* 1 dword.
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`lds_direct<amdgpu_synid_lds_direct>`, :ref:`constant<amdgpu_synid_constant>`, :ref:`literal<amdgpu_synid_literal>`
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`lds_direct<amdgpu_synid_lds_direct>`, :ref:`constant<amdgpu_synid_constant>`, :ref:`literal<amdgpu_synid_literal>`

4
llvm/docs/AMDGPU/gfx1030_src_e0345d.rst → llvm/docs/AMDGPU/gfx1030_src_ae1543.rst
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@ -5,7 +5,7 @@
* *
**************************************************
.. _amdgpu_synid_gfx1030_src_e0345d:
.. _amdgpu_synid_gfx1030_src_ae1543:
src
===
@ -14,4 +14,4 @@ Instruction input.
*Size:* 1 dword.
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`iconst<amdgpu_synid_iconst>`, :ref:`ival<amdgpu_synid_ival>`
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`

4
llvm/docs/AMDGPU/gfx1030_src_d5cd94.rst → llvm/docs/AMDGPU/gfx1030_src_b9c62f.rst
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@ -5,7 +5,7 @@
* *
**************************************************
.. _amdgpu_synid_gfx1030_src_d5cd94:
.. _amdgpu_synid_gfx1030_src_b9c62f:
src
===
@ -14,4 +14,4 @@ Instruction input.
*Size:* 2 dwords.
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`, :ref:`literal<amdgpu_synid_literal>`
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`, :ref:`literal<amdgpu_synid_literal>`

17
llvm/docs/AMDGPU/gfx1030_src_e9e6db.rst
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@ -1,17 +0,0 @@
..
**************************************************
* *
* Automatically generated file, do not edit! *
* *
**************************************************
.. _amdgpu_synid_gfx1030_src_e9e6db:
src
===
Instruction input.
*Size:* 1 dword.
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`lds_direct<amdgpu_synid_lds_direct>`, :ref:`iconst<amdgpu_synid_iconst>`, :ref:`ival<amdgpu_synid_ival>`, :ref:`literal<amdgpu_synid_literal>`

4
llvm/docs/AMDGPU/gfx1030_src_cf1cda.rst → llvm/docs/AMDGPU/gfx1030_src_edf2a5.rst
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@ -5,7 +5,7 @@
* *
**************************************************
.. _amdgpu_synid_gfx1030_src_cf1cda:
.. _amdgpu_synid_gfx1030_src_edf2a5:
src
===
@ -14,4 +14,4 @@ Instruction input.
*Size:* 1 dword.
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`, :ref:`literal<amdgpu_synid_literal>`
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`iconst<amdgpu_synid_iconst>`, :ref:`ival<amdgpu_synid_ival>`

4
llvm/docs/AMDGPU/gfx1030_ssrc_48e8e7.rst → llvm/docs/AMDGPU/gfx1030_ssrc_361664.rst
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@ -5,7 +5,7 @@
* *
**************************************************
.. _amdgpu_synid_gfx1030_ssrc_48e8e7:
.. _amdgpu_synid_gfx1030_ssrc_361664:
ssrc
====
@ -14,4 +14,4 @@ Instruction input.
*Size:* 1 dword.
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`iconst<amdgpu_synid_iconst>`
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`iconst<amdgpu_synid_iconst>`

4
llvm/docs/AMDGPU/gfx1030_ssrc_9a4448.rst → llvm/docs/AMDGPU/gfx1030_ssrc_7a07c6.rst
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@ -5,7 +5,7 @@
* *
**************************************************
.. _amdgpu_synid_gfx1030_ssrc_9a4448:
.. _amdgpu_synid_gfx1030_ssrc_7a07c6:
ssrc
====
@ -14,4 +14,4 @@ Instruction input.
*Size:* 1 dword.
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`constant<amdgpu_synid_constant>`

4
llvm/docs/AMDGPU/gfx1030_ssrc_3ec588.rst → llvm/docs/AMDGPU/gfx1030_ssrc_8dd4e0.rst
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@ -5,7 +5,7 @@
* *
**************************************************
.. _amdgpu_synid_gfx1030_ssrc_3ec588:
.. _amdgpu_synid_gfx1030_ssrc_8dd4e0:
ssrc
====
@ -14,4 +14,4 @@ Instruction input.
*Size:* 1 dword if wavefront size is 32, otherwise 2 dwords.
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`

4
llvm/docs/AMDGPU/gfx1030_ssrc_054e2a.rst → llvm/docs/AMDGPU/gfx1030_ssrc_8e54e0.rst
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@ -5,7 +5,7 @@
* *
**************************************************
.. _amdgpu_synid_gfx1030_ssrc_054e2a:
.. _amdgpu_synid_gfx1030_ssrc_8e54e0:
ssrc
====
@ -14,4 +14,4 @@ Instruction input.
*Size:* 1 dword.
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`lds_direct<amdgpu_synid_lds_direct>`, :ref:`constant<amdgpu_synid_constant>`, :ref:`literal<amdgpu_synid_literal>`
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`exec<amdgpu_synid_exec>`, :ref:`vccz<amdgpu_synid_vccz>`, :ref:`execz<amdgpu_synid_execz>`, :ref:`scc<amdgpu_synid_scc>`, :ref:`lds_direct<amdgpu_synid_lds_direct>`, :ref:`constant<amdgpu_synid_constant>`, :ref:`literal<amdgpu_synid_literal>`

40
llvm/docs/AMDGPU/gfx1030_waitcnt_depctr.rst Normal file
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@ -0,0 +1,40 @@
..
**************************************************
* *
* Automatically generated file, do not edit! *
* *
**************************************************
.. _amdgpu_synid_gfx1030_waitcnt_depctr:
waitcnt_depctr
==============
Dependency counters to wait for.
This operand may be specified as one of the following:
* An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range -32768..65535.
* A combination of *symbolic values* described below.
======================== ======================== ================ =================
Syntax Description Valid *N* Values Default *N* Value
======================== ======================== ================ =================
depctr_hold_cnt(<*N*>) Wait for HOLD_CNT <= N 0..1 1
depctr_sa_sdst(<*N*>) Wait for SA_SDST <= N 0..1 1
depctr_va_vdst(<*N*>) Wait for VA_VDST <= N 0..15 15
depctr_va_sdst(<*N*>) Wait for VA_SDST <= N 0..7 7
depctr_va_ssrc(<*N*>) Wait for VA_SSRC <= N 0..1 1
depctr_va_vcc(<*N*>) Wait for VA_VCC <= N 0..1 1
depctr_vm_vsrc(<*N*>) Wait for VM_VSRC <= N 0..7 7
======================== ======================== ================ =================
These values may be specified in any order. Spaces, ampersands and commas may be used as optional separators.
Examples:
.. parsed-literal::
s_waitcnt_depctr depctr_sa_sdst(0) depctr_va_vdst(0)
s_waitcnt_depctr depctr_sa_sdst(1) & depctr_va_vdst(1)
s_waitcnt_depctr depctr_va_vdst(3), depctr_va_sdst(5)