[SPIRV] Add tests documenting incorrect lowering of load/store atomic (#185628)
This patch only adds the tests documenting the broken behavior, but does not fix them.
This commit is contained in:
Juan Manuel Martinez Caamaño
GitHub
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b22c6b41af
commit
52ea06f884
111
llvm/test/CodeGen/SPIRV/transcoding/load-atomic.ll
Normal file
111
llvm/test/CodeGen/SPIRV/transcoding/load-atomic.ll
Normal file
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; RUN: llc -O0 -mtriple=spirv64-- %s -o - | FileCheck %s
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-- %s -o - -filetype=obj | spirv-val %}
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; RUN: llc -O0 -mtriple=spirv32-- %s -o - | FileCheck %s
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv32-- %s -o - -filetype=obj | spirv-val %}
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;; Check that 'load atomic' LLVM IR instructions are lowered.
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;; NOTE: The current lowering is incorrect: 'load atomic' should produce
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;; OpAtomicLoad but currently produces OpLoad, silently dropping the atomic
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;; ordering. This test documents the broken behaviour so it can be fixed.
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; CHECK-DAG: %[[#Int32:]] = OpTypeInt 32 0
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; CHECK-DAG: %[[#Float:]] = OpTypeFloat 32
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; CHECK-DAG: %[[#Int32Vec:]] = OpTypeVector %[[#Int32]] 2
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define i32 @load_i32_unordered(ptr addrspace(1) %ptr) {
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; CHECK-LABEL: OpFunction %[[#]]
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; CHECK: %[[#ptr:]] = OpFunctionParameter %[[#]]
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; CHECK: %[[#]] = OpLoad %[[#Int32]] %[[#ptr]] Aligned 4
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; CHECK: OpReturnValue
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%val = load atomic i32, ptr addrspace(1) %ptr unordered, align 4
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ret i32 %val
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}
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define i32 @load_i32_monotonic(ptr addrspace(1) %ptr) {
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; CHECK-LABEL: OpFunction %[[#]]
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; CHECK: %[[#ptr:]] = OpFunctionParameter %[[#]]
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; CHECK: %[[#]] = OpLoad %[[#Int32]] %[[#ptr]] Aligned 4
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; CHECK: OpReturnValue
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%val = load atomic i32, ptr addrspace(1) %ptr monotonic, align 4
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ret i32 %val
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}
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define i32 @load_i32_acquire(ptr addrspace(1) %ptr) {
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; CHECK-LABEL: OpFunction %[[#]]
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; CHECK: %[[#ptr:]] = OpFunctionParameter %[[#]]
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; CHECK: %[[#]] = OpLoad %[[#Int32]] %[[#ptr]] Aligned 4
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; CHECK: OpReturnValue
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%val = load atomic i32, ptr addrspace(1) %ptr acquire, align 4
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ret i32 %val
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}
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define i32 @load_i32_seq_cst(ptr addrspace(1) %ptr) {
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; CHECK-LABEL: OpFunction %[[#]]
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; CHECK: %[[#ptr:]] = OpFunctionParameter %[[#]]
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; CHECK: %[[#]] = OpLoad %[[#Int32]] %[[#ptr]] Aligned 4
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; CHECK: OpReturnValue
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%val = load atomic i32, ptr addrspace(1) %ptr seq_cst, align 4
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ret i32 %val
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}
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; -- test with different syncscopes
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define i32 @load_i32_acquire_singlethread(ptr addrspace(1) %ptr) {
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; CHECK-LABEL: OpFunction %[[#]]
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; CHECK: %[[#ptr:]] = OpFunctionParameter %[[#]]
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; CHECK: %[[#]] = OpLoad %[[#Int32]] %[[#ptr]] Aligned 4
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; CHECK: OpReturnValue
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%val = load atomic i32, ptr addrspace(1) %ptr syncscope("singlethread") acquire, align 4
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ret i32 %val
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}
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define i32 @load_i32_acquire_subgroup(ptr addrspace(1) %ptr) {
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; CHECK-LABEL: OpFunction %[[#]]
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; CHECK: %[[#ptr:]] = OpFunctionParameter %[[#]]
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; CHECK: %[[#]] = OpLoad %[[#Int32]] %[[#ptr]] Aligned 4
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; CHECK: OpReturnValue
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%val = load atomic i32, ptr addrspace(1) %ptr syncscope("subgroup") acquire, align 4
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ret i32 %val
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}
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define i32 @load_i32_acquire_workgroup(ptr addrspace(1) %ptr) {
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; CHECK-LABEL: OpFunction %[[#]]
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; CHECK: %[[#ptr:]] = OpFunctionParameter %[[#]]
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; CHECK: %[[#]] = OpLoad %[[#Int32]] %[[#ptr]] Aligned 4
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; CHECK: OpReturnValue
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%val = load atomic i32, ptr addrspace(1) %ptr syncscope("workgroup") acquire, align 4
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ret i32 %val
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}
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define i32 @load_i32_acquire_device(ptr addrspace(1) %ptr) {
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; CHECK-LABEL: OpFunction %[[#]]
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; CHECK: %[[#ptr:]] = OpFunctionParameter %[[#]]
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; CHECK: %[[#]] = OpLoad %[[#Int32]] %[[#ptr]] Aligned 4
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; CHECK: OpReturnValue
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%val = load atomic i32, ptr addrspace(1) %ptr syncscope("device") acquire, align 4
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ret i32 %val
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}
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; -- test with a different scalar type
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define float @load_float_acquire(ptr addrspace(1) %ptr) {
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; CHECK-LABEL: OpFunction %[[#]]
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; CHECK: %[[#ptr:]] = OpFunctionParameter %[[#]]
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; CHECK: %[[#load:]] = OpLoad %[[#Int32]] %[[#ptr]] Aligned 8
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; CHECK: %[[#val:]] = OpBitcast %[[#Float]] %[[#load]]
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; CHECK: OpReturnValue %[[#val]]
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%val = load atomic float, ptr addrspace(1) %ptr acquire, align 8
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ret float %val
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}
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; -- test with a vector type
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define <2 x i32> @load_vector_acquire(ptr addrspace(1) %ptr) {
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; CHECK-LABEL: OpFunction %[[#]]
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; CHECK: %[[#ptr:]] = OpFunctionParameter %[[#]]
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; CHECK: %[[#]] = OpLoad %[[#Int32Vec]] %[[#ptr]] Aligned 8
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; CHECK: OpReturnValue
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%val = load atomic <2 x i32>, ptr addrspace(1) %ptr acquire, align 8
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ret <2 x i32> %val
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}
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121
llvm/test/CodeGen/SPIRV/transcoding/store-atomic.ll
Normal file
121
llvm/test/CodeGen/SPIRV/transcoding/store-atomic.ll
Normal file
@ -0,0 +1,121 @@
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; RUN: llc -O0 -mtriple=spirv64-- %s -o - | FileCheck %s
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-- %s -o - -filetype=obj | spirv-val %}
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; RUN: llc -O0 -mtriple=spirv32-- %s -o - | FileCheck %s
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv32-- %s -o - -filetype=obj | spirv-val %}
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;; Check that 'store atomic' LLVM IR instructions are lowered.
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;; NOTE: The current lowering is incorrect: 'store atomic' should produce
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;; OpAtomicStore but currently produces OpStore, silently dropping the atomic
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;; ordering. This test documents the broken behaviour so it can be fixed.
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; CHECK-DAG: %[[#Int32:]] = OpTypeInt 32 0
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; CHECK-DAG: %[[#Float:]] = OpTypeFloat 32
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; CHECK-DAG: %[[#Int32Vec:]] = OpTypeVector %[[#Int32]] 2
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define void @store_i32_unordered(ptr addrspace(1) %ptr, i32 %val) {
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; CHECK-LABEL: OpFunction %[[#]]
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; CHECK: %[[#ptr:]] = OpFunctionParameter %[[#]]
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; CHECK: %[[#val:]] = OpFunctionParameter %[[#Int32]]
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; CHECK: OpStore %[[#ptr]] %[[#val]] Aligned 4
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; CHECK: OpReturn
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store atomic i32 %val, ptr addrspace(1) %ptr unordered, align 4
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ret void
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}
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define void @store_i32_monotonic(ptr addrspace(1) %ptr, i32 %val) {
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; CHECK-LABEL: OpFunction %[[#]]
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; CHECK: %[[#ptr:]] = OpFunctionParameter %[[#]]
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; CHECK: %[[#val:]] = OpFunctionParameter %[[#Int32]]
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; CHECK: OpStore %[[#ptr]] %[[#val]] Aligned 4
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; CHECK: OpReturn
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store atomic i32 %val, ptr addrspace(1) %ptr monotonic, align 4
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ret void
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}
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define void @store_i32_release(ptr addrspace(1) %ptr, i32 %val) {
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; CHECK-LABEL: OpFunction %[[#]]
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; CHECK: %[[#ptr:]] = OpFunctionParameter %[[#]]
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; CHECK: %[[#val:]] = OpFunctionParameter %[[#Int32]]
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; CHECK: OpStore %[[#ptr]] %[[#val]] Aligned 4
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; CHECK: OpReturn
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store atomic i32 %val, ptr addrspace(1) %ptr release, align 4
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ret void
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}
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define void @store_i32_seq_cst(ptr addrspace(1) %ptr, i32 %val) {
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; CHECK-LABEL: OpFunction %[[#]]
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; CHECK: %[[#ptr:]] = OpFunctionParameter %[[#]]
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; CHECK: %[[#val:]] = OpFunctionParameter %[[#Int32]]
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; CHECK: OpStore %[[#ptr]] %[[#val]] Aligned 4
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; CHECK: OpReturn
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store atomic i32 %val, ptr addrspace(1) %ptr seq_cst, align 4
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ret void
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}
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; -- test with different syncscopes
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define void @store_i32_release_singlethread(ptr addrspace(1) %ptr, i32 %val) {
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; CHECK-LABEL: OpFunction %[[#]]
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; CHECK: %[[#ptr:]] = OpFunctionParameter %[[#]]
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; CHECK: %[[#val:]] = OpFunctionParameter %[[#Int32]]
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; CHECK: OpStore %[[#ptr]] %[[#val]] Aligned 4
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; CHECK: OpReturn
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store atomic i32 %val, ptr addrspace(1) %ptr syncscope("singlethread") release, align 4
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ret void
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}
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define void @store_i32_release_subgroup(ptr addrspace(1) %ptr, i32 %val) {
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; CHECK-LABEL: OpFunction %[[#]]
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; CHECK: %[[#ptr:]] = OpFunctionParameter %[[#]]
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; CHECK: %[[#val:]] = OpFunctionParameter %[[#Int32]]
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; CHECK: OpStore %[[#ptr]] %[[#val]] Aligned 4
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; CHECK: OpReturn
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store atomic i32 %val, ptr addrspace(1) %ptr syncscope("subgroup") release, align 4
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ret void
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}
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define void @store_i32_release_workgroup(ptr addrspace(1) %ptr, i32 %val) {
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; CHECK-LABEL: OpFunction %[[#]]
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; CHECK: %[[#ptr:]] = OpFunctionParameter %[[#]]
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; CHECK: %[[#val:]] = OpFunctionParameter %[[#Int32]]
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; CHECK: OpStore %[[#ptr]] %[[#val]] Aligned 4
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; CHECK: OpReturn
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store atomic i32 %val, ptr addrspace(1) %ptr syncscope("workgroup") release, align 4
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ret void
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}
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define void @store_i32_release_device(ptr addrspace(1) %ptr, i32 %val) {
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; CHECK-LABEL: OpFunction %[[#]]
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; CHECK: %[[#ptr:]] = OpFunctionParameter %[[#]]
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; CHECK: %[[#val:]] = OpFunctionParameter %[[#Int32]]
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; CHECK: OpStore %[[#ptr]] %[[#val]] Aligned 4
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; CHECK: OpReturn
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store atomic i32 %val, ptr addrspace(1) %ptr syncscope("device") release, align 4
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ret void
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}
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; -- test with a different scalar type
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define void @store_float_release(ptr addrspace(1) %ptr, float %val) {
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; CHECK-LABEL: OpFunction %[[#]]
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; CHECK: %[[#ptr:]] = OpFunctionParameter %[[#]]
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; CHECK: %[[#val:]] = OpFunctionParameter %[[#Float]]
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; CHECK: %[[#cast:]] = OpBitcast %[[#Int32]] %[[#val]]
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; CHECK: OpStore %[[#ptr]] %[[#cast]] Aligned 8
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; CHECK: OpReturn
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store atomic float %val, ptr addrspace(1) %ptr release, align 8
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ret void
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}
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; -- test with a vector type
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define void @store_vector_release(ptr addrspace(1) %ptr, <2 x i32> %val) {
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; CHECK-LABEL: OpFunction %[[#]]
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; CHECK: %[[#ptr:]] = OpFunctionParameter %[[#]]
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; CHECK: %[[#val:]] = OpFunctionParameter %[[#Int32Vec]]
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; CHECK: OpStore %[[#ptr]] %[[#val]] Aligned 8
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; CHECK: OpReturn
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store atomic <2 x i32> %val, ptr addrspace(1) %ptr release, align 8
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ret void
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}
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