[NFC][CVP] Add some tests for sub with preexisting no-wrap flags
We can use those to further limit the ranges in LVI.
This commit is contained in:
Roman Lebedev
parent
a751f557d8
commit
55b445150d
@ -407,4 +407,220 @@ define i1 @test13(i8 %x, i64* %p) {
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ret i1 %cmp
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}
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define i1 @test14(i32 %a, i32 %b) {
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; CHECK-LABEL: @test14(
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; CHECK-NEXT: begin:
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; CHECK-NEXT: [[CMP0:%.*]] = icmp sge i32 [[A:%.*]], 0
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; CHECK-NEXT: [[CMP1:%.*]] = icmp sge i32 [[B:%.*]], 0
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; CHECK-NEXT: [[BR:%.*]] = and i1 [[CMP0]], [[CMP1]]
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; CHECK-NEXT: br i1 [[BR]], label [[BB:%.*]], label [[EXIT:%.*]]
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; CHECK: bb:
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; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[A]], [[B]]
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; CHECK-NEXT: br label [[CONT:%.*]]
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; CHECK: cont:
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; CHECK-NEXT: [[RES:%.*]] = icmp sge i32 [[SUB]], 0
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: [[IV:%.*]] = phi i1 [ true, [[BEGIN:%.*]] ], [ [[RES]], [[CONT]] ]
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; CHECK-NEXT: ret i1 [[IV]]
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;
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begin:
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%cmp0 = icmp sge i32 %a, 0
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%cmp1 = icmp sge i32 %b, 0
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%br = and i1 %cmp0, %cmp1
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br i1 %br, label %bb, label %exit
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bb:
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%sub = sub i32 %a, %b
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br label %cont
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cont:
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%res = icmp sge i32 %sub, 0
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br label %exit
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exit:
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%iv = phi i1 [ true, %begin ], [ %res, %cont ]
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ret i1 %iv
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}
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define i1 @test15(i32 %a, i32 %b) {
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; CHECK-LABEL: @test15(
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; CHECK-NEXT: begin:
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; CHECK-NEXT: [[CMP0:%.*]] = icmp sge i32 [[A:%.*]], 0
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; CHECK-NEXT: [[CMP1:%.*]] = icmp sge i32 [[B:%.*]], 0
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; CHECK-NEXT: [[BR:%.*]] = and i1 [[CMP0]], [[CMP1]]
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; CHECK-NEXT: br i1 [[BR]], label [[BB:%.*]], label [[EXIT:%.*]]
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; CHECK: bb:
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; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[A]], [[B]]
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; CHECK-NEXT: br label [[CONT:%.*]]
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; CHECK: cont:
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; CHECK-NEXT: [[RES:%.*]] = icmp sge i32 [[SUB]], 0
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: [[IV:%.*]] = phi i1 [ true, [[BEGIN:%.*]] ], [ [[RES]], [[CONT]] ]
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; CHECK-NEXT: ret i1 [[IV]]
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;
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begin:
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%cmp0 = icmp sge i32 %a, 0
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%cmp1 = icmp sge i32 %b, 0
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%br = and i1 %cmp0, %cmp1
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br i1 %br, label %bb, label %exit
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bb:
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%sub = sub nsw i32 %a, %b
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br label %cont
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cont:
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%res = icmp sge i32 %sub, 0
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br label %exit
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exit:
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%iv = phi i1 [ true, %begin ], [ %res, %cont ]
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ret i1 %iv
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}
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define i1 @test16(i32 %a, i32 %b) {
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; CHECK-LABEL: @test16(
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; CHECK-NEXT: begin:
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; CHECK-NEXT: [[CMP0:%.*]] = icmp sge i32 [[A:%.*]], 0
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; CHECK-NEXT: [[CMP1:%.*]] = icmp sge i32 [[B:%.*]], 0
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; CHECK-NEXT: [[BR:%.*]] = and i1 [[CMP0]], [[CMP1]]
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; CHECK-NEXT: br i1 [[BR]], label [[BB:%.*]], label [[EXIT:%.*]]
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; CHECK: bb:
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; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 [[A]], [[B]]
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; CHECK-NEXT: br label [[CONT:%.*]]
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; CHECK: cont:
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; CHECK-NEXT: [[RES:%.*]] = icmp sge i32 [[SUB]], 0
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: [[IV:%.*]] = phi i1 [ true, [[BEGIN:%.*]] ], [ [[RES]], [[CONT]] ]
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; CHECK-NEXT: ret i1 [[IV]]
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;
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begin:
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%cmp0 = icmp sge i32 %a, 0
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%cmp1 = icmp sge i32 %b, 0
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%br = and i1 %cmp0, %cmp1
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br i1 %br, label %bb, label %exit
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bb:
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%sub = sub nuw i32 %a, %b
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br label %cont
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cont:
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%res = icmp sge i32 %sub, 0
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br label %exit
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exit:
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%iv = phi i1 [ true, %begin ], [ %res, %cont ]
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ret i1 %iv
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}
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define i1 @test17(i32 %a, i32 %b) {
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; CHECK-LABEL: @test17(
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; CHECK-NEXT: begin:
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; CHECK-NEXT: [[CMP0:%.*]] = icmp sle i32 [[A:%.*]], 0
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; CHECK-NEXT: [[CMP1:%.*]] = icmp sge i32 [[B:%.*]], 0
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; CHECK-NEXT: [[BR:%.*]] = and i1 [[CMP0]], [[CMP1]]
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; CHECK-NEXT: br i1 [[BR]], label [[BB:%.*]], label [[EXIT:%.*]]
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; CHECK: bb:
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[A]], [[B]]
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; CHECK-NEXT: br label [[CONT:%.*]]
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; CHECK: cont:
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; CHECK-NEXT: [[RES:%.*]] = icmp sle i32 [[SUB]], 0
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: [[IV:%.*]] = phi i1 [ true, [[BEGIN:%.*]] ], [ [[RES]], [[CONT]] ]
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; CHECK-NEXT: ret i1 [[IV]]
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;
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begin:
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%cmp0 = icmp sle i32 %a, 0
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%cmp1 = icmp sge i32 %b, 0
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%br = and i1 %cmp0, %cmp1
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br i1 %br, label %bb, label %exit
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bb:
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%sub = sub i32 %a, %b
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br label %cont
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cont:
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%res = icmp sle i32 %sub, 0
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br label %exit
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exit:
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%iv = phi i1 [ true, %begin ], [ %res, %cont ]
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ret i1 %iv
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}
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define i1 @test18(i32 %a, i32 %b) {
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; CHECK-LABEL: @test18(
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; CHECK-NEXT: begin:
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; CHECK-NEXT: [[CMP0:%.*]] = icmp sle i32 [[A:%.*]], 0
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; CHECK-NEXT: [[CMP1:%.*]] = icmp sge i32 [[B:%.*]], 0
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; CHECK-NEXT: [[BR:%.*]] = and i1 [[CMP0]], [[CMP1]]
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; CHECK-NEXT: br i1 [[BR]], label [[BB:%.*]], label [[EXIT:%.*]]
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; CHECK: bb:
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; CHECK-NEXT: [[SUB:%.*]] = sub nuw i32 [[A]], [[B]]
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; CHECK-NEXT: br label [[CONT:%.*]]
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; CHECK: cont:
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; CHECK-NEXT: [[RES:%.*]] = icmp sle i32 [[SUB]], 0
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: [[IV:%.*]] = phi i1 [ true, [[BEGIN:%.*]] ], [ [[RES]], [[CONT]] ]
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; CHECK-NEXT: ret i1 [[IV]]
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;
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begin:
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%cmp0 = icmp sle i32 %a, 0
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%cmp1 = icmp sge i32 %b, 0
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%br = and i1 %cmp0, %cmp1
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br i1 %br, label %bb, label %exit
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bb:
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%sub = sub nuw i32 %a, %b
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br label %cont
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cont:
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%res = icmp sle i32 %sub, 0
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br label %exit
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exit:
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%iv = phi i1 [ true, %begin ], [ %res, %cont ]
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ret i1 %iv
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}
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define i1 @test19(i32 %a, i32 %b) {
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; CHECK-LABEL: @test19(
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; CHECK-NEXT: begin:
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; CHECK-NEXT: [[CMP0:%.*]] = icmp sle i32 [[A:%.*]], 0
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; CHECK-NEXT: [[CMP1:%.*]] = icmp sge i32 [[B:%.*]], 0
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; CHECK-NEXT: [[BR:%.*]] = and i1 [[CMP0]], [[CMP1]]
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; CHECK-NEXT: br i1 [[BR]], label [[BB:%.*]], label [[EXIT:%.*]]
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; CHECK: bb:
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; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[A]], [[B]]
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; CHECK-NEXT: br label [[CONT:%.*]]
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; CHECK: cont:
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; CHECK-NEXT: [[RES:%.*]] = icmp sle i32 [[SUB]], 0
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: [[IV:%.*]] = phi i1 [ true, [[BEGIN:%.*]] ], [ [[RES]], [[CONT]] ]
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; CHECK-NEXT: ret i1 [[IV]]
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;
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begin:
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%cmp0 = icmp sle i32 %a, 0
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%cmp1 = icmp sge i32 %b, 0
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%br = and i1 %cmp0, %cmp1
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br i1 %br, label %bb, label %exit
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bb:
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%sub = sub nsw i32 %a, %b
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br label %cont
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cont:
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%res = icmp sle i32 %sub, 0
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br label %exit
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exit:
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%iv = phi i1 [ true, %begin ], [ %res, %cont ]
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ret i1 %iv
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}
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attributes #4 = { noreturn }
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