LLVM_FALLTHROUGH => [[fallthrough]]. NFC
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@ -253,7 +253,7 @@ void getSignature(const CodeCompletionString &CCS, std::string *Signature,
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if (!IncludeFunctionArguments &&
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ResultKind == CodeCompletionResult::RK_Declaration)
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TruncateSnippetAt.emplace(Snippet->size());
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LLVM_FALLTHROUGH;
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[[fallthrough]];
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case CodeCompletionString::CK_RightParen:
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case CodeCompletionString::CK_LeftBracket:
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case CodeCompletionString::CK_RightBracket:
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@ -1869,15 +1869,15 @@ AppleObjCRuntimeV2::DynamicClassInfoExtractor::ComputeHelper(
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if (loader->IsFullyInitialized()) {
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switch (exe_ctx.GetTargetRef().GetDynamicClassInfoHelper()) {
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case eDynamicClassInfoHelperAuto:
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LLVM_FALLTHROUGH;
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[[fallthrough]];
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case eDynamicClassInfoHelperGetRealizedClassList:
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if (m_runtime.m_has_objc_getRealizedClassList_trylock)
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return DynamicClassInfoExtractor::objc_getRealizedClassList_trylock;
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LLVM_FALLTHROUGH;
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[[fallthrough]];
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case eDynamicClassInfoHelperCopyRealizedClassList:
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if (m_runtime.m_has_objc_copyRealizedClassList)
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return DynamicClassInfoExtractor::objc_copyRealizedClassList;
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LLVM_FALLTHROUGH;
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[[fallthrough]];
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case eDynamicClassInfoHelperRealizedClassesStruct:
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return DynamicClassInfoExtractor::gdb_objc_realized_classes;
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}
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@ -76,7 +76,7 @@ void GenericConvergenceVerifier<ContextT>::visit(const InstructionT &I) {
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"Entry intrinsic cannot be preceded by a convergent operation in the "
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"same basic block.",
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{Context.print(&I)});
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LLVM_FALLTHROUGH;
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[[fallthrough]];
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case CONV_ANCHOR:
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Check(!TokenDef,
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"Entry or anchor intrinsic cannot have a convergencectrl token "
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@ -2223,7 +2223,7 @@ bool IRTranslator::translateKnownIntrinsic(const CallInst &CI, Intrinsic::ID ID,
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// addresses. We can treat it like a normal dbg_value intrinsic here; to
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// benefit from the full analysis of stack/SSA locations, GlobalISel would
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// need to register for and use the AssignmentTrackingAnalysis pass.
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LLVM_FALLTHROUGH;
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[[fallthrough]];
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case Intrinsic::dbg_value: {
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// This form of DBG_VALUE is target-independent.
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const DbgValueInst &DI = cast<DbgValueInst>(CI);
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@ -1424,7 +1424,7 @@ bool FastISel::selectIntrinsicCall(const IntrinsicInst *II) {
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// happened (such as an optimised function being always-inlined into an
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// optnone function). We will not be using the extra information in the
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// dbg.assign in that case, just use its dbg.value fields.
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LLVM_FALLTHROUGH;
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[[fallthrough]];
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case Intrinsic::dbg_value: {
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// This form of DBG_VALUE is target-independent.
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const DbgValueInst *DI = cast<DbgValueInst>(II);
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@ -3195,7 +3195,7 @@ bool SelectionDAGLegalize::ExpandNode(SDNode *Node) {
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break;
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}
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LLVM_FALLTHROUGH;
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[[fallthrough]];
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}
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case ISD::BITCAST:
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if ((Tmp1 = EmitStackConvert(Node->getOperand(0), Node->getValueType(0),
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@ -538,7 +538,7 @@ p_ere_exp(struct parse *p)
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break;
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case '{': /* okay as ordinary except if digit follows */
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REQUIRE(!MORE() || !isdigit((uch)PEEK()), REG_BADRPT);
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LLVM_FALLTHROUGH;
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[[fallthrough]];
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default:
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ordinary(p, c);
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break;
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@ -734,7 +734,7 @@ p_simp_re(struct parse *p,
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break;
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case '*':
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REQUIRE(starordinary, REG_BADRPT);
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LLVM_FALLTHROUGH;
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[[fallthrough]];
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default:
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ordinary(p, (char)c);
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break;
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@ -1634,7 +1634,7 @@ findmust(struct parse *p, struct re_guts *g)
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return;
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}
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} while (OP(s) != O_QUEST && OP(s) != O_CH);
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LLVM_FALLTHROUGH;
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[[fallthrough]];
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default: /* things that break a sequence */
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if (newlen > g->mlen) { /* ends one */
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start = newstart;
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@ -1296,7 +1296,7 @@ static MachineBasicBlock::iterator InsertSEH(MachineBasicBlock::iterator MBBI,
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}
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case AArch64::LDPQpost:
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Imm = -Imm;
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LLVM_FALLTHROUGH;
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[[fallthrough]];
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case AArch64::STPQpre: {
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unsigned Reg0 = RegInfo->getSEHRegNum(MBBI->getOperand(1).getReg());
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unsigned Reg1 = RegInfo->getSEHRegNum(MBBI->getOperand(2).getReg());
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@ -2261,7 +2261,7 @@ void AMDGPURegisterBankInfo::applyMappingImpl(
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case AMDGPU::G_FCMP:
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if (!Subtarget.hasSALUFloatInsts())
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break;
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LLVM_FALLTHROUGH;
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[[fallthrough]];
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case AMDGPU::G_ICMP:
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case AMDGPU::G_UADDO:
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case AMDGPU::G_USUBO:
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@ -11104,7 +11104,7 @@ ARMAsmParser::checkEarlyTargetMatchPredicate(MCInst &Inst,
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return Match_MnemonicFail;
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}
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}
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LLVM_FALLTHROUGH;
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[[fallthrough]];
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default:
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return Match_Success;
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}
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@ -9631,7 +9631,7 @@ SDValue SystemZTargetLowering::lowerVECREDUCE_ADD(SDValue Op,
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case 8:
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case 16:
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Op = DAG.getNode(SystemZISD::VSUM, DL, MVT::v4i32, Op, Zero);
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LLVM_FALLTHROUGH;
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[[fallthrough]];
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case 32:
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case 64:
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Op = DAG.getNode(SystemZISD::VSUM, DL, MVT::i128, Op,
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@ -97,7 +97,7 @@ static ParameterKind getParameterKind(const Record *R) {
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if (R->getValueAsInt("isHalfOrFloat") || R->getValueAsInt("isI16OrI32")) {
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return ParameterKind::Overload;
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}
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LLVM_FALLTHROUGH;
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[[fallthrough]];
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default:
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llvm_unreachable("Support for specified DXIL Type not yet implemented");
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}
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@ -272,7 +272,7 @@ static std::string getOverloadKindStr(const Record *R) {
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return "OverloadKind::I16 | OverloadKind::I32";
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}
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}
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LLVM_FALLTHROUGH;
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[[fallthrough]];
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default:
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llvm_unreachable(
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"Support for specified parameter OverloadKind not yet implemented");
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