LLVM_FALLTHROUGH => [[fallthrough]]. NFC

This commit is contained in:
Fangrui Song 2024-04-25 17:50:59 -07:00
parent 593f6fdcb4
commit 5a12f2867a
12 changed files with 17 additions and 17 deletions

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@ -253,7 +253,7 @@ void getSignature(const CodeCompletionString &CCS, std::string *Signature,
if (!IncludeFunctionArguments &&
ResultKind == CodeCompletionResult::RK_Declaration)
TruncateSnippetAt.emplace(Snippet->size());
LLVM_FALLTHROUGH;
[[fallthrough]];
case CodeCompletionString::CK_RightParen:
case CodeCompletionString::CK_LeftBracket:
case CodeCompletionString::CK_RightBracket:

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@ -1869,15 +1869,15 @@ AppleObjCRuntimeV2::DynamicClassInfoExtractor::ComputeHelper(
if (loader->IsFullyInitialized()) {
switch (exe_ctx.GetTargetRef().GetDynamicClassInfoHelper()) {
case eDynamicClassInfoHelperAuto:
LLVM_FALLTHROUGH;
[[fallthrough]];
case eDynamicClassInfoHelperGetRealizedClassList:
if (m_runtime.m_has_objc_getRealizedClassList_trylock)
return DynamicClassInfoExtractor::objc_getRealizedClassList_trylock;
LLVM_FALLTHROUGH;
[[fallthrough]];
case eDynamicClassInfoHelperCopyRealizedClassList:
if (m_runtime.m_has_objc_copyRealizedClassList)
return DynamicClassInfoExtractor::objc_copyRealizedClassList;
LLVM_FALLTHROUGH;
[[fallthrough]];
case eDynamicClassInfoHelperRealizedClassesStruct:
return DynamicClassInfoExtractor::gdb_objc_realized_classes;
}

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@ -76,7 +76,7 @@ void GenericConvergenceVerifier<ContextT>::visit(const InstructionT &I) {
"Entry intrinsic cannot be preceded by a convergent operation in the "
"same basic block.",
{Context.print(&I)});
LLVM_FALLTHROUGH;
[[fallthrough]];
case CONV_ANCHOR:
Check(!TokenDef,
"Entry or anchor intrinsic cannot have a convergencectrl token "

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@ -2223,7 +2223,7 @@ bool IRTranslator::translateKnownIntrinsic(const CallInst &CI, Intrinsic::ID ID,
// addresses. We can treat it like a normal dbg_value intrinsic here; to
// benefit from the full analysis of stack/SSA locations, GlobalISel would
// need to register for and use the AssignmentTrackingAnalysis pass.
LLVM_FALLTHROUGH;
[[fallthrough]];
case Intrinsic::dbg_value: {
// This form of DBG_VALUE is target-independent.
const DbgValueInst &DI = cast<DbgValueInst>(CI);

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@ -1424,7 +1424,7 @@ bool FastISel::selectIntrinsicCall(const IntrinsicInst *II) {
// happened (such as an optimised function being always-inlined into an
// optnone function). We will not be using the extra information in the
// dbg.assign in that case, just use its dbg.value fields.
LLVM_FALLTHROUGH;
[[fallthrough]];
case Intrinsic::dbg_value: {
// This form of DBG_VALUE is target-independent.
const DbgValueInst *DI = cast<DbgValueInst>(II);

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@ -3195,7 +3195,7 @@ bool SelectionDAGLegalize::ExpandNode(SDNode *Node) {
break;
}
LLVM_FALLTHROUGH;
[[fallthrough]];
}
case ISD::BITCAST:
if ((Tmp1 = EmitStackConvert(Node->getOperand(0), Node->getValueType(0),

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@ -538,7 +538,7 @@ p_ere_exp(struct parse *p)
break;
case '{': /* okay as ordinary except if digit follows */
REQUIRE(!MORE() || !isdigit((uch)PEEK()), REG_BADRPT);
LLVM_FALLTHROUGH;
[[fallthrough]];
default:
ordinary(p, c);
break;
@ -734,7 +734,7 @@ p_simp_re(struct parse *p,
break;
case '*':
REQUIRE(starordinary, REG_BADRPT);
LLVM_FALLTHROUGH;
[[fallthrough]];
default:
ordinary(p, (char)c);
break;
@ -1634,7 +1634,7 @@ findmust(struct parse *p, struct re_guts *g)
return;
}
} while (OP(s) != O_QUEST && OP(s) != O_CH);
LLVM_FALLTHROUGH;
[[fallthrough]];
default: /* things that break a sequence */
if (newlen > g->mlen) { /* ends one */
start = newstart;

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@ -1296,7 +1296,7 @@ static MachineBasicBlock::iterator InsertSEH(MachineBasicBlock::iterator MBBI,
}
case AArch64::LDPQpost:
Imm = -Imm;
LLVM_FALLTHROUGH;
[[fallthrough]];
case AArch64::STPQpre: {
unsigned Reg0 = RegInfo->getSEHRegNum(MBBI->getOperand(1).getReg());
unsigned Reg1 = RegInfo->getSEHRegNum(MBBI->getOperand(2).getReg());

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@ -2261,7 +2261,7 @@ void AMDGPURegisterBankInfo::applyMappingImpl(
case AMDGPU::G_FCMP:
if (!Subtarget.hasSALUFloatInsts())
break;
LLVM_FALLTHROUGH;
[[fallthrough]];
case AMDGPU::G_ICMP:
case AMDGPU::G_UADDO:
case AMDGPU::G_USUBO:

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@ -11104,7 +11104,7 @@ ARMAsmParser::checkEarlyTargetMatchPredicate(MCInst &Inst,
return Match_MnemonicFail;
}
}
LLVM_FALLTHROUGH;
[[fallthrough]];
default:
return Match_Success;
}

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@ -9631,7 +9631,7 @@ SDValue SystemZTargetLowering::lowerVECREDUCE_ADD(SDValue Op,
case 8:
case 16:
Op = DAG.getNode(SystemZISD::VSUM, DL, MVT::v4i32, Op, Zero);
LLVM_FALLTHROUGH;
[[fallthrough]];
case 32:
case 64:
Op = DAG.getNode(SystemZISD::VSUM, DL, MVT::i128, Op,

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@ -97,7 +97,7 @@ static ParameterKind getParameterKind(const Record *R) {
if (R->getValueAsInt("isHalfOrFloat") || R->getValueAsInt("isI16OrI32")) {
return ParameterKind::Overload;
}
LLVM_FALLTHROUGH;
[[fallthrough]];
default:
llvm_unreachable("Support for specified DXIL Type not yet implemented");
}
@ -272,7 +272,7 @@ static std::string getOverloadKindStr(const Record *R) {
return "OverloadKind::I16 | OverloadKind::I32";
}
}
LLVM_FALLTHROUGH;
[[fallthrough]];
default:
llvm_unreachable(
"Support for specified parameter OverloadKind not yet implemented");