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[SDAG] Remove most non-canonical libcall handing (#171288)

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This is a followup to https://github.com/llvm/llvm-project/pull/171114,
removing the handling for most libcalls that are already canonicalized
to intrinsics in the middle-end. The only remaining one is fabs, which
has more test coverage than the others.
This commit is contained in:
Nikita Popov 2025-12-10 11:45:26 +01:00 committed by GitHub
parent 036aed099e
commit 5a24dfa339
No known key found for this signature in database
GPG Key ID: B5690EEEBB952194
22 changed files with 343 additions and 610 deletions
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63
llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
View File

@ -9590,34 +9590,6 @@ void SelectionDAGBuilder::visitCall(const CallInst &I) {
if (visitUnaryFloatCall(I, ISD::FABS))
return;
break;
case LibFunc_fmin:
case LibFunc_fminf:
case LibFunc_fminl:
// TODO: Remove this, already canonicalized by the middle-end.
if (visitBinaryFloatCall(I, ISD::FMINNUM))
return;
break;
case LibFunc_fmax:
case LibFunc_fmaxf:
case LibFunc_fmaxl:
// TODO: Remove this, already canonicalized by the middle-end.
if (visitBinaryFloatCall(I, ISD::FMAXNUM))
return;
break;
case LibFunc_fminimum_num:
case LibFunc_fminimum_numf:
case LibFunc_fminimum_numl:
// TODO: Remove this, already canonicalized by the middle-end.
if (visitBinaryFloatCall(I, ISD::FMINIMUMNUM))
return;
break;
case LibFunc_fmaximum_num:
case LibFunc_fmaximum_numf:
case LibFunc_fmaximum_numl:
// TODO: Remove this, already canonicalized by the middle-end.
if (visitBinaryFloatCall(I, ISD::FMAXIMUMNUM))
return;
break;
case LibFunc_sin:
case LibFunc_sinf:
case LibFunc_sinl:
@ -9687,41 +9659,6 @@ void SelectionDAGBuilder::visitCall(const CallInst &I) {
if (visitUnaryFloatCall(I, ISD::FSQRT))
return;
break;
case LibFunc_floor:
case LibFunc_floorf:
case LibFunc_floorl:
// TODO: Remove this, already canonicalized by the middle-end.
if (visitUnaryFloatCall(I, ISD::FFLOOR))
return;
break;
case LibFunc_ceil:
case LibFunc_ceilf:
case LibFunc_ceill:
// TODO: Remove this, already canonicalized by the middle-end.
if (visitUnaryFloatCall(I, ISD::FCEIL))
return;
break;
case LibFunc_rint:
case LibFunc_rintf:
case LibFunc_rintl:
// TODO: Remove this, already canonicalized by the middle-end.
if (visitUnaryFloatCall(I, ISD::FRINT))
return;
break;
case LibFunc_round:
case LibFunc_roundf:
case LibFunc_roundl:
// TODO: Remove this, already canonicalized by the middle-end.
if (visitUnaryFloatCall(I, ISD::FROUND))
return;
break;
case LibFunc_trunc:
case LibFunc_truncf:
case LibFunc_truncl:
// TODO: Remove this, already canonicalized by the middle-end.
if (visitUnaryFloatCall(I, ISD::FTRUNC))
return;
break;
case LibFunc_log2:
case LibFunc_log2f:
case LibFunc_log2l:

56
llvm/test/CodeGen/AArch64/arm64-rounding.ll
View File

@ -5,23 +5,19 @@
; CHECK-NOT: frintx
define float @test1(float %a) #0 {
entry:
%call = tail call float @floorf(float %a) nounwind readnone
%call = tail call float @llvm.floor.f32(float %a) nounwind readnone
ret float %call
}
declare float @floorf(float) nounwind readnone
; CHECK-LABEL: test2:
; CHECK: frintm
; CHECK-NOT: frintx
define double @test2(double %a) #0 {
entry:
%call = tail call double @floor(double %a) nounwind readnone
%call = tail call double @llvm.floor.f64(double %a) nounwind readnone
ret double %call
}
declare double @floor(double) nounwind readnone
; CHECK-LABEL: test3:
; CHECK: frinti
define float @test3(float %a) #0 {
@ -43,93 +39,77 @@ entry:
; CHECK-NOT: frintx
define float @test5(float %a) #0 {
entry:
%call = tail call float @ceilf(float %a) nounwind readnone
%call = tail call float @llvm.ceil.f32(float %a) nounwind readnone
ret float %call
}
declare float @ceilf(float) nounwind readnone
; CHECK-LABEL: test6:
; CHECK: frintp
; CHECK-NOT: frintx
define double @test6(double %a) #0 {
entry:
%call = tail call double @ceil(double %a) nounwind readnone
%call = tail call double @llvm.ceil.f64(double %a) nounwind readnone
ret double %call
}
declare double @ceil(double) nounwind readnone
; CHECK-LABEL: test7:
; CHECK: frintx
define float @test7(float %a) #0 {
entry:
%call = tail call float @rintf(float %a) nounwind readnone
%call = tail call float @llvm.rint.f32(float %a) nounwind readnone
ret float %call
}
declare float @rintf(float) nounwind readnone
; CHECK-LABEL: test8:
; CHECK: frintx
define double @test8(double %a) #0 {
entry:
%call = tail call double @rint(double %a) nounwind readnone
%call = tail call double @llvm.rint.f64(double %a) nounwind readnone
ret double %call
}
declare double @rint(double) nounwind readnone
; CHECK-LABEL: test9:
; CHECK: frintz
; CHECK-NOT: frintx
define float @test9(float %a) #0 {
entry:
%call = tail call float @truncf(float %a) nounwind readnone
%call = tail call float @llvm.trunc.f32(float %a) nounwind readnone
ret float %call
}
declare float @truncf(float) nounwind readnone
; CHECK-LABEL: test10:
; CHECK: frintz
; CHECK-NOT: frintx
define double @test10(double %a) #0 {
entry:
%call = tail call double @trunc(double %a) nounwind readnone
%call = tail call double @llvm.trunc.f64(double %a) nounwind readnone
ret double %call
}
declare double @trunc(double) nounwind readnone
; CHECK-LABEL: test11:
; CHECK: frinta
; CHECK-NOT: frintx
define float @test11(float %a) #0 {
entry:
%call = tail call float @roundf(float %a) nounwind readnone
%call = tail call float @llvm.round.f32(float %a) nounwind readnone
ret float %call
}
declare float @roundf(float %a) nounwind readnone
; CHECK-LABEL: test12:
; CHECK: frinta
; CHECK-NOT: frintx
define double @test12(double %a) #0 {
entry:
%call = tail call double @round(double %a) nounwind readnone
%call = tail call double @llvm.round.f64(double %a) nounwind readnone
ret double %call
}
declare double @round(double %a) nounwind readnone
; CHECK-LABEL: test13:
; CHECK-NOT: frintx
; CHECK: frintm
define float @test13(float %a) #1 {
entry:
%call = tail call float @floorf(float %a) nounwind readnone
%call = tail call float @llvm.floor.f32(float %a) nounwind readnone
ret float %call
}
@ -138,7 +118,7 @@ entry:
; CHECK: frintm
define double @test14(double %a) #1 {
entry:
%call = tail call double @floor(double %a) nounwind readnone
%call = tail call double @llvm.floor.f64(double %a) nounwind readnone
ret double %call
}
@ -147,7 +127,7 @@ entry:
; CHECK: frintp
define float @test15(float %a) #1 {
entry:
%call = tail call float @ceilf(float %a) nounwind readnone
%call = tail call float @llvm.ceil.f32(float %a) nounwind readnone
ret float %call
}
@ -156,7 +136,7 @@ entry:
; CHECK: frintp
define double @test16(double %a) #1 {
entry:
%call = tail call double @ceil(double %a) nounwind readnone
%call = tail call double @llvm.ceil.f64(double %a) nounwind readnone
ret double %call
}
@ -165,7 +145,7 @@ entry:
; CHECK: frintz
define float @test17(float %a) #1 {
entry:
%call = tail call float @truncf(float %a) nounwind readnone
%call = tail call float @llvm.trunc.f32(float %a) nounwind readnone
ret float %call
}
@ -174,7 +154,7 @@ entry:
; CHECK: frintz
define double @test18(double %a) #1 {
entry:
%call = tail call double @trunc(double %a) nounwind readnone
%call = tail call double @llvm.trunc.f64(double %a) nounwind readnone
ret double %call
}
@ -183,7 +163,7 @@ entry:
; CHECK: frinta
define float @test19(float %a) #1 {
entry:
%call = tail call float @roundf(float %a) nounwind readnone
%call = tail call float @llvm.round.f32(float %a) nounwind readnone
ret float %call
}
@ -192,7 +172,7 @@ entry:
; CHECK: frinta
define double @test20(double %a) #1 {
entry:
%call = tail call double @round(double %a) nounwind readnone
%call = tail call double @llvm.round.f64(double %a) nounwind readnone
ret double %call
}

28
llvm/test/CodeGen/AArch64/floatdp_1source.ll
View File

@ -7,18 +7,6 @@ declare double @fabs(double) readonly
declare float @llvm.sqrt.f32(float %Val)
declare double @llvm.sqrt.f64(double %Val)
declare float @ceilf(float) readonly
declare double @ceil(double) readonly
declare float @floorf(float) readonly
declare double @floor(double) readonly
declare float @truncf(float) readonly
declare double @trunc(double) readonly
declare float @rintf(float) readonly
declare double @rint(double) readonly
define float @fabs_f(float %v) {
; CHECK-LABEL: fabs_f:
; CHECK: ; %bb.0:
@ -51,7 +39,7 @@ define float @ceil_f(float %v) {
; CHECK: ; %bb.0:
; CHECK-NEXT: frintp s0, s0
; CHECK-NEXT: ret
%r = call float @ceilf(float %v)
%r = call float @llvm.ceil.f32(float %v)
ret float %r
}
@ -60,7 +48,7 @@ define float @floor_f(float %v) {
; CHECK: ; %bb.0:
; CHECK-NEXT: frintm s0, s0
; CHECK-NEXT: ret
%r = call float @floorf(float %v)
%r = call float @llvm.floor.f32(float %v)
ret float %r
}
@ -69,7 +57,7 @@ define float @trunc_f(float %v) {
; CHECK: ; %bb.0:
; CHECK-NEXT: frintz s0, s0
; CHECK-NEXT: ret
%r = call float @truncf(float %v)
%r = call float @llvm.trunc.f32(float %v)
ret float %r
}
@ -78,7 +66,7 @@ define float @rint_f(float %v) {
; CHECK: ; %bb.0:
; CHECK-NEXT: frintx s0, s0
; CHECK-NEXT: ret
%r = call float @rintf(float %v)
%r = call float @llvm.rint.f32(float %v)
ret float %r
}
@ -123,7 +111,7 @@ define double @ceil_d(double %v) {
; CHECK: ; %bb.0:
; CHECK-NEXT: frintp d0, d0
; CHECK-NEXT: ret
%r = call double @ceil(double %v)
%r = call double @llvm.ceil.f64(double %v)
ret double %r
}
@ -132,7 +120,7 @@ define double @floor_d(double %v) {
; CHECK: ; %bb.0:
; CHECK-NEXT: frintm d0, d0
; CHECK-NEXT: ret
%r = call double @floor(double %v)
%r = call double @llvm.floor.f64(double %v)
ret double %r
}
@ -141,7 +129,7 @@ define double @trunc_d(double %v) {
; CHECK: ; %bb.0:
; CHECK-NEXT: frintz d0, d0
; CHECK-NEXT: ret
%r = call double @trunc(double %v)
%r = call double @llvm.trunc.f64(double %v)
ret double %r
}
@ -150,7 +138,7 @@ define double @rint_d(double %v) {
; CHECK: ; %bb.0:
; CHECK-NEXT: frintx d0, d0
; CHECK-NEXT: ret
%r = call double @rint(double %v)
%r = call double @llvm.rint.f64(double %v)
ret double %r
}

73
llvm/test/CodeGen/AArch64/round-conv.ll
View File

@ -5,7 +5,7 @@
; CHECK-NOT: frintx {{s[0-9]+}}, s0
define i32 @testmsws(float %a) {
entry:
%call = call float @floorf(float %a) nounwind readnone
%call = call float @llvm.floor.f32(float %a) nounwind readnone
%conv = fptosi float %call to i32
ret i32 %conv
}
@ -15,7 +15,7 @@ entry:
; CHECK-NOT: frintx {{s[0-9]+}}, s0
define i64 @testmsxs(float %a) {
entry:
%call = call float @floorf(float %a) nounwind readnone
%call = call float @llvm.floor.f32(float %a) nounwind readnone
%conv = fptosi float %call to i64
ret i64 %conv
}
@ -25,7 +25,7 @@ entry:
; CHECK-NOT: frintx {{d[0-9]+}}, d0
define i32 @testmswd(double %a) {
entry:
%call = call double @floor(double %a) nounwind readnone
%call = call double @llvm.floor.f64(double %a) nounwind readnone
%conv = fptosi double %call to i32
ret i32 %conv
}
@ -35,7 +35,7 @@ entry:
; CHECK-NOT: frintx {{d[0-9]+}}, d0
define i64 @testmsxd(double %a) {
entry:
%call = call double @floor(double %a) nounwind readnone
%call = call double @llvm.floor.f64(double %a) nounwind readnone
%conv = fptosi double %call to i64
ret i64 %conv
}
@ -45,7 +45,7 @@ entry:
; CHECK-NOT: frintx {{s[0-9]+}}, s0
define i32 @testmuws(float %a) {
entry:
%call = call float @floorf(float %a) nounwind readnone
%call = call float @llvm.floor.f32(float %a) nounwind readnone
%conv = fptoui float %call to i32
ret i32 %conv
}
@ -55,7 +55,7 @@ entry:
; CHECK-NOT: frintx {{s[0-9]+}}, s0
define i64 @testmuxs(float %a) {
entry:
%call = call float @floorf(float %a) nounwind readnone
%call = call float @llvm.floor.f32(float %a) nounwind readnone
%conv = fptoui float %call to i64
ret i64 %conv
}
@ -65,7 +65,7 @@ entry:
; CHECK-NOT: frintx {{d[0-9]+}}, d0
define i32 @testmuwd(double %a) {
entry:
%call = call double @floor(double %a) nounwind readnone
%call = call double @llvm.floor.f64(double %a) nounwind readnone
%conv = fptoui double %call to i32
ret i32 %conv
}
@ -75,7 +75,7 @@ entry:
; CHECK-NOT: frintx {{d[0-9]+}}, d0
define i64 @testmuxd(double %a) {
entry:
%call = call double @floor(double %a) nounwind readnone
%call = call double @llvm.floor.f64(double %a) nounwind readnone
%conv = fptoui double %call to i64
ret i64 %conv
}
@ -85,7 +85,7 @@ entry:
; CHECK-NOT: frintx {{s[0-9]+}}, s0
define i32 @testpsws(float %a) {
entry:
%call = call float @ceilf(float %a) nounwind readnone
%call = call float @llvm.ceil.f32(float %a) nounwind readnone
%conv = fptosi float %call to i32
ret i32 %conv
}
@ -95,7 +95,7 @@ entry:
; CHECK-NOT: frintx {{s[0-9]+}}, s0
define i64 @testpsxs(float %a) {
entry:
%call = call float @ceilf(float %a) nounwind readnone
%call = call float @llvm.ceil.f32(float %a) nounwind readnone
%conv = fptosi float %call to i64
ret i64 %conv
}
@ -105,7 +105,7 @@ entry:
; CHECK-NOT: frintx {{d[0-9]+}}, d0
define i32 @testpswd(double %a) {
entry:
%call = call double @ceil(double %a) nounwind readnone
%call = call double @llvm.ceil.f64(double %a) nounwind readnone
%conv = fptosi double %call to i32
ret i32 %conv
}
@ -115,7 +115,7 @@ entry:
; CHECK-NOT: frintx {{d[0-9]+}}, d0
define i64 @testpsxd(double %a) {
entry:
%call = call double @ceil(double %a) nounwind readnone
%call = call double @llvm.ceil.f64(double %a) nounwind readnone
%conv = fptosi double %call to i64
ret i64 %conv
}
@ -125,7 +125,7 @@ entry:
; CHECK-NOT: frintx {{s[0-9]+}}, s0
define i32 @testpuws(float %a) {
entry:
%call = call float @ceilf(float %a) nounwind readnone
%call = call float @llvm.ceil.f32(float %a) nounwind readnone
%conv = fptoui float %call to i32
ret i32 %conv
}
@ -135,7 +135,7 @@ entry:
; CHECK-NOT: frintx {{s[0-9]+}}, s0
define i64 @testpuxs(float %a) {
entry:
%call = call float @ceilf(float %a) nounwind readnone
%call = call float @llvm.ceil.f32(float %a) nounwind readnone
%conv = fptoui float %call to i64
ret i64 %conv
}
@ -145,7 +145,7 @@ entry:
; CHECK-NOT: frintx {{d[0-9]+}}, d0
define i32 @testpuwd(double %a) {
entry:
%call = call double @ceil(double %a) nounwind readnone
%call = call double @llvm.ceil.f64(double %a) nounwind readnone
%conv = fptoui double %call to i32
ret i32 %conv
}
@ -155,7 +155,7 @@ entry:
; CHECK-NOT: frintx {{d[0-9]+}}, d0
define i64 @testpuxd(double %a) {
entry:
%call = call double @ceil(double %a) nounwind readnone
%call = call double @llvm.ceil.f64(double %a) nounwind readnone
%conv = fptoui double %call to i64
ret i64 %conv
}
@ -165,7 +165,7 @@ entry:
; CHECK-NOT: frintx {{s[0-9]+}}, s0
define i32 @testzsws(float %a) {
entry:
%call = call float @truncf(float %a) nounwind readnone
%call = call float @llvm.trunc.f32(float %a) nounwind readnone
%conv = fptosi float %call to i32
ret i32 %conv
}
@ -175,7 +175,7 @@ entry:
; CHECK-NOT: frintx {{s[0-9]+}}, s0
define i64 @testzsxs(float %a) {
entry:
%call = call float @truncf(float %a) nounwind readnone
%call = call float @llvm.trunc.f32(float %a) nounwind readnone
%conv = fptosi float %call to i64
ret i64 %conv
}
@ -185,7 +185,7 @@ entry:
; CHECK-NOT: frintx {{d[0-9]+}}, d0
define i32 @testzswd(double %a) {
entry:
%call = call double @trunc(double %a) nounwind readnone
%call = call double @llvm.trunc.f64(double %a) nounwind readnone
%conv = fptosi double %call to i32
ret i32 %conv
}
@ -195,7 +195,7 @@ entry:
; CHECK-NOT: frintx {{d[0-9]+}}, d0
define i64 @testzsxd(double %a) {
entry:
%call = call double @trunc(double %a) nounwind readnone
%call = call double @llvm.trunc.f64(double %a) nounwind readnone
%conv = fptosi double %call to i64
ret i64 %conv
}
@ -205,7 +205,7 @@ entry:
; CHECK-NOT: frintx {{s[0-9]+}}, s0
define i32 @testzuws(float %a) {
entry:
%call = call float @truncf(float %a) nounwind readnone
%call = call float @llvm.trunc.f32(float %a) nounwind readnone
%conv = fptoui float %call to i32
ret i32 %conv
}
@ -215,7 +215,7 @@ entry:
; CHECK-NOT: frintx {{s[0-9]+}}, s0
define i64 @testzuxs(float %a) {
entry:
%call = call float @truncf(float %a) nounwind readnone
%call = call float @llvm.trunc.f32(float %a) nounwind readnone
%conv = fptoui float %call to i64
ret i64 %conv
}
@ -225,7 +225,7 @@ entry:
; CHECK-NOT: frintx {{d[0-9]+}}, d0
define i32 @testzuwd(double %a) {
entry:
%call = call double @trunc(double %a) nounwind readnone
%call = call double @llvm.trunc.f64(double %a) nounwind readnone
%conv = fptoui double %call to i32
ret i32 %conv
}
@ -235,7 +235,7 @@ entry:
; CHECK-NOT: frintx {{d[0-9]+}}, d0
define i64 @testzuxd(double %a) {
entry:
%call = call double @trunc(double %a) nounwind readnone
%call = call double @llvm.trunc.f64(double %a) nounwind readnone
%conv = fptoui double %call to i64
ret i64 %conv
}
@ -245,7 +245,7 @@ entry:
; CHECK-NOT: frintx {{s[0-9]+}}, s0
define i32 @testasws(float %a) {
entry:
%call = call float @roundf(float %a) nounwind readnone
%call = call float @llvm.round.f32(float %a) nounwind readnone
%conv = fptosi float %call to i32
ret i32 %conv
}
@ -255,7 +255,7 @@ entry:
; CHECK-NOT: frintx {{s[0-9]+}}, s0
define i64 @testasxs(float %a) {
entry:
%call = call float @roundf(float %a) nounwind readnone
%call = call float @llvm.round.f32(float %a) nounwind readnone
%conv = fptosi float %call to i64
ret i64 %conv
}
@ -265,7 +265,7 @@ entry:
; CHECK-NOT: frintx {{d[0-9]+}}, d0
define i32 @testaswd(double %a) {
entry:
%call = call double @round(double %a) nounwind readnone
%call = call double @llvm.round.f64(double %a) nounwind readnone
%conv = fptosi double %call to i32
ret i32 %conv
}
@ -275,7 +275,7 @@ entry:
; CHECK-NOT: frintx {{d[0-9]+}}, d0
define i64 @testasxd(double %a) {
entry:
%call = call double @round(double %a) nounwind readnone
%call = call double @llvm.round.f64(double %a) nounwind readnone
%conv = fptosi double %call to i64
ret i64 %conv
}
@ -285,7 +285,7 @@ entry:
; CHECK-NOT: frintx {{s[0-9]+}}, s0
define i32 @testauws(float %a) {
entry:
%call = call float @roundf(float %a) nounwind readnone
%call = call float @llvm.round.f32(float %a) nounwind readnone
%conv = fptoui float %call to i32
ret i32 %conv
}
@ -295,7 +295,7 @@ entry:
; CHECK-NOT: frintx {{s[0-9]+}}, s0
define i64 @testauxs(float %a) {
entry:
%call = call float @roundf(float %a) nounwind readnone
%call = call float @llvm.round.f32(float %a) nounwind readnone
%conv = fptoui float %call to i64
ret i64 %conv
}
@ -305,7 +305,7 @@ entry:
; CHECK-NOT: frintx {{d[0-9]+}}, d0
define i32 @testauwd(double %a) {
entry:
%call = call double @round(double %a) nounwind readnone
%call = call double @llvm.round.f64(double %a) nounwind readnone
%conv = fptoui double %call to i32
ret i32 %conv
}
@ -315,16 +315,7 @@ entry:
; CHECK-NOT: frintx {{d[0-9]+}}, d0
define i64 @testauxd(double %a) {
entry:
%call = call double @round(double %a) nounwind readnone
%call = call double @llvm.round.f64(double %a) nounwind readnone
%conv = fptoui double %call to i64
ret i64 %conv
}
declare float @floorf(float) nounwind readnone
declare double @floor(double) nounwind readnone
declare float @ceilf(float) nounwind readnone
declare double @ceil(double) nounwind readnone
declare float @truncf(float) nounwind readnone
declare double @trunc(double) nounwind readnone
declare float @roundf(float) nounwind readnone
declare double @round(double) nounwind readnone

48
llvm/test/CodeGen/AArch64/round-fptosi-sat-scalar.ll
View File

@ -94,7 +94,7 @@ define i32 @testmsws(float %a) {
; CHECK-NEXT: fcvtms w0, s0
; CHECK-NEXT: ret
entry:
%r = call float @floorf(float %a) nounwind readnone
%r = call float @llvm.floor.f32(float %a) nounwind readnone
%i = call i32 @llvm.fptosi.sat.i32.f32(float %r)
ret i32 %i
}
@ -105,7 +105,7 @@ define i64 @testmsxs(float %a) {
; CHECK-NEXT: fcvtms x0, s0
; CHECK-NEXT: ret
entry:
%r = call float @floorf(float %a) nounwind readnone
%r = call float @llvm.floor.f32(float %a) nounwind readnone
%i = call i64 @llvm.fptosi.sat.i64.f32(float %r)
ret i64 %i
}
@ -116,7 +116,7 @@ define i32 @testmswd(double %a) {
; CHECK-NEXT: fcvtms w0, d0
; CHECK-NEXT: ret
entry:
%r = call double @floor(double %a) nounwind readnone
%r = call double @llvm.floor.f64(double %a) nounwind readnone
%i = call i32 @llvm.fptosi.sat.i32.f64(double %r)
ret i32 %i
}
@ -127,7 +127,7 @@ define i64 @testmsxd(double %a) {
; CHECK-NEXT: fcvtms x0, d0
; CHECK-NEXT: ret
entry:
%r = call double @floor(double %a) nounwind readnone
%r = call double @llvm.floor.f64(double %a) nounwind readnone
%i = call i64 @llvm.fptosi.sat.i64.f64(double %r)
ret i64 %i
}
@ -224,7 +224,7 @@ define i32 @testpsws(float %a) {
; CHECK-NEXT: fcvtps w0, s0
; CHECK-NEXT: ret
entry:
%r = call float @ceilf(float %a) nounwind readnone
%r = call float @llvm.ceil.f32(float %a) nounwind readnone
%i = call i32 @llvm.fptosi.sat.i32.f32(float %r)
ret i32 %i
}
@ -235,7 +235,7 @@ define i64 @testpsxs(float %a) {
; CHECK-NEXT: fcvtps x0, s0
; CHECK-NEXT: ret
entry:
%r = call float @ceilf(float %a) nounwind readnone
%r = call float @llvm.ceil.f32(float %a) nounwind readnone
%i = call i64 @llvm.fptosi.sat.i64.f32(float %r)
ret i64 %i
}
@ -246,7 +246,7 @@ define i32 @testpswd(double %a) {
; CHECK-NEXT: fcvtps w0, d0
; CHECK-NEXT: ret
entry:
%r = call double @ceil(double %a) nounwind readnone
%r = call double @llvm.ceil.f64(double %a) nounwind readnone
%i = call i32 @llvm.fptosi.sat.i32.f64(double %r)
ret i32 %i
}
@ -257,7 +257,7 @@ define i64 @testpsxd(double %a) {
; CHECK-NEXT: fcvtps x0, d0
; CHECK-NEXT: ret
entry:
%r = call double @ceil(double %a) nounwind readnone
%r = call double @llvm.ceil.f64(double %a) nounwind readnone
%i = call i64 @llvm.fptosi.sat.i64.f64(double %r)
ret i64 %i
}
@ -310,7 +310,7 @@ define i32 @testzsws(float %a) {
; CHECK-NEXT: fcvtzs w0, s0
; CHECK-NEXT: ret
entry:
%r = call float @truncf(float %a) nounwind readnone
%r = call float @llvm.trunc.f32(float %a) nounwind readnone
%i = call i32 @llvm.fptosi.sat.i32.f32(float %r)
ret i32 %i
}
@ -321,7 +321,7 @@ define i64 @testzsxs(float %a) {
; CHECK-NEXT: fcvtzs x0, s0
; CHECK-NEXT: ret
entry:
%r = call float @truncf(float %a) nounwind readnone
%r = call float @llvm.trunc.f32(float %a) nounwind readnone
%i = call i64 @llvm.fptosi.sat.i64.f32(float %r)
ret i64 %i
}
@ -332,7 +332,7 @@ define i32 @testzswd(double %a) {
; CHECK-NEXT: fcvtzs w0, d0
; CHECK-NEXT: ret
entry:
%r = call double @trunc(double %a) nounwind readnone
%r = call double @llvm.trunc.f64(double %a) nounwind readnone
%i = call i32 @llvm.fptosi.sat.i32.f64(double %r)
ret i32 %i
}
@ -343,7 +343,7 @@ define i64 @testzsxd(double %a) {
; CHECK-NEXT: fcvtzs x0, d0
; CHECK-NEXT: ret
entry:
%r = call double @trunc(double %a) nounwind readnone
%r = call double @llvm.trunc.f64(double %a) nounwind readnone
%i = call i64 @llvm.fptosi.sat.i64.f64(double %r)
ret i64 %i
}
@ -396,7 +396,7 @@ define i32 @testasws(float %a) {
; CHECK-NEXT: fcvtas w0, s0
; CHECK-NEXT: ret
entry:
%r = call float @roundf(float %a) nounwind readnone
%r = call float @llvm.round.f32(float %a) nounwind readnone
%i = call i32 @llvm.fptosi.sat.i32.f32(float %r)
ret i32 %i
}
@ -407,7 +407,7 @@ define i64 @testasxs(float %a) {
; CHECK-NEXT: fcvtas x0, s0
; CHECK-NEXT: ret
entry:
%r = call float @roundf(float %a) nounwind readnone
%r = call float @llvm.round.f32(float %a) nounwind readnone
%i = call i64 @llvm.fptosi.sat.i64.f32(float %r)
ret i64 %i
}
@ -418,7 +418,7 @@ define i32 @testaswd(double %a) {
; CHECK-NEXT: fcvtas w0, d0
; CHECK-NEXT: ret
entry:
%r = call double @round(double %a) nounwind readnone
%r = call double @llvm.round.f64(double %a) nounwind readnone
%i = call i32 @llvm.fptosi.sat.i32.f64(double %r)
ret i32 %i
}
@ -429,7 +429,7 @@ define i64 @testasxd(double %a) {
; CHECK-NEXT: fcvtas x0, d0
; CHECK-NEXT: ret
entry:
%r = call double @round(double %a) nounwind readnone
%r = call double @llvm.round.f64(double %a) nounwind readnone
%i = call i64 @llvm.fptosi.sat.i64.f64(double %r)
ret i64 %i
}
@ -451,11 +451,11 @@ declare half @llvm.floor.f16(half) nounwind readnone
declare half @llvm.ceil.f16(half) nounwind readnone
declare half @llvm.trunc.f16(half) nounwind readnone
declare half @llvm.round.f16(half) nounwind readnone
declare float @floorf(float) nounwind readnone
declare float @ceilf(float) nounwind readnone
declare float @truncf(float) nounwind readnone
declare float @roundf(float) nounwind readnone
declare double @floor(double) nounwind readnone
declare double @ceil(double) nounwind readnone
declare double @trunc(double) nounwind readnone
declare double @round(double) nounwind readnone
declare float @llvm.floor.f32(float) nounwind readnone
declare float @llvm.ceil.f32(float) nounwind readnone
declare float @llvm.trunc.f32(float) nounwind readnone
declare float @llvm.round.f32(float) nounwind readnone
declare double @llvm.floor.f64(double) nounwind readnone
declare double @llvm.ceil.f64(double) nounwind readnone
declare double @llvm.trunc.f64(double) nounwind readnone
declare double @llvm.round.f64(double) nounwind readnone

48
llvm/test/CodeGen/AArch64/round-fptoui-sat-scalar.ll
View File

@ -50,7 +50,7 @@ define i32 @testmuws(float %a) {
; CHECK-NEXT: fcvtmu w0, s0
; CHECK-NEXT: ret
entry:
%r = call float @floorf(float %a) nounwind readnone
%r = call float @llvm.floor.f32(float %a) nounwind readnone
%i = call i32 @llvm.fptoui.sat.i32.f32(float %r)
ret i32 %i
}
@ -61,7 +61,7 @@ define i64 @testmuxs(float %a) {
; CHECK-NEXT: fcvtmu x0, s0
; CHECK-NEXT: ret
entry:
%r = call float @floorf(float %a) nounwind readnone
%r = call float @llvm.floor.f32(float %a) nounwind readnone
%i = call i64 @llvm.fptoui.sat.i64.f32(float %r)
ret i64 %i
}
@ -72,7 +72,7 @@ define i32 @testmuwd(double %a) {
; CHECK-NEXT: fcvtmu w0, d0
; CHECK-NEXT: ret
entry:
%r = call double @floor(double %a) nounwind readnone
%r = call double @llvm.floor.f64(double %a) nounwind readnone
%i = call i32 @llvm.fptoui.sat.i32.f64(double %r)
ret i32 %i
}
@ -83,7 +83,7 @@ define i64 @testmuxd(double %a) {
; CHECK-NEXT: fcvtmu x0, d0
; CHECK-NEXT: ret
entry:
%r = call double @floor(double %a) nounwind readnone
%r = call double @llvm.floor.f64(double %a) nounwind readnone
%i = call i64 @llvm.fptoui.sat.i64.f64(double %r)
ret i64 %i
}
@ -136,7 +136,7 @@ define i32 @testpuws(float %a) {
; CHECK-NEXT: fcvtpu w0, s0
; CHECK-NEXT: ret
entry:
%r = call float @ceilf(float %a) nounwind readnone
%r = call float @llvm.ceil.f32(float %a) nounwind readnone
%i = call i32 @llvm.fptoui.sat.i32.f32(float %r)
ret i32 %i
}
@ -147,7 +147,7 @@ define i64 @testpuxs(float %a) {
; CHECK-NEXT: fcvtpu x0, s0
; CHECK-NEXT: ret
entry:
%r = call float @ceilf(float %a) nounwind readnone
%r = call float @llvm.ceil.f32(float %a) nounwind readnone
%i = call i64 @llvm.fptoui.sat.i64.f32(float %r)
ret i64 %i
}
@ -158,7 +158,7 @@ define i32 @testpuwd(double %a) {
; CHECK-NEXT: fcvtpu w0, d0
; CHECK-NEXT: ret
entry:
%r = call double @ceil(double %a) nounwind readnone
%r = call double @llvm.ceil.f64(double %a) nounwind readnone
%i = call i32 @llvm.fptoui.sat.i32.f64(double %r)
ret i32 %i
}
@ -169,7 +169,7 @@ define i64 @testpuxd(double %a) {
; CHECK-NEXT: fcvtpu x0, d0
; CHECK-NEXT: ret
entry:
%r = call double @ceil(double %a) nounwind readnone
%r = call double @llvm.ceil.f64(double %a) nounwind readnone
%i = call i64 @llvm.fptoui.sat.i64.f64(double %r)
ret i64 %i
}
@ -222,7 +222,7 @@ define i32 @testzuws(float %a) {
; CHECK-NEXT: fcvtzu w0, s0
; CHECK-NEXT: ret
entry:
%r = call float @truncf(float %a) nounwind readnone
%r = call float @llvm.trunc.f32(float %a) nounwind readnone
%i = call i32 @llvm.fptoui.sat.i32.f32(float %r)
ret i32 %i
}
@ -233,7 +233,7 @@ define i64 @testzuxs(float %a) {
; CHECK-NEXT: fcvtzu x0, s0
; CHECK-NEXT: ret
entry:
%r = call float @truncf(float %a) nounwind readnone
%r = call float @llvm.trunc.f32(float %a) nounwind readnone
%i = call i64 @llvm.fptoui.sat.i64.f32(float %r)
ret i64 %i
}
@ -244,7 +244,7 @@ define i32 @testzuwd(double %a) {
; CHECK-NEXT: fcvtzu w0, d0
; CHECK-NEXT: ret
entry:
%r = call double @trunc(double %a) nounwind readnone
%r = call double @llvm.trunc.f64(double %a) nounwind readnone
%i = call i32 @llvm.fptoui.sat.i32.f64(double %r)
ret i32 %i
}
@ -255,7 +255,7 @@ define i64 @testzuxd(double %a) {
; CHECK-NEXT: fcvtzu x0, d0
; CHECK-NEXT: ret
entry:
%r = call double @trunc(double %a) nounwind readnone
%r = call double @llvm.trunc.f64(double %a) nounwind readnone
%i = call i64 @llvm.fptoui.sat.i64.f64(double %r)
ret i64 %i
}
@ -308,7 +308,7 @@ define i32 @testauws(float %a) {
; CHECK-NEXT: fcvtau w0, s0
; CHECK-NEXT: ret
entry:
%r = call float @roundf(float %a) nounwind readnone
%r = call float @llvm.round.f32(float %a) nounwind readnone
%i = call i32 @llvm.fptoui.sat.i32.f32(float %r)
ret i32 %i
}
@ -319,7 +319,7 @@ define i64 @testauxs(float %a) {
; CHECK-NEXT: fcvtau x0, s0
; CHECK-NEXT: ret
entry:
%r = call float @roundf(float %a) nounwind readnone
%r = call float @llvm.round.f32(float %a) nounwind readnone
%i = call i64 @llvm.fptoui.sat.i64.f32(float %r)
ret i64 %i
}
@ -330,7 +330,7 @@ define i32 @testauwd(double %a) {
; CHECK-NEXT: fcvtau w0, d0
; CHECK-NEXT: ret
entry:
%r = call double @round(double %a) nounwind readnone
%r = call double @llvm.round.f64(double %a) nounwind readnone
%i = call i32 @llvm.fptoui.sat.i32.f64(double %r)
ret i32 %i
}
@ -341,7 +341,7 @@ define i64 @testauxd(double %a) {
; CHECK-NEXT: fcvtau x0, d0
; CHECK-NEXT: ret
entry:
%r = call double @round(double %a) nounwind readnone
%r = call double @llvm.round.f64(double %a) nounwind readnone
%i = call i64 @llvm.fptoui.sat.i64.f64(double %r)
ret i64 %i
}
@ -357,11 +357,11 @@ declare half @llvm.floor.f16(half) nounwind readnone
declare half @llvm.ceil.f16(half) nounwind readnone
declare half @llvm.trunc.f16(half) nounwind readnone
declare half @llvm.round.f16(half) nounwind readnone
declare float @floorf(float) nounwind readnone
declare float @ceilf(float) nounwind readnone
declare float @truncf(float) nounwind readnone
declare float @roundf(float) nounwind readnone
declare double @floor(double) nounwind readnone
declare double @ceil(double) nounwind readnone
declare double @trunc(double) nounwind readnone
declare double @round(double) nounwind readnone
declare float @llvm.floor.f32(float) nounwind readnone
declare float @llvm.ceil.f32(float) nounwind readnone
declare float @llvm.trunc.f32(float) nounwind readnone
declare float @llvm.round.f32(float) nounwind readnone
declare double @llvm.floor.f64(double) nounwind readnone
declare double @llvm.ceil.f64(double) nounwind readnone
declare double @llvm.trunc.f64(double) nounwind readnone
declare double @llvm.round.f64(double) nounwind readnone

4
llvm/test/CodeGen/AMDGPU/floor.ll
View File

@ -3,12 +3,12 @@
; CHECK: FLOOR * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
define amdgpu_ps void @test(<4 x float> inreg %reg0) {
%r0 = extractelement <4 x float> %reg0, i32 0
%r1 = call float @floorf(float %r0)
%r1 = call float @llvm.floor.f32(float %r0)
%vec = insertelement <4 x float> poison, float %r1, i32 0
call void @llvm.r600.store.swizzle(<4 x float> %vec, i32 0, i32 0)
ret void
}
declare float @floorf(float) readonly
declare float @llvm.floor.f32(float) readonly
declare void @llvm.r600.store.swizzle(<4 x float>, i32, i32)

34
llvm/test/CodeGen/ARM/arm32-round-conv.ll
View File

@ -5,7 +5,7 @@
; CHECK: vcvtm.s32.f32
define i32 @test1(float %a) {
entry:
%call = call float @floorf(float %a) nounwind readnone
%call = call float @llvm.floor.f32(float %a) nounwind readnone
%conv = fptosi float %call to i32
ret i32 %conv
}
@ -14,7 +14,7 @@ entry:
; CHECK: vcvtm.u32.f32
define i32 @test2(float %a) {
entry:
%call = call float @floorf(float %a) nounwind readnone
%call = call float @llvm.floor.f32(float %a) nounwind readnone
%conv = fptoui float %call to i32
ret i32 %conv
}
@ -23,7 +23,7 @@ entry:
; CHECK: vcvtm.s32.f64
define i32 @test3(double %a) {
entry:
%call = call double @floor(double %a) nounwind readnone
%call = call double @llvm.floor.f64(double %a) nounwind readnone
%conv = fptosi double %call to i32
ret i32 %conv
}
@ -32,7 +32,7 @@ entry:
; CHECK: vcvtm.u32.f64
define i32 @test4(double %a) {
entry:
%call = call double @floor(double %a) nounwind readnone
%call = call double @llvm.floor.f64(double %a) nounwind readnone
%conv = fptoui double %call to i32
ret i32 %conv
}
@ -41,7 +41,7 @@ entry:
; CHECK: vcvtp.s32.f32
define i32 @test5(float %a) {
entry:
%call = call float @ceilf(float %a) nounwind readnone
%call = call float @llvm.ceil.f32(float %a) nounwind readnone
%conv = fptosi float %call to i32
ret i32 %conv
}
@ -50,7 +50,7 @@ entry:
; CHECK: vcvtp.u32.f32
define i32 @test6(float %a) {
entry:
%call = call float @ceilf(float %a) nounwind readnone
%call = call float @llvm.ceil.f32(float %a) nounwind readnone
%conv = fptoui float %call to i32
ret i32 %conv
}
@ -59,7 +59,7 @@ entry:
; CHECK: vcvtp.s32.f64
define i32 @test7(double %a) {
entry:
%call = call double @ceil(double %a) nounwind readnone
%call = call double @llvm.ceil.f64(double %a) nounwind readnone
%conv = fptosi double %call to i32
ret i32 %conv
}
@ -68,7 +68,7 @@ entry:
; CHECK: vcvtp.u32.f64
define i32 @test8(double %a) {
entry:
%call = call double @ceil(double %a) nounwind readnone
%call = call double @llvm.ceil.f64(double %a) nounwind readnone
%conv = fptoui double %call to i32
ret i32 %conv
}
@ -77,7 +77,7 @@ entry:
; CHECK: vcvta.s32.f32
define i32 @test9(float %a) {
entry:
%call = call float @roundf(float %a) nounwind readnone
%call = call float @llvm.round.f32(float %a) nounwind readnone
%conv = fptosi float %call to i32
ret i32 %conv
}
@ -86,7 +86,7 @@ entry:
; CHECK: vcvta.u32.f32
define i32 @test10(float %a) {
entry:
%call = call float @roundf(float %a) nounwind readnone
%call = call float @llvm.round.f32(float %a) nounwind readnone
%conv = fptoui float %call to i32
ret i32 %conv
}
@ -95,7 +95,7 @@ entry:
; CHECK: vcvta.s32.f64
define i32 @test11(double %a) {
entry:
%call = call double @round(double %a) nounwind readnone
%call = call double @llvm.round.f64(double %a) nounwind readnone
%conv = fptosi double %call to i32
ret i32 %conv
}
@ -104,14 +104,12 @@ entry:
; CHECK: vcvta.u32.f64
define i32 @test12(double %a) {
entry:
%call = call double @round(double %a) nounwind readnone
%call = call double @llvm.round.f64(double %a) nounwind readnone
%conv = fptoui double %call to i32
ret i32 %conv
}
declare float @floorf(float) nounwind readnone
declare double @floor(double) nounwind readnone
declare float @ceilf(float) nounwind readnone
declare double @ceil(double) nounwind readnone
declare float @roundf(float) nounwind readnone
declare double @round(double) nounwind readnone
declare float @llvm.floor.f32(float) nounwind readnone
declare double @llvm.floor.f64(double) nounwind readnone
declare float @llvm.ceil.f32(float) nounwind readnone
declare double @llvm.ceil.f64(double) nounwind readnone

40
llvm/test/CodeGen/ARM/arm32-rounding.ll
View File

@ -6,7 +6,7 @@
; CHECK: vrintm.f32
define float @test1(float %a) {
entry:
%call = call float @floorf(float %a) nounwind readnone
%call = call float @llvm.floor.f32(float %a) nounwind readnone
ret float %call
}
@ -15,7 +15,7 @@ entry:
; DP: vrintm.f64
define double @test2(double %a) {
entry:
%call = call double @floor(double %a) nounwind readnone
%call = call double @llvm.floor.f64(double %a) nounwind readnone
ret double %call
}
@ -23,7 +23,7 @@ entry:
; CHECK: vrintp.f32
define float @test3(float %a) {
entry:
%call = call float @ceilf(float %a) nounwind readnone
%call = call float @llvm.ceil.f32(float %a) nounwind readnone
ret float %call
}
@ -32,7 +32,7 @@ entry:
; DP: vrintp.f64
define double @test4(double %a) {
entry:
%call = call double @ceil(double %a) nounwind readnone
%call = call double @llvm.ceil.f64(double %a) nounwind readnone
ret double %call
}
@ -40,7 +40,7 @@ entry:
; CHECK: vrinta.f32
define float @test5(float %a) {
entry:
%call = call float @roundf(float %a) nounwind readnone
%call = call float @llvm.round.f32(float %a) nounwind readnone
ret float %call
}
@ -49,7 +49,7 @@ entry:
; DP: vrinta.f64
define double @test6(double %a) {
entry:
%call = call double @round(double %a) nounwind readnone
%call = call double @llvm.round.f64(double %a) nounwind readnone
ret double %call
}
@ -57,7 +57,7 @@ entry:
; CHECK: vrintz.f32
define float @test7(float %a) {
entry:
%call = call float @truncf(float %a) nounwind readnone
%call = call float @llvm.trunc.f32(float %a) nounwind readnone
ret float %call
}
@ -66,7 +66,7 @@ entry:
; DP: vrintz.f64
define double @test8(double %a) {
entry:
%call = call double @trunc(double %a) nounwind readnone
%call = call double @llvm.trunc.f64(double %a) nounwind readnone
ret double %call
}
@ -91,7 +91,7 @@ entry:
; CHECK: vrintx.f32
define float @test11(float %a) {
entry:
%call = call float @rintf(float %a) nounwind readnone
%call = call float @llvm.rint.f32(float %a) nounwind readnone
ret float %call
}
@ -100,7 +100,7 @@ entry:
; DP: vrintx.f64
define double @test12(double %a) {
entry:
%call = call double @rint(double %a) nounwind readnone
%call = call double @llvm.rint.f64(double %a) nounwind readnone
ret double %call
}
@ -120,15 +120,15 @@ entry:
ret double %round
}
declare float @floorf(float) nounwind readnone
declare double @floor(double) nounwind readnone
declare float @ceilf(float) nounwind readnone
declare double @ceil(double) nounwind readnone
declare float @roundf(float) nounwind readnone
declare double @round(double) nounwind readnone
declare float @truncf(float) nounwind readnone
declare double @trunc(double) nounwind readnone
declare float @rintf(float) nounwind readnone
declare double @rint(double) nounwind readnone
declare float @llvm.floor.f32(float) nounwind readnone
declare double @llvm.floor.f64(double) nounwind readnone
declare float @llvm.ceil.f32(float) nounwind readnone
declare double @llvm.ceil.f64(double) nounwind readnone
declare float @llvm.round.f32(float) nounwind readnone
declare double @llvm.round.f64(double) nounwind readnone
declare float @llvm.trunc.f32(float) nounwind readnone
declare double @llvm.trunc.f64(double) nounwind readnone
declare float @llvm.rint.f32(float) nounwind readnone
declare double @llvm.rint.f64(double) nounwind readnone
declare float @llvm.roundeven.f32(float)
declare double @llvm.roundeven.f64(double)

12
llvm/test/CodeGen/ARM/floorf.ll
View File

@ -3,27 +3,27 @@
; CHECK: test1
define float @test1() nounwind uwtable readnone ssp {
; CHECK-NOT: floorf
%foo = call float @floorf(float 0x4000CCCCC0000000) nounwind readnone
%foo = call float @llvm.floor.f32(float 0x4000CCCCC0000000) nounwind readnone
ret float %foo
}
; CHECK: test2
define float @test2() nounwind uwtable readnone ssp {
; CHECK-NOT: ceilf
%foo = call float @ceilf(float 0x4000CCCCC0000000) nounwind readnone
%foo = call float @llvm.ceil.f32(float 0x4000CCCCC0000000) nounwind readnone
ret float %foo
}
; CHECK: test3
define float @test3() nounwind uwtable readnone ssp {
; CHECK-NOT: truncf
%foo = call float @truncf(float 0x4000CCCCC0000000) nounwind readnone
%foo = call float @llvm.trunc.f32(float 0x4000CCCCC0000000) nounwind readnone
ret float %foo
}
declare float @floorf(float) nounwind readnone
declare float @ceilf(float) nounwind readnone
declare float @truncf(float) nounwind readnone
declare float @llvm.floor.f32(float) nounwind readnone
declare float @llvm.ceil.f32(float) nounwind readnone
declare float @llvm.trunc.f32(float) nounwind readnone

12
llvm/test/CodeGen/Mips/mips64-f128.ll
View File

@ -1288,12 +1288,10 @@ define fp128 @libcall1_ceill() {
; CMP_CC_FMT-NEXT: jrc $ra
entry:
%0 = load fp128, ptr @gld0, align 16
%call = tail call fp128 @ceill(fp128 %0) nounwind readnone
%call = tail call fp128 @llvm.ceil.f128(fp128 %0) nounwind readnone
ret fp128 %call
}
declare fp128 @ceill(fp128) #1
define fp128 @libcall1_sinl() {
; C_CC_FMT-LABEL: libcall1_sinl:
; C_CC_FMT: # %bb.0: # %entry
@ -1790,12 +1788,10 @@ define fp128 @libcall1_floorl() {
; CMP_CC_FMT-NEXT: jrc $ra
entry:
%0 = load fp128, ptr @gld0, align 16
%call = tail call fp128 @floorl(fp128 %0) nounwind readnone
%call = tail call fp128 @llvm.floor.f128(fp128 %0) nounwind readnone
ret fp128 %call
}
declare fp128 @floorl(fp128) #1
define fp128 @libcall1_sqrtl() {
; C_CC_FMT-LABEL: libcall1_sqrtl:
; C_CC_FMT: # %bb.0: # %entry
@ -1902,12 +1898,10 @@ define fp128 @libcall1_rintl() {
; CMP_CC_FMT-NEXT: jrc $ra
entry:
%0 = load fp128, ptr @gld0, align 16
%call = tail call fp128 @rintl(fp128 %0) nounwind readnone
%call = tail call fp128 @llvm.rint.f128(fp128 %0) nounwind readnone
ret fp128 %call
}
declare fp128 @rintl(fp128) #1
define fp128 @libcall_powil(fp128 %a, i32 %b) {
; C_CC_FMT-LABEL: libcall_powil:
; C_CC_FMT: # %bb.0: # %entry

97
llvm/test/CodeGen/PowerPC/ctr-minmaxnum.ll
View File

@ -2,13 +2,9 @@
declare float @fabsf(float)
declare float @fminf(float, float)
declare double @fmin(double, double)
declare float @llvm.minnum.f32(float, float)
declare double @llvm.minnum.f64(double, double)
declare float @fmaxf(float, float)
declare double @fmax(double, double)
declare float @llvm.maxnum.f32(float, float)
declare double @llvm.maxnum.f64(double, double)
@ -63,29 +59,6 @@ loop_exit:
; CHECK-NOT: xsmindp
; CHECK: blr
define void @test1a(float %f, ptr %fp) {
entry:
br label %loop_body
loop_body:
%invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]
%0 = call float @fminf(float %f, float 1.0) readnone
store float %0, ptr %fp, align 4
%1 = add i64 %invar_address.dim.0.01, 1
%2 = icmp eq i64 %1, 2
br i1 %2, label %loop_exit, label %loop_body
loop_exit:
ret void
}
; CHECK-LABEL: test1a:
; CHECK-NOT: mtctr
; CHECK: xsmindp
; CHECK-NOT: xsmindp
; CHECK-NOT: mtctr
; CHECK: blr
define void @test2(float %f, ptr %fp) {
entry:
br label %loop_body
@ -133,29 +106,6 @@ loop_exit:
; CHECK-NOT: xsmaxdp
; CHECK: blr
define void @test2a(float %f, ptr %fp) {
entry:
br label %loop_body
loop_body:
%invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]
%0 = call float @fmaxf(float %f, float 1.0) readnone
store float %0, ptr %fp, align 4
%1 = add i64 %invar_address.dim.0.01, 1
%2 = icmp eq i64 %1, 2
br i1 %2, label %loop_exit, label %loop_body
loop_exit:
ret void
}
; CHECK-LABEL: test2a:
; CHECK-NOT: mtctr
; CHECK: xsmaxdp
; CHECK-NOT: xsmaxdp
; CHECK-NOT: mtctr
; CHECK: blr
define void @test3(double %f, ptr %fp) {
entry:
br label %loop_body
@ -179,29 +129,6 @@ loop_exit:
; CHECK-NOT: mtctr
; CHECK: blr
define void @test3a(double %f, ptr %fp) {
entry:
br label %loop_body
loop_body:
%invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]
%0 = call double @fmin(double %f, double 1.0) readnone
store double %0, ptr %fp, align 8
%1 = add i64 %invar_address.dim.0.01, 1
%2 = icmp eq i64 %1, 2
br i1 %2, label %loop_exit, label %loop_body
loop_exit:
ret void
}
; CHECK-LABEL: test3a:
; CHECK-NOT: mtctr
; CHECK: xsmindp
; CHECK-NOT: xsmindp
; CHECK-NOT: mtctr
; CHECK: blr
define void @test4(double %f, ptr %fp) {
entry:
br label %loop_body
@ -224,27 +151,3 @@ loop_exit:
; CHECK-NOT: xsmaxdp
; CHECK-NOT: mtctr
; CHECK: blr
define void @test4a(double %f, ptr %fp) {
entry:
br label %loop_body
loop_body:
%invar_address.dim.0.01 = phi i64 [ 0, %entry ], [ %1, %loop_body ]
%0 = call double @fmax(double %f, double 1.0) readnone
store double %0, ptr %fp, align 8
%1 = add i64 %invar_address.dim.0.01, 1
%2 = icmp eq i64 %1, 2
br i1 %2, label %loop_exit, label %loop_body
loop_exit:
ret void
}
; CHECK-LABEL: test4a:
; CHECK-NOT: mtctr
; CHECK: xsmaxdp
; CHECK-NOT: xsmaxdp
; CHECK-NOT: mtctr
; CHECK: blr

64
llvm/test/CodeGen/PowerPC/fminnum.ll
View File

@ -54,43 +54,43 @@ define ppc_fp128 @test_fminl(ppc_fp128 %x, ppc_fp128 %y) {
; CHECK-NEXT: stw 0, 116(1)
; CHECK-NEXT: .cfi_def_cfa_offset 112
; CHECK-NEXT: .cfi_offset lr, 4
; CHECK-NEXT: stfd 1, 40(1)
; CHECK-NEXT: lwz 3, 44(1)
; CHECK-NEXT: stfd 2, 32(1)
; CHECK-NEXT: stw 3, 60(1)
; CHECK-NEXT: lwz 3, 40(1)
; CHECK-NEXT: stfd 3, 72(1)
; CHECK-NEXT: stw 3, 56(1)
; CHECK-NEXT: lwz 3, 36(1)
; CHECK-NEXT: stfd 4, 64(1)
; CHECK-NEXT: stw 3, 52(1)
; CHECK-NEXT: lwz 3, 32(1)
; CHECK-NEXT: lfd 1, 56(1)
; CHECK-NEXT: stw 3, 48(1)
; CHECK-NEXT: lwz 3, 76(1)
; CHECK-NEXT: lfd 2, 48(1)
; CHECK-NEXT: stw 3, 92(1)
; CHECK-NEXT: lwz 3, 72(1)
; CHECK-NEXT: stw 3, 88(1)
; CHECK-NEXT: lwz 3, 68(1)
; CHECK-NEXT: lfd 3, 88(1)
; CHECK-NEXT: stw 3, 84(1)
; CHECK-NEXT: lwz 3, 64(1)
; CHECK-NEXT: stw 3, 80(1)
; CHECK-NEXT: lfd 4, 80(1)
; CHECK-NEXT: bl fminl
; CHECK-NEXT: stfd 1, 16(1)
; CHECK-NEXT: lwz 3, 20(1)
; CHECK-NEXT: stfd 2, 24(1)
; CHECK-NEXT: stfd 1, 88(1)
; CHECK-NEXT: lwz 3, 92(1)
; CHECK-NEXT: stfd 2, 80(1)
; CHECK-NEXT: stw 3, 108(1)
; CHECK-NEXT: lwz 3, 16(1)
; CHECK-NEXT: lwz 3, 88(1)
; CHECK-NEXT: stfd 3, 56(1)
; CHECK-NEXT: stw 3, 104(1)
; CHECK-NEXT: lwz 3, 28(1)
; CHECK-NEXT: lfd 1, 104(1)
; CHECK-NEXT: lwz 3, 84(1)
; CHECK-NEXT: stfd 4, 48(1)
; CHECK-NEXT: stw 3, 100(1)
; CHECK-NEXT: lwz 3, 24(1)
; CHECK-NEXT: lwz 3, 80(1)
; CHECK-NEXT: lfd 1, 104(1)
; CHECK-NEXT: stw 3, 96(1)
; CHECK-NEXT: lwz 3, 60(1)
; CHECK-NEXT: lfd 2, 96(1)
; CHECK-NEXT: stw 3, 76(1)
; CHECK-NEXT: lwz 3, 56(1)
; CHECK-NEXT: stw 3, 72(1)
; CHECK-NEXT: lwz 3, 52(1)
; CHECK-NEXT: lfd 3, 72(1)
; CHECK-NEXT: stw 3, 68(1)
; CHECK-NEXT: lwz 3, 48(1)
; CHECK-NEXT: stw 3, 64(1)
; CHECK-NEXT: lfd 4, 64(1)
; CHECK-NEXT: bl fminl
; CHECK-NEXT: stfd 1, 24(1)
; CHECK-NEXT: lwz 3, 28(1)
; CHECK-NEXT: stfd 2, 16(1)
; CHECK-NEXT: stw 3, 44(1)
; CHECK-NEXT: lwz 3, 24(1)
; CHECK-NEXT: stw 3, 40(1)
; CHECK-NEXT: lwz 3, 20(1)
; CHECK-NEXT: lfd 1, 40(1)
; CHECK-NEXT: stw 3, 36(1)
; CHECK-NEXT: lwz 3, 16(1)
; CHECK-NEXT: stw 3, 32(1)
; CHECK-NEXT: lfd 2, 32(1)
; CHECK-NEXT: lwz 0, 116(1)
; CHECK-NEXT: addi 1, 1, 112
; CHECK-NEXT: mtlr 0

32
llvm/test/CodeGen/PowerPC/rounding-ops.ll
View File

@ -4,7 +4,7 @@ target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
target triple = "powerpc64-unknown-linux-gnu"
define float @test1(float %x) nounwind {
%call = tail call float @floorf(float %x) nounwind readnone
%call = tail call float @llvm.floor.f32(float %x) nounwind readnone
ret float %call
; CHECK-LABEL: test1:
@ -13,10 +13,10 @@ define float @test1(float %x) nounwind {
; CHECK-VSX: xsrdpim 1, 1
}
declare float @floorf(float) nounwind readnone
declare float @llvm.floor.f32(float) nounwind readnone
define double @test2(double %x) nounwind {
%call = tail call double @floor(double %x) nounwind readnone
%call = tail call double @llvm.floor.f64(double %x) nounwind readnone
ret double %call
; CHECK-LABEL: test2:
@ -25,10 +25,10 @@ define double @test2(double %x) nounwind {
; CHECK-VSX: xsrdpim 1, 1
}
declare double @floor(double) nounwind readnone
declare double @llvm.floor.f64(double) nounwind readnone
define float @test3(float %x) nounwind {
%call = tail call float @roundf(float %x) nounwind readnone
%call = tail call float @llvm.round.f32(float %x) nounwind readnone
ret float %call
; CHECK-LABEL: test3:
@ -37,10 +37,10 @@ define float @test3(float %x) nounwind {
; CHECK-VSX: xsrdpi 1, 1
}
declare float @roundf(float) nounwind readnone
declare float @llvm.round.f32(float) nounwind readnone
define double @test4(double %x) nounwind {
%call = tail call double @round(double %x) nounwind readnone
%call = tail call double @llvm.round.f64(double %x) nounwind readnone
ret double %call
; CHECK-LABEL: test4:
@ -49,10 +49,10 @@ define double @test4(double %x) nounwind {
; CHECK-VSX: xsrdpi 1, 1
}
declare double @round(double) nounwind readnone
declare double @llvm.round.f64(double) nounwind readnone
define float @test5(float %x) nounwind {
%call = tail call float @ceilf(float %x) nounwind readnone
%call = tail call float @llvm.ceil.f32(float %x) nounwind readnone
ret float %call
; CHECK-LABEL: test5:
@ -61,10 +61,10 @@ define float @test5(float %x) nounwind {
; CHECK-VSX: xsrdpip 1, 1
}
declare float @ceilf(float) nounwind readnone
declare float @llvm.ceil.f32(float) nounwind readnone
define double @test6(double %x) nounwind {
%call = tail call double @ceil(double %x) nounwind readnone
%call = tail call double @llvm.ceil.f64(double %x) nounwind readnone
ret double %call
; CHECK-LABEL: test6:
@ -73,10 +73,10 @@ define double @test6(double %x) nounwind {
; CHECK-VSX: xsrdpip 1, 1
}
declare double @ceil(double) nounwind readnone
declare double @llvm.ceil.f64(double) nounwind readnone
define float @test9(float %x) nounwind {
%call = tail call float @truncf(float %x) nounwind readnone
%call = tail call float @llvm.trunc.f32(float %x) nounwind readnone
ret float %call
; CHECK-LABEL: test9:
@ -85,10 +85,10 @@ define float @test9(float %x) nounwind {
; CHECK-VSX: xsrdpiz 1, 1
}
declare float @truncf(float) nounwind readnone
declare float @llvm.trunc.f32(float) nounwind readnone
define double @test10(double %x) nounwind {
%call = tail call double @trunc(double %x) nounwind readnone
%call = tail call double @llvm.trunc.f64(double %x) nounwind readnone
ret double %call
; CHECK-LABEL: test10:
@ -97,5 +97,5 @@ define double @test10(double %x) nounwind {
; CHECK-VSX: xsrdpiz 1, 1
}
declare double @trunc(double) nounwind readnone
declare double @llvm.trunc.f64(double) nounwind readnone

20
llvm/test/CodeGen/RISCV/double-zfa.ll
View File

@ -206,44 +206,44 @@ define double @fround_d_1(double %a) nounwind {
; CHECK: # %bb.0:
; CHECK-NEXT: fround.d fa0, fa0, rmm
; CHECK-NEXT: ret
%call = tail call double @round(double %a) nounwind readnone
%call = tail call double @llvm.round.f64(double %a) nounwind readnone
ret double %call
}
declare double @round(double) nounwind readnone
declare double @llvm.round.f64(double) nounwind readnone
define double @fround_d_2(double %a) nounwind {
; CHECK-LABEL: fround_d_2:
; CHECK: # %bb.0:
; CHECK-NEXT: fround.d fa0, fa0, rdn
; CHECK-NEXT: ret
%call = tail call double @floor(double %a) nounwind readnone
%call = tail call double @llvm.floor.f64(double %a) nounwind readnone
ret double %call
}
declare double @floor(double) nounwind readnone
declare double @llvm.floor.f64(double) nounwind readnone
define double @fround_d_3(double %a) nounwind {
; CHECK-LABEL: fround_d_3:
; CHECK: # %bb.0:
; CHECK-NEXT: fround.d fa0, fa0, rup
; CHECK-NEXT: ret
%call = tail call double @ceil(double %a) nounwind readnone
%call = tail call double @llvm.ceil.f64(double %a) nounwind readnone
ret double %call
}
declare double @ceil(double) nounwind readnone
declare double @llvm.ceil.f64(double) nounwind readnone
define double @fround_d_4(double %a) nounwind {
; CHECK-LABEL: fround_d_4:
; CHECK: # %bb.0:
; CHECK-NEXT: fround.d fa0, fa0, rtz
; CHECK-NEXT: ret
%call = tail call double @trunc(double %a) nounwind readnone
%call = tail call double @llvm.trunc.f64(double %a) nounwind readnone
ret double %call
}
declare double @trunc(double) nounwind readnone
declare double @llvm.trunc.f64(double) nounwind readnone
define double @fround_d_5(double %a) nounwind {
; CHECK-LABEL: fround_d_5:
@ -268,11 +268,11 @@ define double @froundnx_d(double %a) nounwind {
; CHECK: # %bb.0:
; CHECK-NEXT: froundnx.d fa0, fa0
; CHECK-NEXT: ret
%call = tail call double @rint(double %a) nounwind readnone
%call = tail call double @llvm.rint.f64(double %a) nounwind readnone
ret double %call
}
declare double @rint(double) nounwind readnone
declare double @llvm.rint.f64(double) nounwind readnone
define i32 @fcmp_olt_q(double %a, double %b) nounwind strictfp {
; CHECK-LABEL: fcmp_olt_q:

20
llvm/test/CodeGen/RISCV/float-zfa.ll
View File

@ -139,44 +139,44 @@ define float @fround_s_1(float %a) nounwind {
; CHECK: # %bb.0:
; CHECK-NEXT: fround.s fa0, fa0, rmm
; CHECK-NEXT: ret
%call = tail call float @roundf(float %a) nounwind readnone
%call = tail call float @llvm.round.f32(float %a) nounwind readnone
ret float %call
}
declare float @roundf(float) nounwind readnone
declare float @llvm.round.f32(float) nounwind readnone
define float @fround_s_2(float %a) nounwind {
; CHECK-LABEL: fround_s_2:
; CHECK: # %bb.0:
; CHECK-NEXT: fround.s fa0, fa0, rdn
; CHECK-NEXT: ret
%call = tail call float @floorf(float %a) nounwind readnone
%call = tail call float @llvm.floor.f32(float %a) nounwind readnone
ret float %call
}
declare float @floorf(float) nounwind readnone
declare float @llvm.floor.f32(float) nounwind readnone
define float @fround_s_3(float %a) nounwind {
; CHECK-LABEL: fround_s_3:
; CHECK: # %bb.0:
; CHECK-NEXT: fround.s fa0, fa0, rup
; CHECK-NEXT: ret
%call = tail call float @ceilf(float %a) nounwind readnone
%call = tail call float @llvm.ceil.f32(float %a) nounwind readnone
ret float %call
}
declare float @ceilf(float) nounwind readnone
declare float @llvm.ceil.f32(float) nounwind readnone
define float @fround_s_4(float %a) nounwind {
; CHECK-LABEL: fround_s_4:
; CHECK: # %bb.0:
; CHECK-NEXT: fround.s fa0, fa0, rtz
; CHECK-NEXT: ret
%call = tail call float @truncf(float %a) nounwind readnone
%call = tail call float @llvm.trunc.f32(float %a) nounwind readnone
ret float %call
}
declare float @truncf(float) nounwind readnone
declare float @llvm.trunc.f32(float) nounwind readnone
define float @fround_s_5(float %a) nounwind {
; CHECK-LABEL: fround_s_5:
@ -201,11 +201,11 @@ define float @froundnx_s(float %a) nounwind {
; CHECK: # %bb.0:
; CHECK-NEXT: froundnx.s fa0, fa0
; CHECK-NEXT: ret
%call = tail call float @rintf(float %a) nounwind readnone
%call = tail call float @llvm.rint.f32(float %a) nounwind readnone
ret float %call
}
declare float @rintf(float) nounwind readnone
declare float @llvm.rint.f32(float) nounwind readnone
define i32 @fcmp_olt_q(float %a, float %b) nounwind strictfp {
; CHECK-LABEL: fcmp_olt_q:

34
llvm/test/CodeGen/SystemZ/vec-max-05.ll
View File

@ -22,10 +22,15 @@ declare fp128 @llvm.maxnum.f128(fp128, fp128)
declare fp128 @llvm.maximum.f128(fp128, fp128)
; Test the fmax library function.
define double @f1(double %dummy, double %val1, double %val2) {
define double @f1(double %dummy, double %val1, double %val2) nounwind {
; CHECK-LABEL: f1:
; CHECK: # %bb.0:
; CHECK-NEXT: wfmaxdb %f0, %f2, %f4, 4
; CHECK-NEXT: stmg %r14, %r15, 112(%r15)
; CHECK-NEXT: aghi %r15, -160
; CHECK-NEXT: ldr %f0, %f2
; CHECK-NEXT: ldr %f2, %f4
; CHECK-NEXT: brasl %r14, fmax@PLT
; CHECK-NEXT: lmg %r14, %r15, 272(%r15)
; CHECK-NEXT: br %r14
%ret = call double @fmax(double %val1, double %val2) readnone
ret double %ret
@ -99,10 +104,15 @@ define <2 x double> @f7(<2 x double> %dummy, <2 x double> %val1, <2 x double> %v
}
; Test the fmaxf library function.
define float @f11(float %dummy, float %val1, float %val2) {
define float @f11(float %dummy, float %val1, float %val2) nounwind {
; CHECK-LABEL: f11:
; CHECK: # %bb.0:
; CHECK-NEXT: wfmaxsb %f0, %f2, %f4, 4
; CHECK-NEXT: stmg %r14, %r15, 112(%r15)
; CHECK-NEXT: aghi %r15, -160
; CHECK-NEXT: ldr %f0, %f2
; CHECK-NEXT: ldr %f2, %f4
; CHECK-NEXT: brasl %r14, fmaxf@PLT
; CHECK-NEXT: lmg %r14, %r15, 272(%r15)
; CHECK-NEXT: br %r14
%ret = call float @fmaxf(float %val1, float %val2) readnone
ret float %ret
@ -207,13 +217,23 @@ define <4 x float> @f17(<4 x float> %dummy, <4 x float> %val1,
}
; Test the fmaxl library function.
define void @f21(ptr %ptr1, ptr %ptr2, ptr %dst) {
define void @f21(ptr %ptr1, ptr %ptr2, ptr %dst) nounwind {
; CHECK-LABEL: f21:
; CHECK: # %bb.0:
; CHECK-NEXT: stmg %r13, %r15, 104(%r15)
; CHECK-NEXT: aghi %r15, -208
; CHECK-NEXT: vl %v0, 0(%r2), 3
; CHECK-NEXT: vl %v1, 0(%r3), 3
; CHECK-NEXT: wfmaxxb %v0, %v0, %v1, 4
; CHECK-NEXT: vst %v0, 0(%r4), 3
; CHECK-NEXT: lgr %r13, %r4
; CHECK-NEXT: la %r2, 192(%r15)
; CHECK-NEXT: la %r3, 176(%r15)
; CHECK-NEXT: la %r4, 160(%r15)
; CHECK-NEXT: vst %v1, 160(%r15), 3
; CHECK-NEXT: vst %v0, 176(%r15), 3
; CHECK-NEXT: brasl %r14, fmaxl@PLT
; CHECK-NEXT: vl %v0, 192(%r15), 3
; CHECK-NEXT: vst %v0, 0(%r13), 3
; CHECK-NEXT: lmg %r13, %r15, 312(%r15)
; CHECK-NEXT: br %r14
%val1 = load fp128, ptr %ptr1
%val2 = load fp128, ptr %ptr2

34
llvm/test/CodeGen/SystemZ/vec-min-05.ll
View File

@ -22,10 +22,15 @@ declare fp128 @llvm.minnum.f128(fp128, fp128)
declare fp128 @llvm.minimum.f128(fp128, fp128)
; Test the fmin library function.
define double @f1(double %dummy, double %val1, double %val2) {
define double @f1(double %dummy, double %val1, double %val2) nounwind {
; CHECK-LABEL: f1:
; CHECK: # %bb.0:
; CHECK-NEXT: wfmindb %f0, %f2, %f4, 4
; CHECK-NEXT: stmg %r14, %r15, 112(%r15)
; CHECK-NEXT: aghi %r15, -160
; CHECK-NEXT: ldr %f0, %f2
; CHECK-NEXT: ldr %f2, %f4
; CHECK-NEXT: brasl %r14, fmin@PLT
; CHECK-NEXT: lmg %r14, %r15, 272(%r15)
; CHECK-NEXT: br %r14
%ret = call double @fmin(double %val1, double %val2) readnone
ret double %ret
@ -99,10 +104,15 @@ define <2 x double> @f7(<2 x double> %dummy, <2 x double> %val1, <2 x double> %v
}
; Test the fminf library function.
define float @f11(float %dummy, float %val1, float %val2) {
define float @f11(float %dummy, float %val1, float %val2) nounwind {
; CHECK-LABEL: f11:
; CHECK: # %bb.0:
; CHECK-NEXT: wfminsb %f0, %f2, %f4, 4
; CHECK-NEXT: stmg %r14, %r15, 112(%r15)
; CHECK-NEXT: aghi %r15, -160
; CHECK-NEXT: ldr %f0, %f2
; CHECK-NEXT: ldr %f2, %f4
; CHECK-NEXT: brasl %r14, fminf@PLT
; CHECK-NEXT: lmg %r14, %r15, 272(%r15)
; CHECK-NEXT: br %r14
%ret = call float @fminf(float %val1, float %val2) readnone
ret float %ret
@ -207,13 +217,23 @@ define <4 x float> @f17(<4 x float> %dummy, <4 x float> %val1,
}
; Test the fminl library function.
define void @f21(ptr %ptr1, ptr %ptr2, ptr %dst) {
define void @f21(ptr %ptr1, ptr %ptr2, ptr %dst) nounwind {
; CHECK-LABEL: f21:
; CHECK: # %bb.0:
; CHECK-NEXT: stmg %r13, %r15, 104(%r15)
; CHECK-NEXT: aghi %r15, -208
; CHECK-NEXT: vl %v0, 0(%r2), 3
; CHECK-NEXT: vl %v1, 0(%r3), 3
; CHECK-NEXT: wfminxb %v0, %v0, %v1, 4
; CHECK-NEXT: vst %v0, 0(%r4), 3
; CHECK-NEXT: lgr %r13, %r4
; CHECK-NEXT: la %r2, 192(%r15)
; CHECK-NEXT: la %r3, 176(%r15)
; CHECK-NEXT: la %r4, 160(%r15)
; CHECK-NEXT: vst %v1, 160(%r15), 3
; CHECK-NEXT: vst %v0, 176(%r15), 3
; CHECK-NEXT: brasl %r14, fminl@PLT
; CHECK-NEXT: vl %v0, 192(%r15), 3
; CHECK-NEXT: vst %v0, 0(%r13), 3
; CHECK-NEXT: lmg %r13, %r15, 312(%r15)
; CHECK-NEXT: br %r14
%val1 = load fp128, ptr %ptr1
%val2 = load fp128, ptr %ptr2

93
llvm/test/CodeGen/X86/fmaxnum.ll
View File

@ -22,41 +22,14 @@ declare <8 x double> @llvm.maxnum.v8f64(<8 x double>, <8 x double>)
; FIXME: As the vector tests show, the SSE run shouldn't need this many moves.
define float @test_fmaxf(float %x, float %y) {
; SSE2-LABEL: test_fmaxf:
; SSE2: # %bb.0:
; SSE2-NEXT: movaps %xmm0, %xmm2
; SSE2-NEXT: cmpunordss %xmm0, %xmm2
; SSE2-NEXT: movaps %xmm2, %xmm3
; SSE2-NEXT: andps %xmm1, %xmm3
; SSE2-NEXT: maxss %xmm0, %xmm1
; SSE2-NEXT: andnps %xmm1, %xmm2
; SSE2-NEXT: orps %xmm3, %xmm2
; SSE2-NEXT: movaps %xmm2, %xmm0
; SSE2-NEXT: retq
;
; SSE4-LABEL: test_fmaxf:
; SSE4: # %bb.0:
; SSE4-NEXT: movaps %xmm1, %xmm2
; SSE4-NEXT: maxss %xmm0, %xmm2
; SSE4-NEXT: cmpunordss %xmm0, %xmm0
; SSE4-NEXT: blendvps %xmm0, %xmm1, %xmm2
; SSE4-NEXT: movaps %xmm2, %xmm0
; SSE4-NEXT: retq
;
; AVX1-LABEL: test_fmaxf:
; AVX1: # %bb.0:
; AVX1-NEXT: vmaxss %xmm0, %xmm1, %xmm2
; AVX1-NEXT: vcmpunordss %xmm0, %xmm0, %xmm0
; AVX1-NEXT: vblendvps %xmm0, %xmm1, %xmm2, %xmm0
; AVX1-NEXT: retq
;
; AVX512-LABEL: test_fmaxf:
; AVX512: # %bb.0:
; AVX512-NEXT: vmaxss %xmm0, %xmm1, %xmm2
; AVX512-NEXT: vcmpunordss %xmm0, %xmm0, %k1
; AVX512-NEXT: vmovss %xmm1, %xmm2, %xmm2 {%k1}
; AVX512-NEXT: vmovaps %xmm2, %xmm0
; AVX512-NEXT: retq
; CHECK-LABEL: test_fmaxf:
; CHECK: # %bb.0:
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: callq fmaxf@PLT
; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq
%z = call float @fmaxf(float %x, float %y) readnone
ret float %z
}
@ -64,7 +37,12 @@ define float @test_fmaxf(float %x, float %y) {
define float @test_fmaxf_minsize(float %x, float %y) minsize {
; CHECK-LABEL: test_fmaxf_minsize:
; CHECK: # %bb.0:
; CHECK-NEXT: jmp fmaxf@PLT # TAILCALL
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: callq fmaxf@PLT
; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq
%z = call float @fmaxf(float %x, float %y) readnone
ret float %z
}
@ -72,41 +50,14 @@ define float @test_fmaxf_minsize(float %x, float %y) minsize {
; FIXME: As the vector tests show, the SSE run shouldn't need this many moves.
define double @test_fmax(double %x, double %y) {
; SSE2-LABEL: test_fmax:
; SSE2: # %bb.0:
; SSE2-NEXT: movapd %xmm0, %xmm2
; SSE2-NEXT: cmpunordsd %xmm0, %xmm2
; SSE2-NEXT: movapd %xmm2, %xmm3
; SSE2-NEXT: andpd %xmm1, %xmm3
; SSE2-NEXT: maxsd %xmm0, %xmm1
; SSE2-NEXT: andnpd %xmm1, %xmm2
; SSE2-NEXT: orpd %xmm3, %xmm2
; SSE2-NEXT: movapd %xmm2, %xmm0
; SSE2-NEXT: retq
;
; SSE4-LABEL: test_fmax:
; SSE4: # %bb.0:
; SSE4-NEXT: movapd %xmm1, %xmm2
; SSE4-NEXT: maxsd %xmm0, %xmm2
; SSE4-NEXT: cmpunordsd %xmm0, %xmm0
; SSE4-NEXT: blendvpd %xmm0, %xmm1, %xmm2
; SSE4-NEXT: movapd %xmm2, %xmm0
; SSE4-NEXT: retq
;
; AVX1-LABEL: test_fmax:
; AVX1: # %bb.0:
; AVX1-NEXT: vmaxsd %xmm0, %xmm1, %xmm2
; AVX1-NEXT: vcmpunordsd %xmm0, %xmm0, %xmm0
; AVX1-NEXT: vblendvpd %xmm0, %xmm1, %xmm2, %xmm0
; AVX1-NEXT: retq
;
; AVX512-LABEL: test_fmax:
; AVX512: # %bb.0:
; AVX512-NEXT: vmaxsd %xmm0, %xmm1, %xmm2
; AVX512-NEXT: vcmpunordsd %xmm0, %xmm0, %k1
; AVX512-NEXT: vmovsd %xmm1, %xmm2, %xmm2 {%k1}
; AVX512-NEXT: vmovapd %xmm2, %xmm0
; AVX512-NEXT: retq
; CHECK-LABEL: test_fmax:
; CHECK: # %bb.0:
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: callq fmax@PLT
; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq
%z = call double @fmax(double %x, double %y) readnone
ret double %z
}

93
llvm/test/CodeGen/X86/fminnum.ll
View File

@ -22,41 +22,14 @@ declare <8 x double> @llvm.minnum.v8f64(<8 x double>, <8 x double>)
; FIXME: As the vector tests show, the SSE run shouldn't need this many moves.
define float @test_fminf(float %x, float %y) {
; SSE2-LABEL: test_fminf:
; SSE2: # %bb.0:
; SSE2-NEXT: movaps %xmm0, %xmm2
; SSE2-NEXT: cmpunordss %xmm0, %xmm2
; SSE2-NEXT: movaps %xmm2, %xmm3
; SSE2-NEXT: andps %xmm1, %xmm3
; SSE2-NEXT: minss %xmm0, %xmm1
; SSE2-NEXT: andnps %xmm1, %xmm2
; SSE2-NEXT: orps %xmm3, %xmm2
; SSE2-NEXT: movaps %xmm2, %xmm0
; SSE2-NEXT: retq
;
; SSE4-LABEL: test_fminf:
; SSE4: # %bb.0:
; SSE4-NEXT: movaps %xmm1, %xmm2
; SSE4-NEXT: minss %xmm0, %xmm2
; SSE4-NEXT: cmpunordss %xmm0, %xmm0
; SSE4-NEXT: blendvps %xmm0, %xmm1, %xmm2
; SSE4-NEXT: movaps %xmm2, %xmm0
; SSE4-NEXT: retq
;
; AVX1-LABEL: test_fminf:
; AVX1: # %bb.0:
; AVX1-NEXT: vminss %xmm0, %xmm1, %xmm2
; AVX1-NEXT: vcmpunordss %xmm0, %xmm0, %xmm0
; AVX1-NEXT: vblendvps %xmm0, %xmm1, %xmm2, %xmm0
; AVX1-NEXT: retq
;
; AVX512-LABEL: test_fminf:
; AVX512: # %bb.0:
; AVX512-NEXT: vminss %xmm0, %xmm1, %xmm2
; AVX512-NEXT: vcmpunordss %xmm0, %xmm0, %k1
; AVX512-NEXT: vmovss %xmm1, %xmm2, %xmm2 {%k1}
; AVX512-NEXT: vmovaps %xmm2, %xmm0
; AVX512-NEXT: retq
; CHECK-LABEL: test_fminf:
; CHECK: # %bb.0:
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: callq fminf@PLT
; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq
%z = call float @fminf(float %x, float %y) readnone
ret float %z
}
@ -64,7 +37,12 @@ define float @test_fminf(float %x, float %y) {
define float @test_fminf_minsize(float %x, float %y) minsize {
; CHECK-LABEL: test_fminf_minsize:
; CHECK: # %bb.0:
; CHECK-NEXT: jmp fminf@PLT # TAILCALL
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: callq fminf@PLT
; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq
%z = call float @fminf(float %x, float %y) readnone
ret float %z
}
@ -72,41 +50,14 @@ define float @test_fminf_minsize(float %x, float %y) minsize {
; FIXME: As the vector tests show, the SSE run shouldn't need this many moves.
define double @test_fmin(double %x, double %y) {
; SSE2-LABEL: test_fmin:
; SSE2: # %bb.0:
; SSE2-NEXT: movapd %xmm0, %xmm2
; SSE2-NEXT: cmpunordsd %xmm0, %xmm2
; SSE2-NEXT: movapd %xmm2, %xmm3
; SSE2-NEXT: andpd %xmm1, %xmm3
; SSE2-NEXT: minsd %xmm0, %xmm1
; SSE2-NEXT: andnpd %xmm1, %xmm2
; SSE2-NEXT: orpd %xmm3, %xmm2
; SSE2-NEXT: movapd %xmm2, %xmm0
; SSE2-NEXT: retq
;
; SSE4-LABEL: test_fmin:
; SSE4: # %bb.0:
; SSE4-NEXT: movapd %xmm1, %xmm2
; SSE4-NEXT: minsd %xmm0, %xmm2
; SSE4-NEXT: cmpunordsd %xmm0, %xmm0
; SSE4-NEXT: blendvpd %xmm0, %xmm1, %xmm2
; SSE4-NEXT: movapd %xmm2, %xmm0
; SSE4-NEXT: retq
;
; AVX1-LABEL: test_fmin:
; AVX1: # %bb.0:
; AVX1-NEXT: vminsd %xmm0, %xmm1, %xmm2
; AVX1-NEXT: vcmpunordsd %xmm0, %xmm0, %xmm0
; AVX1-NEXT: vblendvpd %xmm0, %xmm1, %xmm2, %xmm0
; AVX1-NEXT: retq
;
; AVX512-LABEL: test_fmin:
; AVX512: # %bb.0:
; AVX512-NEXT: vminsd %xmm0, %xmm1, %xmm2
; AVX512-NEXT: vcmpunordsd %xmm0, %xmm0, %k1
; AVX512-NEXT: vmovsd %xmm1, %xmm2, %xmm2 {%k1}
; AVX512-NEXT: vmovapd %xmm2, %xmm0
; AVX512-NEXT: retq
; CHECK-LABEL: test_fmin:
; CHECK: # %bb.0:
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: callq fmin@PLT
; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq
%z = call double @fmin(double %x, double %y) readnone
ret double %z
}

8
llvm/test/CodeGen/X86/pr31143.ll
View File

@ -13,7 +13,7 @@ for.body:
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
%arrayidx = getelementptr inbounds float, ptr %a, i64 %indvars.iv
%v = load float, ptr %arrayidx, align 4
%floor = call float @floorf(float %v)
%floor = call float @llvm.floor.f32(float %v)
%sub = fsub float %floor, %v
%v1 = insertelement <4 x float> undef, float %sub, i32 0
%br = shufflevector <4 x float> %v1, <4 x float> undef, <4 x i32> <i32 0, i32 0, i32 0, i32 0>
@ -40,7 +40,7 @@ for.body:
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
%arrayidx = getelementptr inbounds double, ptr %a, i64 %indvars.iv
%v = load double, ptr %arrayidx, align 4
%floor = call double @floor(double %v)
%floor = call double @llvm.floor.f64(double %v)
%sub = fsub double %floor, %v
%v1 = insertelement <2 x double> undef, double %sub, i32 0
%br = shufflevector <2 x double> %v1, <2 x double> undef, <2 x i32> <i32 0, i32 0>
@ -54,7 +54,7 @@ for.end:
ret void
}
declare float @floorf(float) nounwind readnone
declare float @llvm.floor.f32(float) nounwind readnone
declare double @floor(double) nounwind readnone
declare double @llvm.floor.f64(double) nounwind readnone

40
llvm/test/CodeGen/X86/rounding-ops.ll
View File

@ -18,11 +18,11 @@ define float @test1(float %x) nounwind {
; CHECK-AVX512: ## %bb.0:
; CHECK-AVX512-NEXT: vroundss $9, %xmm0, %xmm0, %xmm0
; CHECK-AVX512-NEXT: retq
%call = tail call float @floorf(float %x) nounwind readnone
%call = tail call float @llvm.floor.f32(float %x) nounwind readnone
ret float %call
}
declare float @floorf(float) nounwind readnone
declare float @llvm.floor.f32(float) nounwind readnone
define double @test2(double %x) nounwind {
; CHECK-SSE-LABEL: test2:
@ -39,11 +39,11 @@ define double @test2(double %x) nounwind {
; CHECK-AVX512: ## %bb.0:
; CHECK-AVX512-NEXT: vroundsd $9, %xmm0, %xmm0, %xmm0
; CHECK-AVX512-NEXT: retq
%call = tail call double @floor(double %x) nounwind readnone
%call = tail call double @llvm.floor.f64(double %x) nounwind readnone
ret double %call
}
declare double @floor(double) nounwind readnone
declare double @llvm.floor.f64(double) nounwind readnone
define float @test3(float %x) nounwind {
; CHECK-SSE-LABEL: test3:
@ -98,11 +98,11 @@ define float @test5(float %x) nounwind {
; CHECK-AVX512: ## %bb.0:
; CHECK-AVX512-NEXT: vroundss $10, %xmm0, %xmm0, %xmm0
; CHECK-AVX512-NEXT: retq
%call = tail call float @ceilf(float %x) nounwind readnone
%call = tail call float @llvm.ceil.f32(float %x) nounwind readnone
ret float %call
}
declare float @ceilf(float) nounwind readnone
declare float @llvm.ceil.f32(float) nounwind readnone
define double @test6(double %x) nounwind {
; CHECK-SSE-LABEL: test6:
@ -119,11 +119,11 @@ define double @test6(double %x) nounwind {
; CHECK-AVX512: ## %bb.0:
; CHECK-AVX512-NEXT: vroundsd $10, %xmm0, %xmm0, %xmm0
; CHECK-AVX512-NEXT: retq
%call = tail call double @ceil(double %x) nounwind readnone
%call = tail call double @llvm.ceil.f64(double %x) nounwind readnone
ret double %call
}
declare double @ceil(double) nounwind readnone
declare double @llvm.ceil.f64(double) nounwind readnone
define float @test7(float %x) nounwind {
; CHECK-SSE-LABEL: test7:
@ -140,11 +140,11 @@ define float @test7(float %x) nounwind {
; CHECK-AVX512: ## %bb.0:
; CHECK-AVX512-NEXT: vroundss $4, %xmm0, %xmm0, %xmm0
; CHECK-AVX512-NEXT: retq
%call = tail call float @rintf(float %x) nounwind readnone
%call = tail call float @llvm.rint.f32(float %x) nounwind readnone
ret float %call
}
declare float @rintf(float) nounwind readnone
declare float @llvm.rint.f32(float) nounwind readnone
define double @test8(double %x) nounwind {
; CHECK-SSE-LABEL: test8:
@ -161,11 +161,11 @@ define double @test8(double %x) nounwind {
; CHECK-AVX512: ## %bb.0:
; CHECK-AVX512-NEXT: vroundsd $4, %xmm0, %xmm0, %xmm0
; CHECK-AVX512-NEXT: retq
%call = tail call double @rint(double %x) nounwind readnone
%call = tail call double @llvm.rint.f64(double %x) nounwind readnone
ret double %call
}
declare double @rint(double) nounwind readnone
declare double @llvm.rint.f64(double) nounwind readnone
define float @test9(float %x) nounwind {
; CHECK-SSE-LABEL: test9:
@ -182,11 +182,11 @@ define float @test9(float %x) nounwind {
; CHECK-AVX512: ## %bb.0:
; CHECK-AVX512-NEXT: vroundss $11, %xmm0, %xmm0, %xmm0
; CHECK-AVX512-NEXT: retq
%call = tail call float @truncf(float %x) nounwind readnone
%call = tail call float @llvm.trunc.f32(float %x) nounwind readnone
ret float %call
}
declare float @truncf(float) nounwind readnone
declare float @llvm.trunc.f32(float) nounwind readnone
define double @test10(double %x) nounwind {
; CHECK-SSE-LABEL: test10:
@ -203,11 +203,11 @@ define double @test10(double %x) nounwind {
; CHECK-AVX512: ## %bb.0:
; CHECK-AVX512-NEXT: vroundsd $11, %xmm0, %xmm0, %xmm0
; CHECK-AVX512-NEXT: retq
%call = tail call double @trunc(double %x) nounwind readnone
%call = tail call double @llvm.trunc.f64(double %x) nounwind readnone
ret double %call
}
declare double @trunc(double) nounwind readnone
declare double @llvm.trunc.f64(double) nounwind readnone
define float @test11(ptr %xptr) nounwind optsize {
; CHECK-SSE-LABEL: test11:
@ -225,7 +225,7 @@ define float @test11(ptr %xptr) nounwind optsize {
; CHECK-AVX512-NEXT: vroundss $11, (%rdi), %xmm15, %xmm0
; CHECK-AVX512-NEXT: retq
%x = load float, ptr %xptr
%call = tail call float @truncf(float %x) nounwind readnone
%call = tail call float @llvm.trunc.f32(float %x) nounwind readnone
ret float %call
}
@ -245,7 +245,7 @@ define double @test12(ptr %xptr) nounwind optsize {
; CHECK-AVX512-NEXT: vroundsd $11, (%rdi), %xmm15, %xmm0
; CHECK-AVX512-NEXT: retq
%x = load double, ptr %xptr
%call = tail call double @trunc(double %x) nounwind readnone
%call = tail call double @llvm.trunc.f64(double %x) nounwind readnone
ret double %call
}
@ -265,7 +265,7 @@ define float @test11_pgso(ptr %xptr) nounwind !prof !14 {
; CHECK-AVX512-NEXT: vroundss $11, (%rdi), %xmm15, %xmm0
; CHECK-AVX512-NEXT: retq
%x = load float, ptr %xptr
%call = tail call float @truncf(float %x) nounwind readnone
%call = tail call float @llvm.trunc.f32(float %x) nounwind readnone
ret float %call
}
@ -285,7 +285,7 @@ define double @test12_pgso(ptr %xptr) nounwind !prof !14 {
; CHECK-AVX512-NEXT: vroundsd $11, (%rdi), %xmm15, %xmm0
; CHECK-AVX512-NEXT: retq
%x = load double, ptr %xptr
%call = tail call double @trunc(double %x) nounwind readnone
%call = tail call double @llvm.trunc.f64(double %x) nounwind readnone
ret double %call
}