From 5ae9ffbd18fd93edbbc8efebe140aeb24cd763c2 Mon Sep 17 00:00:00 2001
From: Philip Reames <preames@rivosinc.com>
Date: Wed, 10 Apr 2024 07:16:52 -0700
Subject: [PATCH] [RISCV] Address review comment from 88062

As pointed out by Fraser, KillSrcReg is always false at this point in
code, and having the inconcistency on whether we check the flag between
the if and else blocks is confusing.
---
 llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp b/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
index 46e79272d60e..84af6eec40ee 100644
--- a/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
@@ -210,8 +210,7 @@ void RISCVRegisterInfo::adjustReg(MachineBasicBlock &MBB,
       unsigned Opc = NumOfVReg == 2 ? RISCV::SH1ADD :
         (NumOfVReg == 4 ? RISCV::SH2ADD : RISCV::SH3ADD);
       BuildMI(MBB, II, DL, TII->get(Opc), DestReg)
-          .addReg(ScratchReg, RegState::Kill)
-          .addReg(SrcReg, getKillRegState(KillSrcReg))
+          .addReg(ScratchReg, RegState::Kill).addReg(SrcReg)
           .setMIFlag(Flag);
     } else {
       TII->mulImm(MF, MBB, II, DL, ScratchReg, NumOfVReg, Flag);