From 62bbe3fffc16d77a07cfbbb9333ef19fd01b135b Mon Sep 17 00:00:00 2001 From: Sander de Smalen Date: Fri, 3 Apr 2026 16:33:39 +0100 Subject: [PATCH] Fix buildbot failure by explicitly disabling partial reductions in TTI. (#190165) Partial reductions were previously disabled by default, but by implementing a generic cost-model in BasicTTIImpl (#189905) this now accidentally enables the use of those when vectorising loops for targets that may not support this yet. --- llvm/lib/Target/AMDGPU/R600TargetTransformInfo.h | 9 +++++++++ llvm/lib/Target/DirectX/DirectXTargetTransformInfo.h | 9 +++++++++ llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h | 9 +++++++++ .../Target/LoongArch/LoongArchTargetTransformInfo.h | 9 +++++++++ llvm/lib/Target/Mips/MipsTargetTransformInfo.h | 9 +++++++++ llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h | 9 +++++++++ llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h | 9 +++++++++ llvm/lib/Target/SPIRV/SPIRVTargetTransformInfo.h | 9 +++++++++ llvm/lib/Target/Sparc/SparcTargetTransformInfo.h | 9 +++++++++ llvm/lib/Target/VE/VETargetTransformInfo.h | 11 +++++++++++ 10 files changed, 92 insertions(+) diff --git a/llvm/lib/Target/AMDGPU/R600TargetTransformInfo.h b/llvm/lib/Target/AMDGPU/R600TargetTransformInfo.h index 9f8046391eba..f51c0963512c 100644 --- a/llvm/lib/Target/AMDGPU/R600TargetTransformInfo.h +++ b/llvm/lib/Target/AMDGPU/R600TargetTransformInfo.h @@ -66,6 +66,15 @@ public: unsigned Index, const Value *Op0, const Value *Op1, TTI::VectorInstrContext VIC = TTI::VectorInstrContext::None) const override; + + InstructionCost getPartialReductionCost( + unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType, + ElementCount VF, TTI::PartialReductionExtendKind OpAExtend, + TTI::PartialReductionExtendKind OpBExtend, std::optional BinOp, + TTI::TargetCostKind CostKind, + std::optional FMF) const override { + return InstructionCost::getInvalid(); + } }; } // end namespace llvm diff --git a/llvm/lib/Target/DirectX/DirectXTargetTransformInfo.h b/llvm/lib/Target/DirectX/DirectXTargetTransformInfo.h index e2dd4354a816..4f914f53e2ed 100644 --- a/llvm/lib/Target/DirectX/DirectXTargetTransformInfo.h +++ b/llvm/lib/Target/DirectX/DirectXTargetTransformInfo.h @@ -39,6 +39,15 @@ public: unsigned ScalarOpdIdx) const override; bool isTargetIntrinsicWithOverloadTypeAtArg(Intrinsic::ID ID, int OpdIdx) const override; + + InstructionCost getPartialReductionCost( + unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType, + ElementCount VF, TTI::PartialReductionExtendKind OpAExtend, + TTI::PartialReductionExtendKind OpBExtend, std::optional BinOp, + TTI::TargetCostKind CostKind, + std::optional FMF) const override { + return InstructionCost::getInvalid(); + } }; } // namespace llvm diff --git a/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h b/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h index 25e1b5b5f645..86b3195222bd 100644 --- a/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h +++ b/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h @@ -169,6 +169,15 @@ public: bool forceScalarizeMaskedScatter(VectorType *VTy, Align Alignment) const override; + InstructionCost getPartialReductionCost( + unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType, + ElementCount VF, TTI::PartialReductionExtendKind OpAExtend, + TTI::PartialReductionExtendKind OpBExtend, std::optional BinOp, + TTI::TargetCostKind CostKind, + std::optional FMF) const override { + return InstructionCost::getInvalid(); + } + /// @} InstructionCost diff --git a/llvm/lib/Target/LoongArch/LoongArchTargetTransformInfo.h b/llvm/lib/Target/LoongArch/LoongArchTargetTransformInfo.h index 9b479f9dc0dc..88ecd8bc618f 100644 --- a/llvm/lib/Target/LoongArch/LoongArchTargetTransformInfo.h +++ b/llvm/lib/Target/LoongArch/LoongArchTargetTransformInfo.h @@ -57,6 +57,15 @@ public: TTI::MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const override; + + InstructionCost getPartialReductionCost( + unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType, + ElementCount VF, TTI::PartialReductionExtendKind OpAExtend, + TTI::PartialReductionExtendKind OpBExtend, std::optional BinOp, + TTI::TargetCostKind CostKind, + std::optional FMF) const override { + return InstructionCost::getInvalid(); + } }; } // end namespace llvm diff --git a/llvm/lib/Target/Mips/MipsTargetTransformInfo.h b/llvm/lib/Target/Mips/MipsTargetTransformInfo.h index 8f8173915b2f..585589eb4f70 100644 --- a/llvm/lib/Target/Mips/MipsTargetTransformInfo.h +++ b/llvm/lib/Target/Mips/MipsTargetTransformInfo.h @@ -36,6 +36,15 @@ public: bool isLSRCostLess(const TargetTransformInfo::LSRCost &C1, const TargetTransformInfo::LSRCost &C2) const override; + + InstructionCost getPartialReductionCost( + unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType, + ElementCount VF, TTI::PartialReductionExtendKind OpAExtend, + TTI::PartialReductionExtendKind OpBExtend, std::optional BinOp, + TTI::TargetCostKind CostKind, + std::optional FMF) const override { + return InstructionCost::getInvalid(); + } }; } // end namespace llvm diff --git a/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h b/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h index b39c3fc73337..8bdafd6b905f 100644 --- a/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h +++ b/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h @@ -222,6 +222,15 @@ public: return false; } + InstructionCost getPartialReductionCost( + unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType, + ElementCount VF, TTI::PartialReductionExtendKind OpAExtend, + TTI::PartialReductionExtendKind OpBExtend, std::optional BinOp, + TTI::TargetCostKind CostKind, + std::optional FMF) const override { + return InstructionCost::getInvalid(); + } + ValueUniformity getValueUniformity(const Value *V) const override; }; diff --git a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h index 0432a388c4b8..67ac457063d6 100644 --- a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h +++ b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h @@ -169,6 +169,15 @@ public: getMemIntrinsicInstrCost(const MemIntrinsicCostAttributes &MICA, TTI::TargetCostKind CostKind) const override; + InstructionCost getPartialReductionCost( + unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType, + ElementCount VF, TTI::PartialReductionExtendKind OpAExtend, + TTI::PartialReductionExtendKind OpBExtend, std::optional BinOp, + TTI::TargetCostKind CostKind, + std::optional FMF) const override { + return InstructionCost::getInvalid(); + } + private: // The following constant is used for estimating costs on power9. static const InstructionCost::CostType P9PipelineFlushEstimate = 80; diff --git a/llvm/lib/Target/SPIRV/SPIRVTargetTransformInfo.h b/llvm/lib/Target/SPIRV/SPIRVTargetTransformInfo.h index 35a1aa1922ee..5d9db79e6f8d 100644 --- a/llvm/lib/Target/SPIRV/SPIRVTargetTransformInfo.h +++ b/llvm/lib/Target/SPIRV/SPIRVTargetTransformInfo.h @@ -64,6 +64,15 @@ public: bool isLegalMaskedGather(Type *DataType, Align Alignment) const override; bool isLegalMaskedScatter(Type *DataType, Align Alignment) const override; + + InstructionCost getPartialReductionCost( + unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType, + ElementCount VF, TTI::PartialReductionExtendKind OpAExtend, + TTI::PartialReductionExtendKind OpBExtend, std::optional BinOp, + TTI::TargetCostKind CostKind, + std::optional FMF) const override { + return InstructionCost::getInvalid(); + } }; } // namespace llvm diff --git a/llvm/lib/Target/Sparc/SparcTargetTransformInfo.h b/llvm/lib/Target/Sparc/SparcTargetTransformInfo.h index 2d4b94c9995f..7b2b7e4565cd 100644 --- a/llvm/lib/Target/Sparc/SparcTargetTransformInfo.h +++ b/llvm/lib/Target/Sparc/SparcTargetTransformInfo.h @@ -51,6 +51,15 @@ public: Type *Ty = nullptr) const override; TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const override; + + InstructionCost getPartialReductionCost( + unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType, + ElementCount VF, TTI::PartialReductionExtendKind OpAExtend, + TTI::PartialReductionExtendKind OpBExtend, std::optional BinOp, + TTI::TargetCostKind CostKind, + std::optional FMF) const override { + return InstructionCost::getInvalid(); + } /// @} }; diff --git a/llvm/lib/Target/VE/VETargetTransformInfo.h b/llvm/lib/Target/VE/VETargetTransformInfo.h index eed3832c9f1f..74f0b3dfea9b 100644 --- a/llvm/lib/Target/VE/VETargetTransformInfo.h +++ b/llvm/lib/Target/VE/VETargetTransformInfo.h @@ -157,6 +157,17 @@ public: return true; return !isSupportedReduction(II->getIntrinsicID()); } + + InstructionCost getPartialReductionCost( + unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType, + ElementCount VF, + TargetTransformInfo::PartialReductionExtendKind OpAExtend, + TargetTransformInfo::PartialReductionExtendKind OpBExtend, + std::optional BinOp, + TargetTransformInfo::TargetCostKind CostKind, + std::optional FMF) const override { + return InstructionCost::getInvalid(); + } }; } // namespace llvm