From 63e27980da2ef1c0c4c0eaecb3baef494b7fbce4 Mon Sep 17 00:00:00 2001
From: Renato Golin <renato.golin@linaro.org>
Date: Tue, 9 Sep 2014 09:57:59 +0000
Subject: [PATCH] ARM: Negative offset support problem

This patch is to permit a negative offset usage for a non frame access.

Patch by Igor Oblakov.

llvm-svn: 217431
---
 llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp  |  4 ++--
 llvm/test/CodeGen/ARM/negative-offset.ll | 17 +++++++++++++++++
 2 files changed, 19 insertions(+), 2 deletions(-)
 create mode 100644 llvm/test/CodeGen/ARM/negative-offset.ll

diff --git a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
index e547600624a4..996bb1f00147 100644
--- a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -542,11 +542,11 @@ bool ARMDAGToDAGISel::SelectAddrModeImm12(SDValue N,
   }
 
   if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
-    int RHSC = (int)RHS->getZExtValue();
+    int RHSC = (int)RHS->getSExtValue();
     if (N.getOpcode() == ISD::SUB)
       RHSC = -RHSC;
 
-    if (RHSC >= 0 && RHSC < 0x1000) { // 12 bits (unsigned)
+    if (RHSC > -0x1000 && RHSC < 0x1000) { // 12 bits
       Base   = N.getOperand(0);
       if (Base.getOpcode() == ISD::FrameIndex) {
         int FI = cast<FrameIndexSDNode>(Base)->getIndex();
diff --git a/llvm/test/CodeGen/ARM/negative-offset.ll b/llvm/test/CodeGen/ARM/negative-offset.ll
new file mode 100644
index 000000000000..7b949fd71fe1
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/negative-offset.ll
@@ -0,0 +1,17 @@
+; RUN: llc -mtriple=arm-eabi -O3 %s -o - | FileCheck %s
+
+; Function Attrs: nounwind readonly
+define arm_aapcscc i32 @sum(i32* nocapture readonly %p) #0 {
+entry:
+;CHECK-LABEL: sum:
+;CHECK-NOT: sub
+;CHECK: ldr r{{.*}}, [r0, #-16]
+;CHECK: ldr r{{.*}}, [r0, #-8]
+  %arrayidx = getelementptr inbounds i32* %p, i32 -4
+  %0 = load i32* %arrayidx, align 4
+  %arrayidx1 = getelementptr inbounds i32* %p, i32 -2
+  %1 = load i32* %arrayidx1, align 4
+  %add = add nsw i32 %1, %0
+  ret i32 %add
+}
+